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https://github.com/mauiaaron/apple2.git
synced 2024-12-23 11:31:41 +00:00
CPU_TRACING bugfix and more readable
- GetImm mode was not reporting correct arg - Converts it to a format easier to compare against similar CPU trace output from AppleWin - Sanity-check arg counts
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9b9ca39344
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9bbe906f43
@ -710,9 +710,6 @@ GLUE_C_WRITE(cpu65_trace_arg2)
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GLUE_C_WRITE(cpu65_trace_epilogue)
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{
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char fmt[64];
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char buf[64];
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int8_t arg1 = opargs[1];
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int8_t arg2 = opargs[2];
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@ -722,50 +719,38 @@ GLUE_C_WRITE(cpu65_trace_epilogue)
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assert(nargs > 0);
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assert(nargs <= 3);
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if (nargs != opcodes_65c02_numargs[cpu65_opcode]+1) {
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assert(false && "OOPS, most likely some cpu.S routine is not properly setting the arg value");
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}
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#warning FIXME TODO ... need to refactor this and the debugger routines to use the same codepaths ...
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switch (opcodes_65c02[cpu65_opcode].mode) {
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case addr_implied:
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case addr_accumulator: /* no arg */
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sprintf(buf, "%04X:%02X %s %s", current_pc, cpu65_opcode, opcodes_65c02[cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[cpu65_opcode].mode]);
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case addr_accumulator:
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fprintf(cpu_trace_fp, "%04X:%02X ", current_pc, cpu65_opcode);
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break;
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case addr_immediate:
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case addr_zeropage:
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case addr_zeropage_x:
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case addr_zeropage_y:
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case addr_indirect:
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case addr_indirect_x:
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case addr_indirect_y: /* byte arg */
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sprintf(fmt, "%04X:%02X%02X %s %s", current_pc, cpu65_opcode, (uint8_t)arg1, opcodes_65c02[cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[cpu65_opcode].mode]);
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sprintf(buf, fmt, (uint8_t)arg1);
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case addr_indirect_y:
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case addr_relative:
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fprintf(cpu_trace_fp, "%04X:%02X%02X ", current_pc, cpu65_opcode, (uint8_t)arg1);
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break;
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case addr_absolute:
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case addr_absolute_x:
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case addr_absolute_y:
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case addr_j_indirect:
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case addr_j_indirect_x: /* word arg */
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sprintf(fmt, "%04X:%02X%02X%02X %s %s", current_pc, cpu65_opcode, (uint8_t)arg2, (uint8_t)arg1, opcodes_65c02[cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[cpu65_opcode].mode]);
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sprintf(buf, fmt, (uint8_t)arg1, (uint8_t)arg2);
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case addr_j_indirect_x:
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fprintf(cpu_trace_fp, "%04X:%02X%02X%02X", current_pc, cpu65_opcode, (uint8_t)arg2, (uint8_t)arg1);
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break;
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case addr_relative: /* offset */
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sprintf(fmt, "%04X:%02X%02X %s %s", current_pc, cpu65_opcode, (uint8_t)arg1, opcodes_65c02[cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[cpu65_opcode].mode]);
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if (arg1 < 0) {
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sprintf(buf, fmt, current_pc + arg1 + 2, '-', (uint8_t)(-arg1));
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} else {
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sprintf(buf, fmt, current_pc + arg1 + 2, '+', (uint8_t)arg1);
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}
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break;
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default: /* shouldn't happen */
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sprintf(buf, "invalid opcode mode");
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default:
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fprintf(cpu_trace_fp, "invalid opcode mode");
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break;
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}
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char regs_buf[64];
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sprintf(regs_buf, "EA:%04X SP:%02X X:%02X Y:%02X A:%02X", cpu65_ea, cpu65_sp, cpu65_x, cpu65_y, cpu65_a);
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fprintf(cpu_trace_fp, " SP:%02X X:%02X Y:%02X A:%02X", cpu65_sp, cpu65_x, cpu65_y, cpu65_a);
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#define FLAGS_BUFSZ 9
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char flags_buf[FLAGS_BUFSZ];
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@ -796,7 +781,44 @@ GLUE_C_WRITE(cpu65_trace_epilogue)
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}
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flags_buf[8] = '\0';
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fprintf(cpu_trace_fp, "%s %s %s\n", buf, regs_buf, flags_buf);
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fprintf(cpu_trace_fp, " %s EA:%04X", flags_buf, cpu65_ea);
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char fmt[64];
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sprintf(fmt, " %s %s", opcodes_65c02[cpu65_opcode].mnemonic, disasm_templates[opcodes_65c02[cpu65_opcode].mode]);
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switch (opcodes_65c02[cpu65_opcode].mode) {
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case addr_implied:
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case addr_accumulator:
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fprintf(cpu_trace_fp, "%s", fmt);
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break;
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case addr_immediate:
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case addr_zeropage:
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case addr_zeropage_x:
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case addr_zeropage_y:
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case addr_indirect:
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case addr_indirect_x:
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case addr_indirect_y:
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fprintf(cpu_trace_fp, fmt, (uint8_t)arg1);
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break;
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case addr_absolute:
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case addr_absolute_x:
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case addr_absolute_y:
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case addr_j_indirect:
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case addr_j_indirect_x:
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fprintf(cpu_trace_fp, fmt, (uint8_t)arg1, (uint8_t)arg2);
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break;
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case addr_relative:
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if (arg1 < 0) {
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fprintf(cpu_trace_fp, fmt, current_pc + arg1 + 2, '-', (uint8_t)(-arg1));
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} else {
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fprintf(cpu_trace_fp, fmt, current_pc + arg1 + 2, '+', (uint8_t)arg1);
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}
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break;
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default:
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break;
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}
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fprintf(cpu_trace_fp, "%s", "\n");
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fflush(cpu_trace_fp);
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}
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@ -96,5 +96,6 @@ extern const struct opcode_struct opcodes_6502[256];
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extern const struct opcode_struct opcodes_65c02[256];
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extern const struct opcode_struct opcodes_undoc[256];
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extern const char* const disasm_templates[15];
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extern const uint8_t opcodes_65c02_numargs[256];
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#endif
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@ -814,3 +814,263 @@ const struct opcode_struct opcodes_undoc[256] =
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{ "INC", addr_absolute_x },
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{ "isb", addr_absolute_x },
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};
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const uint8_t opcodes_65c02_numargs[256] =
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{
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0, // 0x00
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0x08
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x10
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0x18
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2,
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0,
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0,
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2,
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2,
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2,
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0,
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2, // 0x20
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0x28
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x30
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0x38
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2,
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0,
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0,
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2,
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2,
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2,
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0,
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0, // 0x40
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1,
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0,
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0,
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0,
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1,
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1,
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0,
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0, // 0x48
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x50
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1,
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1,
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0,
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0,
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1,
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1,
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0,
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0, // 0x58
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2,
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0,
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0,
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0,
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2,
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2,
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0,
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0, // 0x60
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0x68
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x70
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0x78
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2,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x80
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0x88
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0x90
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0x98
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2,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0xA0
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0xA8
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0xB0
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1,
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1,
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0,
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1,
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1,
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1,
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0,
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0, // 0xB8
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2,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0xC0
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0xC8
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0xD0
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1,
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1,
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0,
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0,
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1,
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1,
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0,
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0, // 0xD8
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2,
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0,
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0,
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0,
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2,
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2,
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0,
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1, // 0xE0
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1,
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0,
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0,
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1,
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1,
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1,
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0,
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0, // 0xE8
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1,
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0,
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0,
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2,
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2,
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2,
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0,
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1, // 0xF0
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1,
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1,
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0,
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0,
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1,
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1,
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0,
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0, // 0xF8
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2,
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0,
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0,
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0,
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2,
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2,
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0,
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};
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@ -99,10 +99,10 @@ TEST test_boot_disk_bytes() {
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PASS();
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}
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// This test is fairly abusive ... it creates an ~88MB file in $HOME
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// This test is fairly abusive ... it creates an ~90MB file in $HOME
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// ... but if it's correct, you're fairly assured the cpu/vm is working =)
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#define EXPECTED_CPU_TRACE_FILE_SIZE 86057401
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#define EXPECTED_CPU_TRACE_SHA "B6154D9DCC39EFD2AA69BEBF981E3024427F5240"
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#define EXPECTED_CPU_TRACE_FILE_SIZE 89130253
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#define EXPECTED_CPU_TRACE_SHA "2A86C5298CACBB1A894E91D41AA3061542286104"
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TEST test_boot_disk_cputrace() {
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char *homedir = getenv("HOME");
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char *output = NULL;
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@ -193,8 +193,16 @@
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/* Immediate Addressing - the operand is contained in the second byte of the
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instruction. */
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#define GetImm movLQ PC_Reg_X, EffectiveAddr_X; \
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#define _GetImm movLQ PC_Reg_X, EffectiveAddr_X; \
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incw PC_Reg;
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#if CPU_TRACING
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#define GetImm _GetImm \
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SNX_PROLOGUE(cpu65_vmem_r); \
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callLQ *SNX(cpu65_vmem_r,EffectiveAddr_X,SZ_PTR); \
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TRACE_ARG;
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#else
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#define GetImm _GetImm
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#endif
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/* Absolute Addressing - the second byte of the instruction is the low
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order address, and the third byte is the high order byte. */
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