From a1c6b302997549e7a197800743b9fdda9d644837 Mon Sep 17 00:00:00 2001 From: Aaron Culliney Date: Sun, 23 Feb 2014 09:18:09 -0800 Subject: [PATCH] CMP tests --- src/test/testcpu.c | 376 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 376 insertions(+) diff --git a/src/test/testcpu.c b/src/test/testcpu.c index f06c7229..39661d15 100644 --- a/src/test/testcpu.c +++ b/src/test/testcpu.c @@ -1899,6 +1899,373 @@ TEST test_CLV(uint8_t regA, uint8_t val) { PASS(); } +// ---------------------------------------------------------------------------- +// CMP instructions + +static void logic_CMP(/*uint8_t*/int _a, /*uint8_t*/int _b, uint8_t *flags) { + uint8_t a = (uint8_t)_a; + uint8_t b = (uint8_t)_b; + + uint8_t res = a - b; + + if ((res & 0xff) == 0x0) { + *flags |= fZ; + } + if (res & 0x80) { + *flags |= fN; + } + if (b <= a) { + *flags |= fC; + } +} + +TEST test_CMP_imm(uint8_t regA, uint8_t val) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xC9, val); + + cpu65_current.a = regA; + cpu65_current.x = 0x03; + cpu65_current.y = 0x04; + cpu65_current.sp = 0x80; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0x03); + ASSERT(cpu65_current.y == 0x04); + ASSERT(cpu65_current.sp == 0x80); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == TEST_LOC+1); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xC9); + ASSERT(cpu65_debug.opcycles == (2)); + + PASS(); +} + +TEST test_CMP_zpage(uint8_t regA, uint8_t val, uint8_t arg0) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xc5, arg0); + + apple_ii_64k[0][arg0] = val; + + cpu65_current.a = regA; + cpu65_current.x = 0x03; + cpu65_current.y = 0x04; + cpu65_current.sp = 0x80; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0x03); + ASSERT(cpu65_current.y == 0x04); + ASSERT(cpu65_current.sp == 0x80); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == arg0); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xc5); + ASSERT(cpu65_debug.opcycles == (3)); + + PASS(); +} + +TEST test_CMP_zpage_x(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t regX) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xd5, arg0); + + uint8_t idx = arg0+regX; + + apple_ii_64k[0][idx] = val; + + cpu65_current.a = regA; + cpu65_current.x = regX; + cpu65_current.y = 0x05; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == regX); + ASSERT(cpu65_current.y == 0x05); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == idx); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xd5); + ASSERT(cpu65_debug.opcycles == (4)); + + PASS(); +} + +TEST test_CMP_abs(uint8_t regA, uint8_t val, uint8_t lobyte, uint8_t hibyte) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode3(0xcd, lobyte, hibyte); + + uint16_t addrs = lobyte | (hibyte<<8); + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = 0xf4; + cpu65_current.y = 0x05; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+3); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0xf4); + ASSERT(cpu65_current.y == 0x05); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xcd); + ASSERT(cpu65_debug.opcycles == (4)); + + PASS(); +} + +TEST test_CMP_abs_x(uint8_t regA, uint8_t val, uint8_t regX, uint8_t lobyte, uint8_t hibyte) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode3(0xdd, lobyte, hibyte); + + uint8_t cycle_count = 4; + uint16_t addrs = lobyte | (hibyte<<8); + addrs = addrs + regX; + if ((uint8_t)((addrs>>8)&0xff) != (uint8_t)hibyte) { + ++cycle_count; + } + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = regX; + cpu65_current.y = 0x05; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+3); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == regX); + ASSERT(cpu65_current.y == 0x05); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xdd); + ASSERT(cpu65_debug.opcycles == cycle_count); + + PASS(); +} + +TEST test_CMP_abs_y(uint8_t regA, uint8_t val, uint8_t regY, uint8_t lobyte, uint8_t hibyte) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode3(0xd9, lobyte, hibyte); + + uint8_t cycle_count = 4; + uint16_t addrs = lobyte | (hibyte<<8); + addrs = addrs + regY; + if ((uint8_t)((addrs>>8)&0xff) != (uint8_t)hibyte) { + ++cycle_count; + } + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = 0x02; + cpu65_current.y = regY; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+3); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0x02); + ASSERT(cpu65_current.y == regY); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xd9); + ASSERT(cpu65_debug.opcycles == cycle_count); + + PASS(); +} + +TEST test_CMP_ind_x(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t regX, uint8_t lobyte, uint8_t hibyte) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xc1, arg0); + + uint8_t idx_lo = arg0 + regX; + uint8_t idx_hi = idx_lo+1; + uint16_t addrs = lobyte | (hibyte<<8); + + apple_ii_64k[0][idx_lo] = lobyte; + apple_ii_64k[0][idx_hi] = hibyte; + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = regX; + cpu65_current.y = 0x15; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == regX); + ASSERT(cpu65_current.y == 0x15); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xc1); + + ASSERT(cpu65_debug.opcycles == (6)); + + PASS(); +} + +TEST test_CMP_ind_y(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t regY, uint8_t val_zp0, uint8_t val_zp1) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xd1, arg0); + + uint8_t idx0 = arg0; + uint8_t idx1 = arg0+1; + + apple_ii_64k[0][idx0] = val_zp0; + apple_ii_64k[0][idx1] = val_zp1; + + uint8_t cycle_count = 5; + uint16_t addrs = val_zp0 | (val_zp1<<8); + addrs += (uint8_t)regY; + if ((uint8_t)((addrs>>8)&0xff) != (uint8_t)val_zp1) { + ++cycle_count; + } + + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = 0x84; + cpu65_current.y = regY; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0x84); + ASSERT(cpu65_current.y == regY); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xd1); + ASSERT(cpu65_debug.opcycles == cycle_count); + + PASS(); +} + +// 65c02 : 0xD2 +TEST test_CMP_ind_zpage(uint8_t regA, uint8_t val, uint8_t arg0, uint8_t lobyte, uint8_t hibyte) { + HEADER0(); + + logic_CMP(regA, val, &flags); + + testcpu_set_opcode2(0xd2, arg0); + + uint8_t idx0 = arg0; + uint8_t idx1 = arg0+1; + + apple_ii_64k[0][idx0] = lobyte; + apple_ii_64k[0][idx1] = hibyte; + + uint16_t addrs = lobyte | (hibyte<<8); + apple_ii_64k[0][addrs] = val; + + cpu65_current.a = regA; + cpu65_current.x = 0x14; + cpu65_current.y = 0x85; + cpu65_current.sp = 0x81; + cpu65_current.f = 0x00; + + cpu65_run(); + + ASSERT(cpu65_current.pc == TEST_LOC+2); + ASSERT(cpu65_current.a == regA); + ASSERT(cpu65_current.x == 0x14); + ASSERT(cpu65_current.y == 0x85); + ASSERT(cpu65_current.sp == 0x81); + + VERIFY_FLAGS(); + + ASSERT(cpu65_debug.ea == addrs); + ASSERT(cpu65_debug.d == 0xff); + ASSERT(cpu65_debug.rw == RW_READ); + ASSERT(cpu65_debug.opcode == 0xd2); + ASSERT(cpu65_debug.opcycles == (5)); + + PASS(); +} + // ---------------------------------------------------------------------------- // NOP operand @@ -2473,6 +2840,7 @@ GREATEST_SUITE(test_suite_cpu) { A2_ADD_TEST(test_ADC_imm); A2_ADD_TEST(test_AND_imm); A2_ADD_TEST(test_BIT_imm); + A2_ADD_TEST(test_CMP_imm); A2_ADD_TEST(test_SBC_imm); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s (SILENCED OUTPUT) :\n", func->name); @@ -2525,6 +2893,7 @@ GREATEST_SUITE(test_suite_cpu) { A2_ADD_TEST(test_AND_zpage); A2_ADD_TEST(test_ASL_zpage); A2_ADD_TEST(test_BIT_zpage); + A2_ADD_TEST(test_CMP_zpage); A2_ADD_TEST(test_SBC_zpage); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2547,6 +2916,7 @@ GREATEST_SUITE(test_suite_cpu) { A2_ADD_TEST(test_AND_zpage_x); A2_ADD_TEST(test_ASL_zpage_x); A2_ADD_TEST(test_BIT_zpage_x); + A2_ADD_TEST(test_CMP_zpage_x); A2_ADD_TEST(test_SBC_zpage_x); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2567,6 +2937,7 @@ GREATEST_SUITE(test_suite_cpu) { A2_ADD_TEST(test_AND_abs); A2_ADD_TEST(test_ASL_abs); A2_ADD_TEST(test_BIT_abs); + A2_ADD_TEST(test_CMP_abs); A2_ADD_TEST(test_SBC_abs); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2588,6 +2959,7 @@ GREATEST_SUITE(test_suite_cpu) { A2_ADD_TEST(test_AND_abs_x); A2_ADD_TEST(test_ASL_abs_x); A2_ADD_TEST(test_BIT_abs_x); + A2_ADD_TEST(test_CMP_abs_x); A2_ADD_TEST(test_SBC_abs_x); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2609,6 +2981,7 @@ GREATEST_SUITE(test_suite_cpu) { // -------------------------------- A2_ADD_TEST(test_ADC_abs_y); A2_ADD_TEST(test_AND_abs_y); + A2_ADD_TEST(test_CMP_abs_y); A2_ADD_TEST(test_SBC_abs_y); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2630,6 +3003,7 @@ GREATEST_SUITE(test_suite_cpu) { // -------------------------------- A2_ADD_TEST(test_ADC_ind_x); A2_ADD_TEST(test_AND_ind_x); + A2_ADD_TEST(test_CMP_ind_x); A2_ADD_TEST(test_SBC_ind_x); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2651,6 +3025,7 @@ GREATEST_SUITE(test_suite_cpu) { // -------------------------------- A2_ADD_TEST(test_ADC_ind_y); A2_ADD_TEST(test_AND_ind_y); + A2_ADD_TEST(test_CMP_ind_y); A2_ADD_TEST(test_SBC_ind_y); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name); @@ -2667,6 +3042,7 @@ GREATEST_SUITE(test_suite_cpu) { // -------------------------------- A2_ADD_TEST(test_ADC_ind_zpage); A2_ADD_TEST(test_AND_ind_zpage); + A2_ADD_TEST(test_CMP_ind_zpage); A2_ADD_TEST(test_SBC_ind_zpage); HASH_ITER(hh, test_funcs, func, tmp) { fprintf(GREATEST_STDOUT, "\n%s :\n", func->name);