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test setting/checking 80COL

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This commit is contained in:
Aaron Culliney 2014-05-04 14:31:31 -07:00
parent 1a83d08fb6
commit aea7b33873
1 changed files with 126 additions and 0 deletions
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126
src/test/testvm.c
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@ -227,6 +227,18 @@ TEST test_read_random() {
" STA $1F43\r" \
)
#define ASM_80COL_OFF() \
test_type_input(" STA $C00C\r")
#define ASM_80COL_ON() \
test_type_input(" STA $C00D\r")
#define ASM_CHECK_80COL() \
test_type_input( \
" LDA $C01F\r" \
" STA $1F43\r" \
)
#define TYPE_TEXT_OFF() \
test_type_input("POKE49232,0:REM C050 TEXT OFF\r")
@ -2187,6 +2199,115 @@ TEST test_check_altzp(bool flag_altzp) {
PASS();
}
TEST test_80col_on() {
BOOT_TO_DOS();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] != TEST_FINISHED);
ASM_INIT();
ASM_80COL_OFF();
ASM_TRIGGER_WATCHPT();
ASM_80COL_ON();
ASM_TRIGGER_WATCHPT();
ASM_DONE();
ASM_GO();
c_debugger_go();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] == TEST_FINISHED);
ASSERT(!(softswitches & SS_80COL));
uint32_t switch_save = softswitches;
int save_current_page = video__current_page;
apple_ii_64k[0][WATCHPOINT_ADDR] = 0x00;
c_debugger_go();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] == TEST_FINISHED);
ASSERT((softswitches & SS_80COL));
switch_save = switch_save | SS_80COL;
ASSERT(video__current_page == save_current_page);
ASSERT((softswitches ^ switch_save) == 0);
PASS();
}
TEST test_80col_off() {
BOOT_TO_DOS();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] != TEST_FINISHED);
ASM_INIT();
ASM_80COL_ON();
ASM_TRIGGER_WATCHPT();
ASM_80COL_OFF();
ASM_TRIGGER_WATCHPT();
ASM_DONE();
ASM_GO();
c_debugger_go();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] == TEST_FINISHED);
ASSERT((softswitches & SS_80COL));
uint32_t switch_save = softswitches;
uint8_t *save_base_d000_rd = base_d000_rd;
uint8_t *save_base_d000_wrt = base_d000_wrt;
uint8_t *save_base_e000_rd = base_e000_rd;
uint8_t *save_base_e000_wrt = base_e000_wrt;
int save_current_page = video__current_page;
apple_ii_64k[0][WATCHPOINT_ADDR] = 0x00;
c_debugger_go();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] == TEST_FINISHED);
ASSERT(!(softswitches & SS_80COL));
switch_save = switch_save & ~SS_80COL;
ASSERT(video__current_page == save_current_page);
ASSERT((softswitches ^ switch_save) == 0);
PASS();
}
TEST test_check_80col(bool flag_80col) {
BOOT_TO_DOS();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] != TEST_FINISHED);
ASM_INIT();
if (flag_80col) {
ASM_80COL_ON();
} else {
ASSERT(!(softswitches & SS_80COL));
}
ASM_CHECK_80COL();
ASM_TRIGGER_WATCHPT();
ASM_DONE();
ASM_GO();
apple_ii_64k[0][TESTOUT_ADDR] = 0x96;
c_debugger_go();
ASSERT(apple_ii_64k[0][WATCHPOINT_ADDR] == TEST_FINISHED);
if (flag_80col) {
ASSERT(apple_ii_64k[0][TESTOUT_ADDR] == 0x80);
} else {
ASSERT(apple_ii_64k[0][TESTOUT_ADDR] == 0x00);
}
PASS();
}
// ----------------------------------------------------------------------------
// Test Suite
@ -2326,6 +2447,11 @@ GREATEST_SUITE(test_suite_vm) {
RUN_TESTp(test_check_altzp, /*ALTZP*/0);
RUN_TESTp(test_check_altzp, /*ALTZP*/1);
RUN_TESTp(test_80col_on);
RUN_TESTp(test_80col_off);
RUN_TESTp(test_check_80col, /*80COL*/0);
RUN_TESTp(test_check_80col, /*80COL*/1);
// ...
c_eject_6(0);
pthread_mutex_unlock(&interface_mutex);