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synced 2024-12-23 11:31:41 +00:00
Simplify ADC decimal mode test logic
* Skip testing illegal BCDs
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43ada45a36
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@ -28,7 +28,7 @@
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#define RW_READ 0x1
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#define RW_WRITE 0x2
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#define MSG_FLAGS0 "A:%02X op %02X = %02X flags = %s (is %s)"
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#define MSG_FLAGS0 "A:%02X op %02X = %02X : %s (emul2ix = %02X : %s)"
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#define HEADER0() \
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uint8_t result = 0x0; \
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@ -40,7 +40,7 @@
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#define VERIFY_FLAGS() \
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flags_to_string(flags, buf0); \
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flags_to_string(cpu65_current.f, buf1); \
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snprintf(msgbuf, MSG_SIZE, MSG_FLAGS0, regA, val, result, buf0, buf1); \
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snprintf(msgbuf, MSG_SIZE, MSG_FLAGS0, regA, val, result, buf0, cpu65_current.a, buf1); \
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ASSERTm(msgbuf, cpu65_current.f == flags);
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static void testcpu_setup(void *arg) {
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@ -94,12 +94,30 @@ static void testcpu_set_opcode1(uint8_t op) {
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testcpu_set_opcode3(op, val, arg1);
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}
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static bool check_skip_illegal_bcd(uint8_t bcd0, uint8_t bcd1) {
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if (bcd0 >= 0xA0) {
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return true;
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}
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if ((bcd0 & 0x0f) >= 0x0A) {
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return true;
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}
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if (bcd1 >= 0xA0) {
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return true;
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}
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if ((bcd1 & 0x0f) >= 0x0A) {
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return true;
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}
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return false;
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}
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// ----------------------------------------------------------------------------
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// ADC instructions
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static void logic_ADC_dec(/*uint8_t*/int _a, /*uint8_t*/int _b, uint8_t *result, uint8_t *flags) {
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*flags |= fD;
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// componentize
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uint8_t x_lo = 0x0;
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uint8_t x_hi = 0x0;
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@ -109,29 +127,28 @@ static void logic_ADC_dec(/*uint8_t*/int _a, /*uint8_t*/int _b, uint8_t *result,
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uint8_t a_hi = (((uint8_t)_a) & 0xf0)>>4;
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uint8_t b_hi = (((uint8_t)_b) & 0xf0)>>4;
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x_lo = a_lo + b_lo;
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if (*flags & fC) {
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x_lo += 1;
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}
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*flags &= ~fC;
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uint8_t carry = (*flags & fC) ? 1 : 0;
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*flags &= ~ fC;
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// BCD add
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x_lo = a_lo + b_lo + carry;
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carry = 0;
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if (x_lo > 9) {
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x_lo += 6;
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x_hi += (x_lo>>4);
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carry = (x_lo>>4); // +1 or +2
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x_lo &= 0x0f;
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}
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x_hi += a_hi + b_hi;
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x_hi = a_hi + b_hi + carry;
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if (x_hi > 9) {
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*flags |= fC;
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x_hi += 6;
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}
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// merge result
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x_hi <<= 4;
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*result = x_hi | x_lo;
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// flags
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if (*result == 0x00) {
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*flags |= fZ;
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}
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@ -190,6 +207,11 @@ TEST test_ADC_imm(uint8_t regA, uint8_t val, bool decimal, bool carry) {
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flags |= decimal ? (fD) : 0x00;
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flags |= carry ? (fC) : 0x00;
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if (decimal && check_skip_illegal_bcd(regA, val)) {
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// NOTE : FIXME TODO skip undocumented/illegal BCD
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SKIPm("Z");
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}
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logic_ADC(regA, val, &result, &flags);
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testcpu_set_opcode2(0x69, val);
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@ -208,7 +230,8 @@ TEST test_ADC_imm(uint8_t regA, uint8_t val, bool decimal, bool carry) {
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ASSERT(cpu65_current.y == 0x04);
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ASSERT(cpu65_current.sp == 0x80);
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ASSERT(cpu65_current.a == result);
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snprintf(msgbuf, MSG_SIZE, MSG_FLAGS0, regA, val, result, buf0, cpu65_current.a, buf1);
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ASSERTm(msgbuf, cpu65_current.a == result);
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VERIFY_FLAGS();
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ASSERT(cpu65_debug.ea == TEST_LOC+1);
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@ -609,7 +632,8 @@ TEST test_AND_imm(uint8_t regA, uint8_t val) {
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ASSERT(cpu65_current.y == 0x04);
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ASSERT(cpu65_current.sp == 0x80);
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ASSERT(cpu65_current.a == result);
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snprintf(msgbuf, MSG_SIZE, MSG_FLAGS0, regA, val, result, buf0, cpu65_current.a, buf1);
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ASSERTm(msgbuf, cpu65_current.a == result);
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VERIFY_FLAGS();
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ASSERT(cpu65_debug.ea == TEST_LOC+1);
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