mirror of
https://github.com/mauiaaron/apple2.git
synced 2024-09-28 16:54:51 +00:00
WIP : Android armeabi target compiles
This commit is contained in:
parent
6439d303a8
commit
d9ce113aa0
@ -2,11 +2,74 @@ LOCAL_PATH := $(call my-dir)
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include $(CLEAR_VARS)
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include $(CLEAR_VARS)
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# -----------------------------------------------------------------------------
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# Various sources
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APPLE2_SRC_PATH := ../../src
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APPLE2_X86_SRC := \
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$(APPLE2_SRC_PATH)/x86/glue.S $(APPLE2_SRC_PATH)/x86/cpu.S
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APPLE2_ARM_SRC := \
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$(APPLE2_SRC_PATH)/arm/glue.S $(APPLE2_SRC_PATH)/arm/cpu.S
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APPLE2_VIDEO_SRC = \
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$(APPLE2_SRC_PATH)/video/glvideo.c \
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$(APPLE2_SRC_PATH)/video/glinput.c \
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$(APPLE2_SRC_PATH)/video_util/matrixUtil.c \
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$(APPLE2_SRC_PATH)/video_util/modelUtil.c \
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$(APPLE2_SRC_PATH)/video_util/sourceUtil.c \
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$(APPLE2_SRC_PATH)/video_util/vectorUtil.c
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APPLE2_AUDIO_SRC = \
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$(APPLE2_SRC_PATH)/audio/soundcore.c $(APPLE2_SRC_PATH)/audio/soundcore-openal.c $(APPLE2_SRC_PATH)/audio/speaker.c \
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$(APPLE2_SRC_PATH)/audio/win-shim.c $(APPLE2_SRC_PATH)/audio/alhelpers.c $(APPLE2_SRC_PATH)/audio/mockingboard.c \
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$(APPLE2_SRC_PATH)/audio/AY8910.c
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APPLE2_META_SRC = \
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$(APPLE2_SRC_PATH)/meta/debug.c $(APPLE2_SRC_PATH)/meta/debugger.c $(APPLE2_SRC_PATH)/meta/opcodes.c
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APPLE2_MAIN_SRC = \
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$(APPLE2_SRC_PATH)/font.c $(APPLE2_SRC_PATH)/rom.c $(APPLE2_SRC_PATH)/misc.c $(APPLE2_SRC_PATH)/display.c $(APPLE2_SRC_PATH)/vm.c \
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$(APPLE2_SRC_PATH)/timing.c $(APPLE2_SRC_PATH)/zlib-helpers.c $(APPLE2_SRC_PATH)/joystick.c $(APPLE2_SRC_PATH)/keys.c \
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$(APPLE2_SRC_PATH)/disk.c $(APPLE2_SRC_PATH)/cpu-supp.c
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$(APPLE2_SRC_PATH)/rom.c: genrom
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./genrom src/rom/apple_IIe.rom src/rom/slot6.rom > $@
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# -----------------------------------------------------------------------------
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# Build flags
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APPLE2_BASE_CFLAGS = -std=gnu11 -I$(APPLE2_SRC_PATH)
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APPLE2_CFLAGS := $(APPLE2_BASE_CFLAGS) -DHEADLESS=0 -DAPPLE2IX=1 -DVIDEO_OPENGL=1 -DAUDIO_OPENAL=1 -DDEBUGGER=1 -DHAVE_OPENSSL=0
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$(warning TODO FIXME flags settings for tests)
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$(warning need to include SHA-processing code)
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TESTCPU_CFLAGS := $(APPLE2_BASE_CFLAGS) -DHEADLESS=1 -DAPPLE2IX=1 -DVIDEO_OPENGL=0 -DAUDIO_OPENAL=0 -DDEBUGGER=1 -DHAVE_OPENSSL=0
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TESTVM_CLFAGS :=
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TESTDISK_CLFAGS :=
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TESTDISPLAY_CLFAGS :=
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# -----------------------------------------------------------------------------
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# Android build config
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LOCAL_MODULE := apple2ix
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LOCAL_MODULE := apple2ix
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LOCAL_SRC_FILES := jnihooks.c
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LOCAL_SRC_FILES := jnihooks.c
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LOCAL_CFLAGS := $(APPLE2_CFLAGS)
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LOCAL_LDLIBS := -llog -landroid
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LOCAL_LDLIBS := -llog -landroid
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# Add assembly files first ... mostly for the benefit of the ARM assembler ...
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ifeq ($(TARGET_ARCH_ABI),x86)
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LOCAL_SRC_FILES += $(APPLE2_X86_SRC)
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else ifeq($(TARGET_ARCH_ABI),$(filter ($TARGET_ARCH_ABI), foo, baz))
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LOCAL_SRC_FILES += $(APPLE2_ARM_SRC)
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else
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$(error building for $(TARGET_ARCH_ABI) device untested...)
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endif
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LOCAL_SRC_FILES += $(APPLE2_MAIN_SRC) $(APPLE2_META_SRC)
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# Build a shared library and let Java/Dalvik drive
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# Build a shared library and let Java/Dalvik drive
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include $(BUILD_SHARED_LIBRARY)
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include $(BUILD_SHARED_LIBRARY)
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@ -10,9 +10,7 @@
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*/
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*/
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#include <jni.h>
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#include <jni.h>
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#include <android/log.h>
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#include "common.h"
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#define LOG(fmt, ...) __android_log_print(ANDROID_LOG_ERROR, "apple2ix", fmt, __VA_ARGS__)
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#define LAUNCH_WITHOUT_JAVA 0
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#define LAUNCH_WITHOUT_JAVA 0
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#if LAUNCH_WITHOUT_JAVA
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#if LAUNCH_WITHOUT_JAVA
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@ -11,4 +11,4 @@
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#proguard.config=${sdk.dir}/tools/proguard/proguard-android.txt:proguard-project.txt
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#proguard.config=${sdk.dir}/tools/proguard/proguard-android.txt:proguard-project.txt
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# Project target.
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# Project target.
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target=android-18
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target=android-10
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@ -40,26 +40,21 @@
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#define ret mov pc, r14
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#define ret mov pc, r14
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#ifdef __LP64__
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#ifdef __aarch64__
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# error 20150205 ARM 64bit untested!!!
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# error 20150205 ARM 64bit untested!!!
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# define LSL_SHIFT #4 // 4<<1 = 8
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# define PTR_SHIFT #4 // 4<<1 = 8
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# define SZ_PTR 8
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# define ROR_BIT 63
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#else
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#else
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# define LSL_SHIFT #2 // 2<<1 = 4
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# define PTR_SHIFT #2 // 2<<1 = 4
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# define SZ_PTR 4
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# define ROR_BIT 31
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#endif
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#endif
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#ifdef NO_UNDERSCORES
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#define NO_UNDERSCORES 1
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# define SYM(x) x
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#if NO_UNDERSCORES
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# define SYMX(x,INDEX,SCALE) x(,INDEX,SCALE)
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# define SYM(x) =x
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# define ENTRY(x) .globl x; .balign 16; x##:
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# define ENTRY(x) .globl x; .balign 16; x##:
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# define CALL(x) x
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# define CALL(x) x
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#else
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#else
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# define SYM(x) _##x
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# define SYM(x) =_##x
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# define SYMX(x,INDEX,SCALE) _##x(,INDEX,SCALE)
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# define ENTRY(x) .globl _##x; .balign 16; _##x##:
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# define ENTRY(x) .globl _##x; .balign 16; _##x##:
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# define CALL(x) _##x
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# define CALL(x) _##x
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#endif
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#endif
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198
src/arm/cpu.S
198
src/arm/cpu.S
@ -22,24 +22,18 @@
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#define CPU_DEBUGGING 1
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#define CPU_DEBUGGING 1
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#endif
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#endif
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#define MemDebugCurrEA SYM(cpu65_ea)
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#define MemDebugCurrByte SYM(cpu65_d)
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#define MemDebugCurrRW SYM(cpu65_rw)
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#define MemDebugCurrOpcode SYM(cpu65_opcode)
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#define MemDebugCycleCount SYM(cpu65_opcycles)
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#define DecodeFlags \
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#define DecodeFlags \
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ldr r1, SYM(cpu65_flags_decode) \
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ldr r1, SYM(cpu65_flags_decode); \
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ldrb F_Reg, [r1, r0]
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ldrb F_Reg, [r1, r0];
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#define EncodeFlags \
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#define EncodeFlags \
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mov r0, F_Reg \
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mov r0, F_Reg; \
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ldr r1, SYM(cpu65_flags_encode) \
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ldr r1, SYM(cpu65_flags_encode); \
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ldrb r0, [r1, r0]
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ldrb r0, [r1, r0];
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#define CommonSaveCPUState \
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#define CommonSaveCPUState \
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/* save EA */ \
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/* save EA */ \
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ldr r0, MemDebugCurrEA; \
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ldr r0, SYM(cpu65_ea); \
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strh EffectiveAddr, [r0]; \
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strh EffectiveAddr, [r0]; \
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/* save stack pointer */ \
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/* save stack pointer */ \
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ldr r0, SYM(cpu65_sp); \
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ldr r0, SYM(cpu65_sp); \
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@ -87,24 +81,24 @@
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#if CPU_DEBUGGING
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#if CPU_DEBUGGING
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# define CPU_DEBUGGING_RESET \
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# define CPU_DEBUGGING_RESET \
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ldr r1, MemDebugCurrOpcode; \
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ldr r1, SYM(cpu65_opcode); \
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strb r0, [r1]; /* r0 should be next opcode */ \
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strb r0, [r1]; /* r0 should be next opcode */ \
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xor r9, r9, r9; \
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eor r9, r9, r9; \
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ldr r1, MemDebugCycleCount; \
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ldr r1, SYM(cpu65_opcycles); \
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strb r9, [r1]; \
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strb r9, [r1]; \
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ldr r1, MemDebugCurrRW; \
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/*ldr r1, SYM(cpu65_rw);*/ \
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strb r9, [r1];
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strb r9, [r1];
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# define CPU_DEBUGGING_SET_READ \
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# define CPU_DEBUGGING_SET_READ \
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ldr r1, SYM(MemDebugCurrRW); \
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/*ldr r1, SYM(cpu65_rw);*/ \
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ldrb r9, [r1]; \
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ldrb r9, [r1]; \
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or r9, r9, #1; \
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orr r9, r9, #1; \
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strb r9, [r1];
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strb r9, [r1];
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# define CPU_DEBUGGING_SET_WRITE \
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# define CPU_DEBUGGING_SET_WRITE \
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ldr r1, SYM(MemDebugCurrRW); \
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/*ldr r1, SYM(cpu65_rw);*/ \
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ldrb r9, [r1]; \
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ldrb r9, [r1]; \
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or r9, r9, #2; \
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orr r9, r9, #2; \
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strb r9, [r1]; \
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strb r9, [r1]; \
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ldr r1, SYM(MemDebugCurrByte); \
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ldr r1, SYM(cpu65_d); \
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strb r0, [r1];
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strb r0, [r1];
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#else
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#else
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# define CPU_DEBUGGING_SET_READ
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# define CPU_DEBUGGING_SET_READ
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@ -147,7 +141,7 @@
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#define GetFromEA_B \
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#define GetFromEA_B \
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CPU_DEBUGGING_SET_READ \
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CPU_DEBUGGING_SET_READ \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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blx r1
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blx r1;
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#define GetFromEA_W \
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#define GetFromEA_W \
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add EffectiveAddr, EffectiveAddr, #1; \
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add EffectiveAddr, EffectiveAddr, #1; \
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@ -178,7 +172,7 @@
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sub EffectiveAddr, EffectiveAddr, #1; \
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sub EffectiveAddr, EffectiveAddr, #1; \
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mov r9, r0, LSL #8; \
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mov r9, r0, LSL #8; \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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ldr r1, [reg_vmem_r, EffectiveAddr, LSL PTR_SHIFT]; \
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blx r1;
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blx r1; \
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orr r0, r9, r0;
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orr r0, r9, r0;
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#define Continue \
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#define Continue \
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@ -198,8 +192,8 @@
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#define pc_hi_prev r9
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#define pc_hi_prev r9
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#define pc_hi_next r0
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#define pc_hi_next r0
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#define BranchXCycles \
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#define BranchXCycles \
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ldr mem_cycle_count, MemDebugCycleCount; \
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ldr mem_cycle_count, SYM(cpu65_opcycles); \
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xor scratch_count, scratch_count, scratch_count; /* HACK FIXME TODO VERIFY IN GDB : is this necessary? */ \
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eor scratch_count, scratch_count, scratch_count; /* HACK FIXME TODO VERIFY IN GDB : is this necessary? */ \
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ldrb scratch_count, [mem_cycle_count]; \
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ldrb scratch_count, [mem_cycle_count]; \
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add scratch_count, scratch_count, #1; /* +1 branch taken */ \
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add scratch_count, scratch_count, #1; /* +1 branch taken */ \
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mov pc_hi_prev, PC_Reg; \
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mov pc_hi_prev, PC_Reg; \
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@ -219,7 +213,7 @@
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#define arm_flags r12
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#define arm_flags r12
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#define lahf \
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#define lahf \
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/* Virtual x86: Load %AH (r12) from Flags */ \
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/* Virtual x86: Load %AH (r12) from Flags */ \
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mov arm_flags, r15, LSR #28w
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mov arm_flags, r15, LSR #28;
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#define FlagC \
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#define FlagC \
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lahf; \
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lahf; \
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@ -269,7 +263,6 @@
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ldr stack_loc, SYM(base_stackzp); \
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ldr stack_loc, SYM(base_stackzp); \
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add stack_loc, stack_loc, #0x100; \
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add stack_loc, stack_loc, #0x100; \
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add stack_loc, stack_loc, SP_Reg;
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add stack_loc, stack_loc, SP_Reg;
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#error FIXME TODO STACK OVERFLOW PROTECTIONZ
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#else
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#else
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#define RestoreAltZP
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#define RestoreAltZP
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#endif
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#endif
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instruction. */
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instruction. */
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#define _GetImm \
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#define _GetImm \
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mov EffectiveAddr, PC_Reg; \
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mov EffectiveAddr, PC_Reg; \
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teq PC_Reg, #0xFFFF; \
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ldr r0, SYM(mask_FFFF); \
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ldrh r0, [r0]; \
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teq PC_Reg, r0; \
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addne PC_Reg, PC_Reg, #1; \
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addne PC_Reg, PC_Reg, #1; \
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moveq PC_Reg, #0
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moveq PC_Reg, #0
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#warning TODO write test cases for immediate addressing 16bit overflow
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#warning TODO write test cases for immediate addressing 16bit overflow
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#error FIXME TODO ... can all/many of the 16bit overflow cases be handled in Continue instead of in various one-off/bespoke ways ?
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#warning FIXME TODO ... can all/many of the 16bit overflow cases be handled in Continue instead of in various one-off/bespoke ways ?
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#if CPU_TRACING
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#if CPU_TRACING
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#define GetImm \
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#define GetImm \
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@ -351,8 +346,8 @@
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beq 9f;
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beq 9f;
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#define PageBoundaryCrossed \
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#define PageBoundaryCrossed \
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ldr mem_cycle_count, MemDebugCycleCount; \
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ldr mem_cycle_count, SYM(cpu65_opcycles); \
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xor scratch_count, scratch_count, scratch_count; /* HACK FIXME TODO VERIFY IN GDB : is this necessary? */ \
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eor scratch_count, scratch_count, scratch_count; /* HACK FIXME TODO VERIFY IN GDB : is this necessary? */ \
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ldrb scratch_count, [mem_cycle_count]; \
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ldrb scratch_count, [mem_cycle_count]; \
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add scratch_count, scratch_count, #1; /* +1 cycle on page_boundary */ \
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add scratch_count, scratch_count, #1; /* +1 cycle on page_boundary */ \
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strb scratch_count, [mem_cycle_count];
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strb scratch_count, [mem_cycle_count];
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mov r0, r0, LSL #24; \
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mov r0, r0, LSL #24; \
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mov A_Reg, A_Reg, LSL #24; \
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mov A_Reg, A_Reg, LSL #24; \
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bt \
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bt \
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adcs regA, regA, r0; \
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adcs A_Reg, A_Reg, r0; \
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FlagNVZC \
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FlagNVZC \
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mov regA, regA, LSR #24;
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mov A_Reg, A_Reg, LSR #24;
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#ifndef NDEBUG
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#ifndef NDEBUG
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#define DebugBCDCheck \
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#define DebugBCDCheck \
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@ -511,7 +506,7 @@
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GetFromEA_B \
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GetFromEA_B \
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mov r0, r0, LSL #24; \
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mov r0, r0, LSL #24; \
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mov r1, A_Reg, LSL #24; \
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mov r1, A_Reg, LSL #24; \
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tsts r1, r0;
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tst r1, r0;
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#define DoBIT \
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#define DoBIT \
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_DoBIT \
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_DoBIT \
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@ -548,7 +543,7 @@
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mov x, x, LSL #24; \
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mov x, x, LSL #24; \
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subs x, x, r1; \
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subs x, x, r1; \
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FlagNZ \
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FlagNZ \
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mov x, x, LSR #24
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mov x, x, LSR #24;
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#define DoDEC \
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#define DoDEC \
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GetFromEA_B \
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GetFromEA_B \
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@ -569,7 +564,7 @@
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mov x, x, LSL #24; \
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mov x, x, LSL #24; \
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adds x, x, r1; \
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adds x, x, r1; \
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FlagNZ \
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FlagNZ \
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mov x, x, LSR #24
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mov x, x, LSR #24;
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#define DoINC \
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#define DoINC \
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GetFromEA_B \
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GetFromEA_B \
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@ -613,7 +608,7 @@
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#define _DoROL(x) \
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#define _DoROL(x) \
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mov x, x, LSL #8; \
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mov x, x, LSL #8; \
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tsts F_Reg, #C_Flag; \
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tst F_Reg, #C_Flag; \
|
||||||
orrne x, x, #0x80; \
|
orrne x, x, #0x80; \
|
||||||
lsls x, x, #17; \
|
lsls x, x, #17; \
|
||||||
FlagNZC \
|
FlagNZC \
|
||||||
@ -626,7 +621,7 @@
|
|||||||
|
|
||||||
|
|
||||||
#define _DoROR(x) \
|
#define _DoROR(x) \
|
||||||
tsts F_Reg, #C_Flag; \
|
tst F_Reg, #C_Flag; \
|
||||||
orrne x, x, #0x100; \
|
orrne x, x, #0x100; \
|
||||||
rors x, x, #1; \
|
rors x, x, #1; \
|
||||||
FlagNZC
|
FlagNZC
|
||||||
@ -661,7 +656,7 @@
|
|||||||
|
|
||||||
#define DoTRB \
|
#define DoTRB \
|
||||||
GetFromEA_B \
|
GetFromEA_B \
|
||||||
teqs r0, A_Reg, r0; \
|
teq r0, A_Reg; \
|
||||||
FlagZ \
|
FlagZ \
|
||||||
mvn r1, A_Reg; \
|
mvn r1, A_Reg; \
|
||||||
and r0, r0, r1; \
|
and r0, r0, r1; \
|
||||||
@ -669,7 +664,7 @@
|
|||||||
|
|
||||||
#define DoTSB \
|
#define DoTSB \
|
||||||
GetFromEA_B \
|
GetFromEA_B \
|
||||||
teqs r0, A_Reg; \
|
teq r0, A_Reg; \
|
||||||
FlagZ \
|
FlagZ \
|
||||||
orr r0, A_Reg, r0; \
|
orr r0, A_Reg, r0; \
|
||||||
PutToEA_B
|
PutToEA_B
|
||||||
@ -687,7 +682,7 @@
|
|||||||
ENTRY(op_ADC_dec)
|
ENTRY(op_ADC_dec)
|
||||||
#warning FIXME TODO op_ADC_dec
|
#warning FIXME TODO op_ADC_dec
|
||||||
#if 0
|
#if 0
|
||||||
incb MemDebugCycleCount // +1 cycle
|
incb SYM(cpu65_opcycles) // +1 cycle
|
||||||
GetFromEA_B
|
GetFromEA_B
|
||||||
DebugBCDCheck
|
DebugBCDCheck
|
||||||
bt $C_Flag_Bit, AF_Reg_X
|
bt $C_Flag_Bit, AF_Reg_X
|
||||||
@ -757,7 +752,7 @@ ENTRY(op_ADC_zpage_x) // 0x75
|
|||||||
|
|
||||||
// UNIMPLEMENTED : W65C02S datasheet
|
// UNIMPLEMENTED : W65C02S datasheet
|
||||||
ENTRY(op_ADC_zpage_y)
|
ENTRY(op_ADC_zpage_y)
|
||||||
jmp CALL(op_NOP)
|
b CALL(op_NOP)
|
||||||
|
|
||||||
ENTRY(op_ADC_abs) // 0x6d
|
ENTRY(op_ADC_abs) // 0x6d
|
||||||
GetAbs
|
GetAbs
|
||||||
@ -796,6 +791,11 @@ ENTRY(op_ADC_ind_zpage)
|
|||||||
DoADC_b
|
DoADC_b
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
mask_FFFF: .hword 0xFFFF
|
||||||
|
interrupt_vector: .hword 0xFFFE
|
||||||
|
reset_vector: .hword 0xFFFC
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
AND instructions
|
AND instructions
|
||||||
logical AND memory with accumulator
|
logical AND memory with accumulator
|
||||||
@ -851,6 +851,8 @@ ENTRY(op_AND_ind_zpage)
|
|||||||
DoAND
|
DoAND
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
ASL instructions
|
ASL instructions
|
||||||
Arithmetic Shift one bit Left, memory or accumulator
|
Arithmetic Shift one bit Left, memory or accumulator
|
||||||
@ -880,6 +882,8 @@ ENTRY(op_ASL_abs_x) // 0x1e
|
|||||||
DoASL
|
DoASL
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BBRx instructions
|
BBRx instructions
|
||||||
UNIMPLEMENTED : These are documented in the W65C02S datasheet ...
|
UNIMPLEMENTED : These are documented in the W65C02S datasheet ...
|
||||||
@ -942,6 +946,8 @@ ENTRY(op_BBS6_65c02)
|
|||||||
ENTRY(op_BBS7_65c02)
|
ENTRY(op_BBS7_65c02)
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BCC instruction
|
BCC instruction
|
||||||
Branch on Carry Clear
|
Branch on Carry Clear
|
||||||
@ -978,6 +984,8 @@ ENTRY(op_BEQ) // 0xF0
|
|||||||
BranchXCycles
|
BranchXCycles
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BIT instructions
|
BIT instructions
|
||||||
BIt Test
|
BIt Test
|
||||||
@ -1015,6 +1023,8 @@ ENTRY(op_BIT_imm)
|
|||||||
FlagZ
|
FlagZ
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BMI instruction
|
BMI instruction
|
||||||
Branch on result MInus
|
Branch on result MInus
|
||||||
@ -1062,13 +1072,17 @@ ENTRY(op_BRA)
|
|||||||
BranchXCycles
|
BranchXCycles
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BRK instruction
|
BRK instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
|
|
||||||
ENTRY(op_UNK) /* make undefined opcodes fault */
|
ENTRY(op_UNK) /* make undefined opcodes fault */
|
||||||
ENTRY(op_BRK)
|
ENTRY(op_BRK)
|
||||||
teq PC_Reg, #0xFFFF
|
ldr r0, SYM(mask_FFFF)
|
||||||
|
ldrh r0, [r0]
|
||||||
|
teq PC_Reg, r0
|
||||||
addne PC_Reg, PC_Reg, #1
|
addne PC_Reg, PC_Reg, #1
|
||||||
moveq PC_Reg, #0
|
moveq PC_Reg, #0
|
||||||
#warning TODO FIXME ... write test for overflow in op_BRK
|
#warning TODO FIXME ... write test for overflow in op_BRK
|
||||||
@ -1081,11 +1095,14 @@ ENTRY(op_BRK)
|
|||||||
EncodeFlags
|
EncodeFlags
|
||||||
Push(r0)
|
Push(r0)
|
||||||
orr F_Reg, F_Reg, #I_Flag
|
orr F_Reg, F_Reg, #I_Flag
|
||||||
mov EffectiveAddr, #0xFFFE
|
ldr EffectiveAddr, SYM(interrupt_vector)
|
||||||
|
ldrh EffectiveAddr, [EffectiveAddr]
|
||||||
GetFromEA_W
|
GetFromEA_W
|
||||||
mov PC_Reg, r0
|
mov PC_Reg, r0
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
BVC instruction
|
BVC instruction
|
||||||
Branch on oVerflow Clear
|
Branch on oVerflow Clear
|
||||||
@ -1110,6 +1127,8 @@ ENTRY(op_BVS) // 0x70
|
|||||||
BranchXCycles
|
BranchXCycles
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
CLC instruction
|
CLC instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1142,6 +1161,8 @@ ENTRY(op_CLV) // 0xB8
|
|||||||
bic F_Reg, #V_Flag
|
bic F_Reg, #V_Flag
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
CMP instructions
|
CMP instructions
|
||||||
CoMPare memory and accumulator
|
CoMPare memory and accumulator
|
||||||
@ -1164,7 +1185,7 @@ ENTRY(op_CMP_zpage_x) // 0xd5
|
|||||||
|
|
||||||
// UNIMPLEMENTED : W65C02S datasheet
|
// UNIMPLEMENTED : W65C02S datasheet
|
||||||
ENTRY(op_CMP_zpage_y)
|
ENTRY(op_CMP_zpage_y)
|
||||||
jmp CALL(op_NOP)
|
b CALL(op_NOP)
|
||||||
|
|
||||||
ENTRY(op_CMP_abs) // 0xcd
|
ENTRY(op_CMP_abs) // 0xcd
|
||||||
GetAbs
|
GetAbs
|
||||||
@ -1197,6 +1218,8 @@ ENTRY(op_CMP_ind_zpage)
|
|||||||
DoCMP
|
DoCMP
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
CPX instructions
|
CPX instructions
|
||||||
ComPare memory and X register
|
ComPare memory and X register
|
||||||
@ -1237,6 +1260,8 @@ ENTRY(op_CPY_abs) // 0xcc
|
|||||||
DoCPY
|
DoCPY
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
DEA: DEcrement Accumulator
|
DEA: DEcrement Accumulator
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1287,6 +1312,8 @@ ENTRY(op_DEY) // 0x88
|
|||||||
_DoDEC(Y_Reg)
|
_DoDEC(Y_Reg)
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
EOR instructions
|
EOR instructions
|
||||||
Exclusive OR memory with accumulator
|
Exclusive OR memory with accumulator
|
||||||
@ -1309,7 +1336,7 @@ ENTRY(op_EOR_zpage_x) // 0x55
|
|||||||
|
|
||||||
// UNIMPLEMENTED : W65C02S datasheet
|
// UNIMPLEMENTED : W65C02S datasheet
|
||||||
ENTRY(op_EOR_zpage_y)
|
ENTRY(op_EOR_zpage_y)
|
||||||
jmp CALL(op_NOP)
|
b CALL(op_NOP)
|
||||||
|
|
||||||
ENTRY(op_EOR_abs) // 0x4d
|
ENTRY(op_EOR_abs) // 0x4d
|
||||||
GetAbs
|
GetAbs
|
||||||
@ -1342,6 +1369,8 @@ ENTRY(op_EOR_ind_zpage)
|
|||||||
DoEOR
|
DoEOR
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
INA : INcrement Accumulator
|
INA : INcrement Accumulator
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1392,6 +1421,8 @@ ENTRY(op_INY) // 0xc8
|
|||||||
_DoINC(Y_Reg)
|
_DoINC(Y_Reg)
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
JMP instructions
|
JMP instructions
|
||||||
JuMP to new location
|
JuMP to new location
|
||||||
@ -1431,7 +1462,7 @@ ENTRY(op_JMP_abs_ind_x)
|
|||||||
mov EffectiveAddr, EffectiveAddr, LSL #24 // 16bit under/overflow protection
|
mov EffectiveAddr, EffectiveAddr, LSL #24 // 16bit under/overflow protection
|
||||||
mov EffectiveAddr, EffectiveAddr, LSR #24
|
mov EffectiveAddr, EffectiveAddr, LSR #24
|
||||||
#warning FIXME TODO write test for op_JMP_abs_ind_x under/overflow protection
|
#warning FIXME TODO write test for op_JMP_abs_ind_x under/overflow protection
|
||||||
GetFromMem_W(EffectiveAddr_X)
|
GetFromMem_W(EffectiveAddr)
|
||||||
mov PC_Reg, r0
|
mov PC_Reg, r0
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
@ -1442,9 +1473,9 @@ ENTRY(op_JMP_abs_ind_x)
|
|||||||
ENTRY(op_JSR) // 0x20
|
ENTRY(op_JSR) // 0x20
|
||||||
GetAbs
|
GetAbs
|
||||||
mov r0, PC_Reg
|
mov r0, PC_Reg
|
||||||
teq r0, #0
|
subs r0, r0, #1
|
||||||
subne r0, r0, #1
|
ldrmi r0, SYM(mask_FFFF) // handle underflow -- considered highly unlikely
|
||||||
moveq r0, #0xFFFF // handle underflow -- considered highly unlikely
|
ldrmih r0, [r0]
|
||||||
mov r0, r0, ROR #8
|
mov r0, r0, ROR #8
|
||||||
#warning TODO FIXME write test for op_JSR underflow ...
|
#warning TODO FIXME write test for op_JSR underflow ...
|
||||||
Push(r0) // push hi_byte
|
Push(r0) // push hi_byte
|
||||||
@ -1453,6 +1484,8 @@ ENTRY(op_JSR) // 0x20
|
|||||||
mov PC_Reg, EffectiveAddr
|
mov PC_Reg, EffectiveAddr
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
LDA instructions
|
LDA instructions
|
||||||
LoaD Accumulator with memory
|
LoaD Accumulator with memory
|
||||||
@ -1508,6 +1541,8 @@ ENTRY(op_LDA_ind_zpage)
|
|||||||
DoLDA
|
DoLDA
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
LDX instructions
|
LDX instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1567,6 +1602,8 @@ ENTRY(op_LDY_abs_x) // 0xbc
|
|||||||
DoLDY
|
DoLDY
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
LSR instructions
|
LSR instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1603,6 +1640,8 @@ ENTRY(op_LSR_abs_x) // 0x5e
|
|||||||
ENTRY(op_NOP) // 0xea
|
ENTRY(op_NOP) // 0xea
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
ORA instructions
|
ORA instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1657,6 +1696,8 @@ ENTRY(op_ORA_ind_zpage)
|
|||||||
DoORA
|
DoORA
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
PHA instruction
|
PHA instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1737,6 +1778,8 @@ ENTRY(op_PLY)
|
|||||||
FlagNZ
|
FlagNZ
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
ROL instructions
|
ROL instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1792,6 +1835,8 @@ ENTRY(op_ROR_abs_x) // 0x7e
|
|||||||
DoROR
|
DoROR
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
RTI instruction
|
RTI instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1816,13 +1861,17 @@ ENTRY(op_RTS) // 0x60
|
|||||||
Pop(hi_byte)
|
Pop(hi_byte)
|
||||||
mov hi_byte, hi_byte, LSL #8
|
mov hi_byte, hi_byte, LSL #8
|
||||||
orr r0, hi_byte, lo_byte
|
orr r0, hi_byte, lo_byte
|
||||||
teq r0, #0xFFFF
|
ldr r1, SYM(mask_FFFF)
|
||||||
|
ldr r1, [r1]
|
||||||
|
teq r0, r1
|
||||||
addne r0, r0, #1
|
addne r0, r0, #1
|
||||||
moveq r0, #0 // handle overflow -- considered highly unlikely
|
moveq r0, #0 // handle overflow -- considered highly unlikely
|
||||||
#warning TODO FIXME write test for this overflow ...
|
#warning TODO FIXME write test for this overflow ...
|
||||||
mov PC_Reg, r0
|
mov PC_Reg, r0
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
SBC instructions
|
SBC instructions
|
||||||
SuBtract memory from accumulator with Borrow
|
SuBtract memory from accumulator with Borrow
|
||||||
@ -1830,7 +1879,7 @@ ENTRY(op_RTS) // 0x60
|
|||||||
ENTRY(op_SBC_dec)
|
ENTRY(op_SBC_dec)
|
||||||
#warning FIXME TODO op_ADC_dec
|
#warning FIXME TODO op_ADC_dec
|
||||||
#if 0
|
#if 0
|
||||||
incb MemDebugCycleCount // +1 cycle
|
incb SYM(cpu65_opcycles) // +1 cycle
|
||||||
GetFromEA_B
|
GetFromEA_B
|
||||||
DebugBCDCheck
|
DebugBCDCheck
|
||||||
btc $C_Flag_Bit, AF_Reg_X
|
btc $C_Flag_Bit, AF_Reg_X
|
||||||
@ -1903,7 +1952,7 @@ ENTRY(op_SBC_zpage_x) // 0xf5
|
|||||||
|
|
||||||
// UNIMPLEMENTED : W65C02S datasheet
|
// UNIMPLEMENTED : W65C02S datasheet
|
||||||
ENTRY(op_SBC_zpage_y)
|
ENTRY(op_SBC_zpage_y)
|
||||||
jmp CALL(op_NOP)
|
b CALL(op_NOP)
|
||||||
|
|
||||||
ENTRY(op_SBC_abs) // 0xed
|
ENTRY(op_SBC_abs) // 0xed
|
||||||
GetAbs
|
GetAbs
|
||||||
@ -1942,6 +1991,8 @@ ENTRY(op_SBC_ind_zpage)
|
|||||||
DoSBC_b
|
DoSBC_b
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
SEC instruction
|
SEC instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -1995,6 +2046,8 @@ ENTRY(op_SMB6_65c02)
|
|||||||
ENTRY(op_SMB7_65c02)
|
ENTRY(op_SMB7_65c02)
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
STA instructions
|
STA instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -2044,6 +2097,8 @@ ENTRY(op_STA_ind_zpage)
|
|||||||
DoSTA
|
DoSTA
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
STP instruction
|
STP instruction
|
||||||
UNIMPLEMENTED : This is documented in the W65C02S datasheet ...
|
UNIMPLEMENTED : This is documented in the W65C02S datasheet ...
|
||||||
@ -2081,6 +2136,8 @@ ENTRY(op_RMB6_65c02)
|
|||||||
ENTRY(op_RMB7_65c02)
|
ENTRY(op_RMB7_65c02)
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
STX instructions
|
STX instructions
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -2149,6 +2206,8 @@ ENTRY(op_STZ_abs_x)
|
|||||||
DoSTZ
|
DoSTZ
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
TAX instruction
|
TAX instruction
|
||||||
---------------------------------- */
|
---------------------------------- */
|
||||||
@ -2246,6 +2305,8 @@ ENTRY(op_TYA) // 0x98
|
|||||||
FlagNZ
|
FlagNZ
|
||||||
Continue
|
Continue
|
||||||
|
|
||||||
|
.ltorg
|
||||||
|
|
||||||
/* ----------------------------------
|
/* ----------------------------------
|
||||||
??? instruction - 65c02
|
??? instruction - 65c02
|
||||||
Defined as NOPs by spec
|
Defined as NOPs by spec
|
||||||
@ -2271,9 +2332,10 @@ ENTRY(op_WAI_65c02)
|
|||||||
#define cycles_exe r0
|
#define cycles_exe r0
|
||||||
continue:
|
continue:
|
||||||
ldr r1, SYM(cpu65__opcycles)
|
ldr r1, SYM(cpu65__opcycles)
|
||||||
ldr r0, SYM(MemDebugCurrOpcode)
|
ldr r0, SYM(cpu65_opcode)
|
||||||
|
ldrb r0, [r0]
|
||||||
ldrb cycles_exe, [r1, r0]
|
ldrb cycles_exe, [r1, r0]
|
||||||
ldr r1, SYM(MemDebugCycleCount)
|
ldr r1, SYM(cpu65_opcycles)
|
||||||
ldrb r2, [r1]
|
ldrb r2, [r1]
|
||||||
add cycles_exe, cycles_exe, r2
|
add cycles_exe, cycles_exe, r2
|
||||||
strb cycles_exe, [r1]
|
strb cycles_exe, [r1]
|
||||||
@ -2301,10 +2363,9 @@ continue:
|
|||||||
bmi exit_cpu65_run
|
bmi exit_cpu65_run
|
||||||
beq exit_cpu65_run
|
beq exit_cpu65_run
|
||||||
|
|
||||||
#define r_cpu65__signal r1
|
|
||||||
continue1: eor r0, r0, r0
|
continue1: eor r0, r0, r0
|
||||||
ldr r_cpu65__signal, SYM(cpu65__signal)
|
ldr r1, SYM(cpu65__signal)
|
||||||
ldrb r0, [r_cpu65__signal]
|
ldrb r0, [r1]
|
||||||
orr r0, r0, r0
|
orr r0, r0, r0
|
||||||
bne exception
|
bne exception
|
||||||
JumpNextInstruction
|
JumpNextInstruction
|
||||||
@ -2315,14 +2376,20 @@ continue1: eor r0, r0, r0
|
|||||||
|
|
||||||
exception: tst r0, #ResetSig
|
exception: tst r0, #ResetSig
|
||||||
beq ex_irq
|
beq ex_irq
|
||||||
tst SYM(joy_button0), #0xFF // OpenApple
|
ldr r1, SYM(joy_button0) // OpenApple
|
||||||
|
ldrb r0, [r1]
|
||||||
|
tst r0, #0xFF
|
||||||
bne exit_reinit
|
bne exit_reinit
|
||||||
tst SYM(joy_button1), #0xFF // ClosedApple
|
ldr r1, SYM(joy_button1) // ClosedApple
|
||||||
|
ldrb r0, [r1]
|
||||||
|
tst r0, #0xFF
|
||||||
bne exit_reinit
|
bne exit_reinit
|
||||||
|
|
||||||
ex_reset: mov r0, #0
|
ex_reset: mov r0, #0
|
||||||
strb r0, [r_cpu65__signal]
|
ldr r1, SYM(cpu65__signal)
|
||||||
mov EffectiveAddr, #0xFFFC // ROM reset vector
|
strb r0, [r1]
|
||||||
|
ldr EffectiveAddr, SYM(reset_vector)
|
||||||
|
ldrh EffectiveAddr, [EffectiveAddr]
|
||||||
GetFromEA_W
|
GetFromEA_W
|
||||||
mov PC_Reg, r0
|
mov PC_Reg, r0
|
||||||
JumpNextInstruction
|
JumpNextInstruction
|
||||||
@ -2340,7 +2407,8 @@ ex_irq: tst F_Reg, #I_Flag // Already interrupt
|
|||||||
Push(r0)
|
Push(r0)
|
||||||
orr F_Reg, F_Reg, #BI_Flags
|
orr F_Reg, F_Reg, #BI_Flags
|
||||||
//bic F_Reg, F_Reg, #D_Flag // AppleWin clears Decimal bit?
|
//bic F_Reg, F_Reg, #D_Flag // AppleWin clears Decimal bit?
|
||||||
mov EffectiveAddr, #0xFFFE
|
ldr EffectiveAddr, SYM(interrupt_vector)
|
||||||
|
ldrh EffectiveAddr, [EffectiveAddr]
|
||||||
GetFromEA_W
|
GetFromEA_W
|
||||||
mov PC_Reg, r0
|
mov PC_Reg, r0
|
||||||
JumpNextInstruction
|
JumpNextInstruction
|
||||||
@ -2352,7 +2420,7 @@ ex_irq: tst F_Reg, #I_Flag // Already interrupt
|
|||||||
ENTRY(cpu65_run)
|
ENTRY(cpu65_run)
|
||||||
// Restore CPU state when being called from C.
|
// Restore CPU state when being called from C.
|
||||||
#warning FIXME TODO ... do all the ldrb's zero-out the high-24bits of the destination reg?
|
#warning FIXME TODO ... do all the ldrb's zero-out the high-24bits of the destination reg?
|
||||||
ldr r1, SYM(MemDebugCurrEA)
|
ldr r1, SYM(cpu65_ea)
|
||||||
ldrh EffectiveAddr, [r1]
|
ldrh EffectiveAddr, [r1]
|
||||||
ldr r1, SYM(cpu65_pc)
|
ldr r1, SYM(cpu65_pc)
|
||||||
ldrh PC_Reg, [r1]
|
ldrh PC_Reg, [r1]
|
||||||
@ -2371,7 +2439,7 @@ ENTRY(cpu65_run)
|
|||||||
ldrb r0, [r1]
|
ldrb r0, [r1]
|
||||||
tst r0, #0
|
tst r0, #0
|
||||||
movne r0, #0
|
movne r0, #0
|
||||||
strbne r0, [r1]
|
strneb r0, [r1]
|
||||||
bne ex_reset
|
bne ex_reset
|
||||||
b continue1
|
b continue1
|
||||||
|
|
||||||
|
@ -43,16 +43,16 @@ ENTRY(func) ldr r1, SYM(pointer); \
|
|||||||
|
|
||||||
|
|
||||||
#define GLUE_C_WRITE(func) \
|
#define GLUE_C_WRITE(func) \
|
||||||
ENTRY(func) push {r0, A_Reg, X_Reg, Y_Reg, F_Reg, SP_Reg, PC_Reg}; \
|
ENTRY(func) push {r0, PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
||||||
and r0, #0xff; \
|
and r0, #0xff; \
|
||||||
mov r1, r0; \
|
mov r1, r0; \
|
||||||
mov r0, EffectiveAddr; \
|
mov r0, EffectiveAddr; \
|
||||||
bl CALL(c_##func); \
|
bl CALL(c_##func); \
|
||||||
pop {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg, r0}; \
|
pop {r0, PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define _GLUE_C_READ(func, ...) \
|
#define _GLUE_C_READ(func, ...) \
|
||||||
ENTRY(func) push {A_Reg, X_Reg, Y_Reg, F_Reg, SP_Reg, PC_Reg}; \
|
ENTRY(func) push {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
||||||
mov r0, EffectiveAddr; \
|
mov r0, EffectiveAddr; \
|
||||||
bl CALL(c_##func); \
|
bl CALL(c_##func); \
|
||||||
pop {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
pop {PC_Reg, SP_Reg, F_Reg, Y_Reg, X_Reg, A_Reg}; \
|
||||||
@ -60,10 +60,5 @@ ENTRY(func) push {A_Reg, X_Reg, Y_Reg, F_Reg, SP_Reg, PC_Reg}; \
|
|||||||
ret;
|
ret;
|
||||||
|
|
||||||
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
|
#define GLUE_C_READ(FUNC) _GLUE_C_READ(FUNC)
|
||||||
|
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC)
|
||||||
#define GLUE_C_READ_ALTZP(FUNC) _GLUE_C_READ(FUNC, \
|
|
||||||
push {r0}; \
|
|
||||||
RestoreAltZP \
|
|
||||||
pop {r0}; \
|
|
||||||
)
|
|
||||||
|
|
||||||
|
@ -99,7 +99,8 @@ extern bool do_logging;
|
|||||||
#ifdef ANDROID
|
#ifdef ANDROID
|
||||||
static const char *log_end = "";
|
static const char *log_end = "";
|
||||||
# include <android/log.h>
|
# include <android/log.h>
|
||||||
# error QUIT_FUNCTION(x) __FIXME_TODO__exit(x)
|
# warning TODO ... FOSS crash reporting?
|
||||||
|
# define QUIT_FUNCTION(x) exit(x)
|
||||||
# define _LOG_CMD(str) __android_log_print(ANDROID_LOG_ERROR, "apple2ix", "%s", str)
|
# define _LOG_CMD(str) __android_log_print(ANDROID_LOG_ERROR, "apple2ix", "%s", str)
|
||||||
#else
|
#else
|
||||||
extern FILE *error_log;
|
extern FILE *error_log;
|
||||||
|
Loading…
Reference in New Issue
Block a user