refactor C3ROM,CXROM switches to C

This commit is contained in:
Aaron Culliney 2014-05-10 22:39:03 -07:00
parent 400364b739
commit f785da40e9
2 changed files with 59 additions and 50 deletions

View File

@ -152,56 +152,6 @@
return80: movb $0x80,%al
ret
/* HACK not doing anything... */
E(iie_check_vbl)
ret
/* ---------------------------------- */
E(iie_c3rom_peripheral)
andl $~SS_C3ROM, SN(softswitches)
testl $SS_CXROM, SN(softswitches)
jnz 1f /* CXROM-internal preempts C3ROM */
movl $SN(apple_ii_64k), SN(base_c3rom)
1: ret
E(iie_c3rom_internal)
orl $SS_C3ROM, SN(softswitches)
movl $SN(apple_ii_64k)+BANK2, SN(base_c3rom)
ret
E(iie_check_c3rom)
testl $SS_C3ROM, SN(softswitches)
jz return80
xorb %al, %al
ret
E(iie_cxrom_peripheral)
andl $~SS_CXROM, SN(softswitches)
movl $SN(apple_ii_64k), SN(base_cxrom)
#ifdef AUDIO_ENABLED
movl $SN(MB_Read), SN(base_c4rom)
movl $SN(MB_Read), SN(base_c5rom) // HACK FIXME -- MB is hardcoded, what about Phasor?
#endif
testl $SS_C3ROM, SN(softswitches)
jnz 1f
movl $SN(apple_ii_64k), SN(base_c3rom)
1: ret
E(iie_cxrom_internal)
orl $SS_CXROM, SN(softswitches)
movl $SN(apple_ii_64k)+BANK2, SN(base_cxrom)
movl $SN(apple_ii_64k)+BANK2, SN(base_c3rom)
movl $SN(apple_ii_64k)+BANK2, SN(base_c4rom)
movl $SN(apple_ii_64k)+BANK2, SN(base_c5rom)
ret
E(iie_check_cxrom)
testl $SS_CXROM, SN(softswitches)
jnz return80
xorb %al, %al
ret
/* HACK!!!!! - how does the expansion slot get referenced? need to handle other roms requesting to use this area!!!! */
E(iie_read_slot_expansion)
orl SN(c8rom_offset), EffectiveAddr_E

View File

@ -773,3 +773,62 @@ GLUE_C_READ(iie_check_dhires)
return (softswitches & SS_DHIRES) ? 0x80 : 0x00;
}
GLUE_C_READ(iie_check_vbl)
{
// HACK FIXME TODO : enable vertical blanking timing/detection */
return 0x0;
}
GLUE_C_READ(iie_c3rom_peripheral)
{
softswitches &= ~SS_C3ROM;
if (!(softswitches & SS_CXROM)) {
base_c3rom = apple_ii_64k[0];
}
return 0x0;
}
GLUE_C_READ(iie_c3rom_internal)
{
softswitches |= SS_C3ROM;
base_c3rom = apple_ii_64k[1];
return 0x0;
}
GLUE_C_READ(iie_check_c3rom)
{
return (softswitches & SS_C3ROM) ? 0x00 : 0x80; // reversed pattern
}
typedef uint8_t *(VMFunc)(uint16_t);
GLUE_C_READ(iie_cxrom_peripheral)
{
softswitches &= ~SS_CXROM;
base_cxrom = apple_ii_64k[0];
#ifdef AUDIO_ENABLED
extern VMFunc MB_Read;
base_c4rom = (void*)MB_Read;
base_c5rom = (void*)MB_Read;
#endif
if (!(softswitches & SS_C3ROM)) {
base_c3rom = apple_ii_64k[0];
}
return 0x0;
}
GLUE_C_READ(iie_cxrom_internal)
{
softswitches |= SS_CXROM;
base_cxrom = apple_ii_64k[1];
base_c3rom = apple_ii_64k[1];
base_c4rom = apple_ii_64k[1];
base_c5rom = apple_ii_64k[1];
return 0x0;
}
GLUE_C_READ(iie_check_cxrom)
{
return (softswitches & SS_CXROM) ? 0x80 : 0x00;
}