No Opcode left behind (#92)
* Better 65C02 support * NMOS illegal opcodes
This commit is contained in:
Will Scullin
GitHub
parent
70ec626dd0
commit
c24c01539d
10
js/apple2.ts
10
js/apple2.ts
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@ -17,7 +17,11 @@ import {
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} from './gl';
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import ROM from './roms/rom';
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import { Apple2IOState } from './apple2io';
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import CPU6502, { CpuState } from './cpu6502';
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import CPU6502, {
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CpuState,
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FLAVOR_6502,
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FLAVOR_ROCKWELL_65C02,
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} from './cpu6502';
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import MMU, { MMUState } from './mmu';
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import RAM, { RAMState } from './ram';
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@ -92,7 +96,9 @@ export class Apple2 implements Restorable<State>, DebuggerContainer {
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const HiresPage = options.gl ? HiresPageGL : HiresPage2D;
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const VideoModes = options.gl ? VideoModesGL : VideoModes2D;
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this.cpu = new CPU6502({ '65C02': options.enhanced });
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this.cpu = new CPU6502({
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flavor: options.enhanced ? FLAVOR_ROCKWELL_65C02 : FLAVOR_6502
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});
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this.vm = new VideoModes(options.canvas, options.e);
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const [{ default: Apple2ROM }, { default: characterRom }] = await Promise.all([
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509
js/cpu6502.ts
509
js/cpu6502.ts
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@ -1,8 +1,24 @@
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import { Memory, MemoryPages, byte, word } from './types';
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import { debug, toHex } from './util';
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import { Memory, MemberOf, MemoryPages, byte, word } from './types';
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import { toHex } from './util';
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export const FLAVOR_6502 = '6502';
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export const FLAVOR_ROCKWELL_65C02 = 'rockwell65c02';
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export const FLAVOR_WDC_65C02 = 'wdc65c02';
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export const FLAVORS_65C02 = [
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FLAVOR_ROCKWELL_65C02,
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FLAVOR_WDC_65C02
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];
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export const FLAVORS = [
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FLAVOR_6502,
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...FLAVORS_65C02
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];
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export type Flavor = MemberOf<typeof FLAVORS>;
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export interface CpuOptions {
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'65C02'?: boolean;
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flavor?: Flavor
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}
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export interface CpuState {
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@ -152,6 +168,8 @@ type Instructions = Record<byte, StrictInstruction>
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type callback = (cpu: CPU6502) => boolean | void;
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export default class CPU6502 {
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/** flavor */
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private readonly flavor: Flavor;
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/** 65C02 emulation mode flag */
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private readonly is65C02: boolean;
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@ -186,11 +204,17 @@ export default class CPU6502 {
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/** Command being fetched signal */
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private sync = false;
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/** Processor is in WAI mode */
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private wait = false;
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/** Processor is in STP mode */
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private stop = false;
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/** Filled array of CPU operations */
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private readonly opary: Instruction[];
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constructor(options: CpuOptions = {}) {
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this.is65C02 = options['65C02'] ? true : false;
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constructor({ flavor }: CpuOptions = {}) {
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this.flavor = flavor ?? FLAVOR_6502;
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this.is65C02 = !!flavor && FLAVORS_65C02.includes(flavor);
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this.memPages.fill(BLANK_PAGE);
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this.memPages.fill(BLANK_PAGE);
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@ -198,17 +222,35 @@ export default class CPU6502 {
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// Create this CPU's instruction table
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let ops = { ...this.OPS_6502 };
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if (this.is65C02) {
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ops = { ...ops, ...this.OPS_65C02 };
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switch (this.flavor) {
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case FLAVOR_WDC_65C02:
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ops = {
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...ops,
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...this.OPS_65C02,
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...this.OPS_WDC_65C02,
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};
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break;
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case FLAVOR_ROCKWELL_65C02:
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ops = {
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...ops,
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...this.OPS_65C02,
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...this.OPS_ROCKWELL_65C02,
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};
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break;
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default:
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ops = {
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...ops,
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...this.OPS_NMOS_6502,
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};
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}
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// Certain browsers benefit from using arrays over maps
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const opary: Instruction[] = new Array(0x100);
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this.opary = new Array(0x100);
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for (let idx = 0; idx < 0x100; idx++) {
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opary[idx] = ops[idx] || this.unknown(idx);
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this.opary[idx] = ops[idx] || this.unknown(idx);
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}
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this.opary = opary;
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}
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/**
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@ -262,7 +304,11 @@ export default class CPU6502 {
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n = bin >> 7;
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z = !bin;
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if (this.op.mode === 'immediate') {
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this.readByte(sub ? 0xB8 : 0x7F);
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if (this.flavor === FLAVOR_WDC_65C02) {
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this.readByte(sub ? 0xB8 : 0x7F);
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} else { // rockwell65c02
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this.readByte(sub ? 0xB1 : 0x59);
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}
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} else {
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this.readByte(this.addr);
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}
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@ -625,6 +671,34 @@ export default class CPU6502 {
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return addr;
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};
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// $0000,Y (NMOS 6502)
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readAddrAbsoluteY = (): word => {
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let addr = this.readWordPC();
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const page = addr & 0xff00;
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addr = (addr + this.yr) & 0xffff;
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const off = addr & 0x00ff;
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this.readByte(page | off);
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return addr;
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};
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// ($00,X) (NMOS 6502)
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readAddrZeroPageXIndirect = () => {
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const zpAddr = this.readBytePC();
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this.readByte(zpAddr);
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return this.readZPWord((zpAddr + this.xr) & 0xff);
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};
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// ($00),Y (NMOS 6502)
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readAddrZeroPageIndirectY = () => {
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const zpAddr = this.readBytePC();
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const addr = this.readZPWord(zpAddr);
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const addrIdx = (addr + this.yr) & 0xffff;
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const oldPage = addr & 0xff00;
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const off = addrIdx & 0xff;
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this.readByte(oldPage | off);
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return addrIdx;
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};
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// $(0000,X) (65C02)
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readAddrAbsoluteXIndirect = (): word => {
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const lsb = this.readBytePC();
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@ -635,12 +709,17 @@ export default class CPU6502 {
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return this.readWord(addr);
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};
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// 5C, DC, FC NOP
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// 5C, DC, FC NOP (65C02)
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readNop = (): void => {
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this.readWordPC();
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this.readByte(this.addr);
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};
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// NOP (65C02)
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readNopImplied = (): void => {
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// Op is 1 cycle
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};
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/* Break */
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brk = (readFn: ReadFn) => {
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readFn();
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@ -653,6 +732,20 @@ export default class CPU6502 {
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this.pc = this.readWord(loc.BRK);
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};
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/* Stop (65C02) */
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stp = () => {
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this.stop = true;
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this.readByte(this.pc);
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this.readByte(this.pc);
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};
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/* Wait (65C02) */
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wai = () => {
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this.wait = true;
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this.readByte(this.pc);
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this.readByte(this.pc);
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};
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/* Load Accumulator */
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lda = (readFn: ReadFn) => {
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this.ar = this.testNZ(readFn());
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@ -1055,32 +1148,219 @@ export default class CPU6502 {
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readFn();
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};
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/* NMOS 6502 Illegal opcodes */
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/* ASO = ASL + ORA */
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aso = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.shiftLeft(oldVal);
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this.writeByte(addr, val);
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this.ar |= val;
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this.testNZ(this.ar);
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};
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/* RLA = ROL + AND */
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rla = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.rotateLeft(oldVal);
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this.writeByte(addr, val);
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this.ar &= val;
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this.testNZ(this.ar);
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};
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/* LSE = LSR + EOR */
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lse = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.shiftRight(oldVal);
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this.writeByte(addr, val);
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this.ar ^= val;
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this.testNZ(this.ar);
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};
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/* RRA = ROR + ADC */
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rra = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.rotateRight(oldVal);
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this.writeByte(addr, val);
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this.ar = this.add(this.ar, val, false);
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};
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/* AXS = Store A & X */
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axs = (writeFn: WriteFn) => {
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writeFn(this.ar & this.xr);
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};
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/* LAX = Load A & X */
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lax = (readFn: ReadFn) => {
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const val = readFn();
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this.ar = val;
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this.xr = val;
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this.testNZ(val);
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};
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/* DCM = DEC + CMP */
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dcm = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn({ inc: true});
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.decrement(oldVal);
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this.writeByte(addr, val);
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this.compare(this.ar, val);
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};
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/* INS = INC + SBC */
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ins = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn({ inc: true});
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const oldVal = this.readByte(addr);
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this.workCycle(addr, oldVal);
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const val = this.increment(oldVal);
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this.writeByte(addr, val);
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this.ar = this.add(this.ar, val ^ 0xff, true);
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};
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/* ALR = AND + LSR */
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alr = (readFn: ReadFn) => {
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const val = readFn() & this.ar;
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this.ar = this.shiftRight(val);
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};
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/* ARR = AND + ROR */
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arr = (readFn: ReadFn) => {
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const val = readFn() & this.ar;
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const ah = val >> 4;
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const al = val & 0xf;
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const b7 = val >> 7;
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const b6 = (val >> 6) & 0x1;
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this.ar = this.rotateRight(val);
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let c = !!b7;
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const v = !!(b7 ^ b6);
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if (this.sr & flags.D) {
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if (al + (al & 0x1) > 0x5) {
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this.ar = (this.ar & 0xf0) | ((this.ar + 0x6) & 0xf);
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}
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if (ah + (ah & 0x1) > 5) {
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c = true;
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this.ar =((this.ar + 0x60) & 0xff);
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}
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}
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this.setFlag(flags.V, v);
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this.setFlag(flags.C, c);
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};
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/* XAA = TAX + AND */
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xaa = (readFn: ReadFn) => {
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const val = readFn();
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this.ar = (this.xr & 0xEE) | (this.xr & this.ar & 0x11);
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this.ar = this.testNZ(this.ar & val);
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};
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/** OAL = ORA + AND */
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oal = (readFn: ReadFn) => {
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this.ar |= 0xEE;
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const val = this.testNZ(this.ar & readFn());
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this.ar = val;
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this.xr = val;
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};
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/* SAX = A & X + SBC */
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sax = (readFn: ReadFn) => {
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const a = this.xr & this.ar;
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let b = readFn();
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b = (b ^ 0xff);
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const c = a + b + 1;
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this.setFlag(flags.C, c > 0xff);
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this.xr = this.testNZ(c & 0xff);
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};
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/* TAS = X & Y -> S */
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tas = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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let val = this.xr & this.ar;
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this.sp = val;
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const msb = addr >> 8;
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val = val & ((msb + 1) & 0xff);
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this.writeByte(addr, val);
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};
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/* SAY = Y & AH + 1 */
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say = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const msb = addr >> 8;
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const val = this.yr & ((msb + 1) & 0xff);
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this.writeByte(addr, val);
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};
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/* XAS = X & AH + 1 */
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xas = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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const msb = addr >> 8;
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const val = this.xr & ((msb + 1) & 0xff);
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this.writeByte(addr, val);
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};
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/* AXA = X & AH + 1 */
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axa = (readAddrFn: ReadAddrFn) => {
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const addr = readAddrFn();
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let val = this.xr & this.ar;
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const msb = addr >> 8;
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val = val & ((msb + 1) & 0xff);
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this.writeByte(addr, val);
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};
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/* ANC = AND with carry */
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anc = (readFn: ReadFn) => {
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this.ar = this.testNZ(this.ar & readFn());
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const c = !!(this.ar & 0x80);
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this.setFlag(flags.C, c);
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};
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/* LAS = RD & SP -> A, X, S */
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las = (readFn: ReadFn) => {
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const val = this.sp & readFn();
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this.sp = val;
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this.xr = val;
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this.ar = this.testNZ(val);
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};
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/* SKB/SKW */
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skp = (readFn: ReadFn) => {
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readFn();
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};
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/* HLT */
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hlt = (_impliedFn: ImpliedFn) => {
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this.readByte(this.pc);
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this.readByte(this.pc);
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// PC shouldn't have advanced
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this.pc = (--this.pc) & 0xffff;
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this.stop = true;
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};
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private unknown(b: byte) {
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let unk: StrictInstruction;
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if (this.is65C02) {
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// Default behavior is a 1 cycle NOP
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unk = {
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name: 'NOP',
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op: this.nop,
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modeFn: this.implied,
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modeFn: this.readNopImplied,
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mode: 'implied',
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};
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} else {
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const cpu = this;
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unk = {
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name: '???',
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op: function (_impliedFn: ImpliedFn) {
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debug('Unknown OpCode: ' + toHex(b) +
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' at ' + toHex(cpu.pc - 1, 4));
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},
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modeFn: this.implied,
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mode: 'implied'
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};
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// All 6502 Instructions should be defined
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throw new Error(`Missing ${toHex(b)}`);
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}
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return unk;
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}
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public step(cb?: callback) {
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this.sync = true;
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this.op = this.opary[this.readBytePC()];
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@ -1145,6 +1425,8 @@ export default class CPU6502 {
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this.yr = 0;
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this.xr = 0;
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this.pc = this.readWord(loc.RESET);
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this.wait = false;
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this.stop = false;
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for (let idx = 0; idx < this.resetHandlers.length; idx++) {
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this.resetHandlers[idx].reset();
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@ -1161,6 +1443,7 @@ export default class CPU6502 {
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}
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this.setFlag(flags.I, true);
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this.pc = this.readWord(loc.BRK);
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this.wait = false;
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}
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}
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@ -1173,6 +1456,7 @@ export default class CPU6502 {
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}
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this.setFlag(flags.I, true);
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this.pc = this.readWord(loc.NMI);
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this.wait = false;
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}
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public getPC() {
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@ -1207,6 +1491,14 @@ export default class CPU6502 {
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return this.sync;
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}
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public getStop() {
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return this.stop;
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}
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public getWait() {
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return this.wait;
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}
|
||||
|
||||
public getCycles() {
|
||||
return this.cycles;
|
||||
}
|
||||
|
|
@ -1652,4 +1944,171 @@ export default class CPU6502 {
|
|||
0x04: { name: 'TSB', op: this.tsb, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0x0C: { name: 'TSB', op: this.tsb, modeFn: this.readAddrAbsolute, mode: 'absolute' }
|
||||
};
|
||||
|
||||
OPS_NMOS_6502: Instructions = {
|
||||
// ASO
|
||||
0x0F: { name: 'ASO', op: this.aso, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0x1F: { name: 'ASO', op: this.aso, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x1B: { name: 'ASO', op: this.aso, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0x07: { name: 'ASO', op: this.aso, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0x17: { name: 'ASO', op: this.aso, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0x03: { name: 'ASO', op: this.aso, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0x13: { name: 'ASO', op: this.aso, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// RLA
|
||||
0x2F: { name: 'RLA', op: this.rla, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0x3F: { name: 'RLA', op: this.rla, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x3B: { name: 'RLA', op: this.rla, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0x27: { name: 'RLA', op: this.rla, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0x37: { name: 'RLA', op: this.rla, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0x23: { name: 'RLA', op: this.rla, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0x33: { name: 'RLA', op: this.rla, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// LSE
|
||||
0x4F: { name: 'LSE', op: this.lse, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0x5F: { name: 'LSE', op: this.lse, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x5B: { name: 'LSE', op: this.lse, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0x47: { name: 'LSE', op: this.lse, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0x57: { name: 'LSE', op: this.lse, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0x43: { name: 'LSE', op: this.lse, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0x53: { name: 'LSE', op: this.lse, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// RRA
|
||||
0x6F: { name: 'RRA', op: this.rra, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0x7F: { name: 'RRA', op: this.rra, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x7B: { name: 'RRA', op: this.rra, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0x67: { name: 'RRA', op: this.rra, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0x77: { name: 'RRA', op: this.rra, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0x63: { name: 'RRA', op: this.rra, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0x73: { name: 'RRA', op: this.rra, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// AXS
|
||||
0x8F: { name: 'AXS', op: this.axs, modeFn: this.writeAbsolute, mode: 'absolute'},
|
||||
0x87: { name: 'AXS', op: this.axs, modeFn: this.writeZeroPage, mode: 'zeroPage'},
|
||||
0x97: { name: 'AXS', op: this.axs, modeFn: this.writeZeroPageY, mode: 'zeroPageY'},
|
||||
0x83: { name: 'AXS', op: this.axs, modeFn: this.writeZeroPageXIndirect, mode: 'zeroPageXIndirect'},
|
||||
|
||||
// LAX
|
||||
0xAF: { name: 'LAX', op: this.lax, modeFn: this.readAbsolute, mode: 'absolute'},
|
||||
0xBF: { name: 'LAX', op: this.lax, modeFn: this.readAbsoluteY, mode: 'absoluteY'},
|
||||
0xA7: { name: 'LAX', op: this.lax, modeFn: this.readZeroPage, mode: 'zeroPage'},
|
||||
0xB7: { name: 'LAX', op: this.lax, modeFn: this.readZeroPageY, mode: 'zeroPageY'},
|
||||
0xA3: { name: 'LAX', op: this.lax, modeFn: this.readZeroPageXIndirect, mode: 'zeroPageXIndirect'},
|
||||
0xB3: { name: 'LAX', op: this.lax, modeFn: this.readZeroPageIndirectY, mode: 'zeroPageIndirectY'},
|
||||
|
||||
// DCM
|
||||
0xCF: { name: 'DCM', op: this.dcm, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0xDF: { name: 'DCM', op: this.dcm, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0xDB: { name: 'DCM', op: this.dcm, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0xC7: { name: 'DCM', op: this.dcm, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0xD7: { name: 'DCM', op: this.dcm, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0xC3: { name: 'DCM', op: this.dcm, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0xD3: { name: 'DCM', op: this.dcm, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// INS
|
||||
0xEF: { name: 'INS', op: this.ins, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0xFF: { name: 'INS', op: this.ins, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0xFB: { name: 'INS', op: this.ins, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY' },
|
||||
0xE7: { name: 'INS', op: this.ins, modeFn: this.readAddrZeroPage, mode: 'zeroPage' },
|
||||
0xF7: { name: 'INS', op: this.ins, modeFn: this.readAddrZeroPageX, mode: 'zeroPageX' },
|
||||
0xE3: { name: 'INS', op: this.ins, modeFn: this.readAddrZeroPageXIndirect, mode: 'zeroPageXIndirect' },
|
||||
0xF3: { name: 'INS', op: this.ins, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY' },
|
||||
|
||||
// ALR
|
||||
0x4B: { name: 'ALR', op: this.alr, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// ARR
|
||||
0x6B: { name: 'ARR', op: this.arr, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// XAA
|
||||
0x8B: { name: 'XAA', op: this.xaa, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// OAL
|
||||
0xAB: { name: 'OAL', op: this.oal, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// SAX
|
||||
0xCB: { name: 'SAX', op: this.sax, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// NOP
|
||||
0x1a: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0x3a: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0x5a: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0x7a: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0xda: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0xfa: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
|
||||
// SKB
|
||||
0x80: { name: 'SKB', op: this.skp, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0x82: { name: 'SKB', op: this.skp, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0x89: { name: 'SKB', op: this.skp, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0xC2: { name: 'SKB', op: this.skp, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0xE2: { name: 'SKB', op: this.skp, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0x04: { name: 'SKB', op: this.skp, modeFn: this.readZeroPage, mode: 'zeroPage' },
|
||||
0x14: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
0x34: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
0x44: { name: 'SKB', op: this.skp, modeFn: this.readZeroPage, mode: 'zeroPage' },
|
||||
0x54: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
0x64: { name: 'SKB', op: this.skp, modeFn: this.readZeroPage, mode: 'zeroPage' },
|
||||
0x74: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
0xD4: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
0xF4: { name: 'SKB', op: this.skp, modeFn: this.readZeroPageX, mode: 'zeroPageX' },
|
||||
|
||||
// SKW
|
||||
0x0C: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsolute, mode: 'absolute' },
|
||||
0x1C: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x3C: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x5C: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0x7C: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0xDC: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
0xFC: { name: 'SKW', op: this.skp, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX' },
|
||||
|
||||
// HLT
|
||||
0x02: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x12: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x22: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x32: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x42: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x52: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x62: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x72: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0x92: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0xB2: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0xD2: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
0xF2: { name: 'HLT', op: this.hlt, modeFn: this.readNopImplied, mode: 'implied' },
|
||||
|
||||
// TAS
|
||||
0x9B: { name: 'TAS', op: this.tas, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY'},
|
||||
|
||||
// SAY
|
||||
0x9C: { name: 'SAY', op: this.say, modeFn: this.readAddrAbsoluteX, mode: 'absoluteX'},
|
||||
|
||||
// XAS
|
||||
0x9E: { name: 'XAS', op: this.xas, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY'},
|
||||
|
||||
// AXA
|
||||
0x9F: { name: 'AXA', op: this.axa, modeFn: this.readAddrAbsoluteY, mode: 'absoluteY'},
|
||||
0x93: { name: 'AXA', op: this.axa, modeFn: this.readAddrZeroPageIndirectY, mode: 'zeroPageIndirectY'},
|
||||
|
||||
// ANC
|
||||
0x2b: { name: 'ANC', op: this.anc, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
0x0b: { name: 'ANC', op: this.anc, modeFn: this.readImmediate, mode: 'immediate' },
|
||||
|
||||
// LAS
|
||||
0xBB: { name: 'LAS', op: this.las, modeFn: this.readAbsoluteY, mode: 'absoluteY'},
|
||||
|
||||
// SBC
|
||||
0xEB: { name: 'SBC', op: this.sbc, modeFn: this.readImmediate, mode: 'immediate'}
|
||||
};
|
||||
|
||||
OPS_ROCKWELL_65C02: Instructions = {
|
||||
0xCB: { name: 'NOP', op: this.nop, modeFn: this.implied, mode: 'implied' },
|
||||
0xDB: { name: 'NOP', op: this.nop, modeFn: this.readZeroPageX, mode: 'immediate' },
|
||||
};
|
||||
|
||||
/* WDC 65C02 Instructions */
|
||||
|
||||
OPS_WDC_65C02: Instructions = {
|
||||
0xCB: { name: 'WAI', op: this.wai, modeFn: this.implied, mode: 'implied' },
|
||||
0xDB: { name: 'STP', op: this.stp, modeFn: this.implied, mode: 'implied' }
|
||||
};
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
|
||||
import fs from 'fs';
|
||||
|
||||
import CPU6502 from 'js/cpu6502';
|
||||
import CPU6502, { FLAVOR_ROCKWELL_65C02, FLAVOR_WDC_65C02 } from 'js/cpu6502';
|
||||
import { toHex } from 'js/util';
|
||||
import type { byte, word } from 'js/types';
|
||||
|
||||
|
|
@ -158,28 +158,56 @@ const maxTests = 16;
|
|||
|
||||
if (testPath) {
|
||||
const testPath6502 = `${testPath}/6502/v1/`;
|
||||
const testPath65C02 = `${testPath}/wdc65c02/v1/`;
|
||||
const testPathWDC65C02 = `${testPath}/wdc65c02/v1/`;
|
||||
const testPathRW65C02 = `${testPath}/rockwell65c02/v1/`;
|
||||
|
||||
const opAry6502: OpTest[] = [];
|
||||
const opAry65C02: OpTest[] = [];
|
||||
const opAryRW65C02: OpTest[] = [];
|
||||
const opAryWDC65C02: OpTest[] = [];
|
||||
|
||||
const buildOpArrays = () => {
|
||||
const cpu = new CPU6502();
|
||||
|
||||
// Grab the implemented op codes
|
||||
// TODO: Decide which undocumented opcodes are worthwhile.
|
||||
for (const op in cpu.OPS_6502) {
|
||||
const { name, mode } = cpu.OPS_6502[op];
|
||||
const test = { op: toHex(+op), name, mode };
|
||||
opAry6502.push(test);
|
||||
opAry65C02.push(test);
|
||||
opAryRW65C02.push(test);
|
||||
opAryWDC65C02.push(test);
|
||||
}
|
||||
|
||||
for (const op in cpu.OPS_NMOS_6502) {
|
||||
const { name, mode } = cpu.OPS_NMOS_6502[op];
|
||||
const test = { op: toHex(+op), name, mode };
|
||||
opAry6502.push(test);
|
||||
}
|
||||
|
||||
for (const op in cpu.OPS_65C02) {
|
||||
const { name, mode } = cpu.OPS_65C02[op];
|
||||
const test = { op: toHex(+op), name, mode };
|
||||
opAry65C02.push(test);
|
||||
opAryRW65C02.push(test);
|
||||
opAryWDC65C02.push(test);
|
||||
}
|
||||
|
||||
// WDC 65C02 NOPs
|
||||
[
|
||||
'03', '0b', '13', '1b', '23', '2b', '33', '3b',
|
||||
'43', '4b', '53', '5b', '63', '6b', '73', '7b',
|
||||
'83', '8b', '93', '9b', 'a3', 'ab', 'b3', 'bb',
|
||||
'c3', 'd3', 'e3', 'eb', 'f3', 'fb'
|
||||
].forEach((op) =>
|
||||
opAryWDC65C02.push({ op, name: 'nop', mode: 'implied'})
|
||||
);
|
||||
|
||||
// Rockwell 65C02 NOPs
|
||||
[
|
||||
'03', '0b', '13', '1b', '23', '2b', '33', '3b',
|
||||
'43', '4b', '53', '5b', '63', '6b', '73', '7b',
|
||||
'83', '8b', '93', '9b', 'a3', 'ab', 'b3', 'bb',
|
||||
'c3', 'cb', 'd3', 'db', 'e3', 'eb', 'f3', 'fb'
|
||||
].forEach((op) =>
|
||||
opAryRW65C02.push({ op, name: 'nop', mode: 'implied'})
|
||||
);
|
||||
};
|
||||
|
||||
buildOpArrays();
|
||||
|
|
@ -188,7 +216,7 @@ if (testPath) {
|
|||
let cpu: CPU6502;
|
||||
let memory: TestMemory;
|
||||
|
||||
describe('6502', function() {
|
||||
describe('NMOS 6502', function() {
|
||||
beforeAll(function() {
|
||||
cpu = new CPU6502();
|
||||
memory = new TestMemory(256);
|
||||
|
|
@ -209,15 +237,36 @@ if (testPath) {
|
|||
});
|
||||
});
|
||||
|
||||
describe('WDC 65C02', function() {
|
||||
describe('Rockwell 65C02', function() {
|
||||
beforeAll(function() {
|
||||
cpu = new CPU6502({ '65C02': true });
|
||||
cpu = new CPU6502({ flavor: FLAVOR_ROCKWELL_65C02 });
|
||||
memory = new TestMemory(256);
|
||||
cpu.addPageHandler(memory);
|
||||
});
|
||||
|
||||
describe.each(opAry65C02)('Test op $op $name $mode', ({op}) => {
|
||||
const data = fs.readFileSync(`${testPath65C02}${op}.json`, 'utf-8');
|
||||
describe.each(opAryRW65C02)('Test op $op $name $mode', ({op}) => {
|
||||
const data = fs.readFileSync(`${testPathRW65C02}${op}.json`, 'utf-8');
|
||||
const tests = JSON.parse(data) as Test[];
|
||||
|
||||
it.each(tests.slice(0, maxTests))('Test $name', (test) => {
|
||||
initState(cpu, test.initial);
|
||||
memory.logStart();
|
||||
cpu.step();
|
||||
memory.logStop();
|
||||
expectState(cpu, memory, test);
|
||||
});
|
||||
});
|
||||
});
|
||||
|
||||
describe('WDC 65C02', function() {
|
||||
beforeAll(function() {
|
||||
cpu = new CPU6502({ flavor: FLAVOR_WDC_65C02 });
|
||||
memory = new TestMemory(256);
|
||||
cpu.addPageHandler(memory);
|
||||
});
|
||||
|
||||
describe.each(opAryWDC65C02)('Test op $op $name $mode', ({op}) => {
|
||||
const data = fs.readFileSync(`${testPathWDC65C02}${op}.json`, 'utf-8');
|
||||
const tests = JSON.parse(data) as Test[];
|
||||
|
||||
it.each(tests.slice(0, maxTests))('Test $name', (test) => {
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
import CPU6502 from '../js/cpu6502';
|
||||
import CPU6502, { FLAVOR_ROCKWELL_65C02 } from '../js/cpu6502';
|
||||
// From https://github.com/Klaus2m5/6502_65C02_functional_tests
|
||||
import Test6502 from './roms/6502test';
|
||||
import Test65C02 from './roms/65C02test';
|
||||
|
|
@ -33,7 +33,7 @@ describe('CPU', function () {
|
|||
|
||||
describe('65C02', function () {
|
||||
it('completes the test ROM', function () {
|
||||
cpu = new CPU6502({'65C02': true});
|
||||
cpu = new CPU6502({ flavor: FLAVOR_ROCKWELL_65C02 });
|
||||
const test = new Test65C02();
|
||||
cpu.addPageHandler(test);
|
||||
cpu.setPC(0x400);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,8 @@
|
|||
import CPU6502, { CpuState, flags } from '../js/cpu6502';
|
||||
import CPU6502, {
|
||||
CpuState,
|
||||
FLAVOR_ROCKWELL_65C02,
|
||||
flags
|
||||
} from '../js/cpu6502';
|
||||
import { TestMemory } from './util/memory';
|
||||
import { bios, Program } from './util/bios';
|
||||
import { toReadableState } from './util/cpu';
|
||||
|
|
@ -277,14 +281,6 @@ describe('CPU6502', function() {
|
|||
pc: 0x1234
|
||||
});
|
||||
});
|
||||
|
||||
it('should log unimplemented opcodes', () => {
|
||||
jest.spyOn(console, 'log').mockImplementation();
|
||||
testCode([0xFF], 1, {}, {
|
||||
cycles: 1
|
||||
});
|
||||
expect(console.log).toHaveBeenLastCalledWith('Unknown OpCode: FF at 0400');
|
||||
});
|
||||
});
|
||||
|
||||
describe('#registers', function() {
|
||||
|
|
@ -1542,7 +1538,7 @@ describe('CPU6502', function() {
|
|||
|
||||
describe('65c02', function() {
|
||||
beforeEach(function() {
|
||||
cpu = new CPU6502({'65C02': true});
|
||||
cpu = new CPU6502({ flavor: FLAVOR_ROCKWELL_65C02 });
|
||||
memory = new TestMemory(4);
|
||||
|
||||
cpu.addPageHandler(memory);
|
||||
|
|
|
|||
Loading…
Reference in New Issue