disassemble show instruction bytes
This commit is contained in:
Greg Hewgill
parent
29b1342a47
commit
0b86a8693f
314
cpu6502.py
314
cpu6502.py
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@ -118,157 +118,157 @@ class Disassemble:
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def setup_ops(self):
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self.ops = [None] * 0x100
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self.ops[0x00] = ("BRK", )
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self.ops[0x01] = ("ORA", self.indirect_x_mode)
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self.ops[0x05] = ("ORA", self.zero_page_mode)
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self.ops[0x06] = ("ASL", self.zero_page_mode)
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self.ops[0x08] = ("PHP", )
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self.ops[0x09] = ("ORA", self.immediate_mode)
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self.ops[0x0A] = ("ASL", )
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self.ops[0x0D] = ("ORA", self.absolute_mode)
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self.ops[0x0E] = ("ASL", self.absolute_mode)
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self.ops[0x10] = ("BPL", self.relative_mode)
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self.ops[0x11] = ("ORA", self.indirect_y_mode)
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self.ops[0x15] = ("ORA", self.zero_page_x_mode)
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self.ops[0x16] = ("ASL", self.zero_page_x_mode)
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self.ops[0x18] = ("CLC", )
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self.ops[0x19] = ("ORA", self.absolute_y_mode)
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self.ops[0x1D] = ("ORA", self.absolute_x_mode)
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self.ops[0x1E] = ("ASL", self.absolute_x_mode)
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self.ops[0x20] = ("JSR", self.absolute_mode)
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self.ops[0x21] = ("AND", self.indirect_x_mode)
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self.ops[0x24] = ("BIT", self.zero_page_mode)
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self.ops[0x25] = ("AND", self.zero_page_mode)
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self.ops[0x26] = ("ROL", self.zero_page_mode)
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self.ops[0x28] = ("PLP", )
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self.ops[0x29] = ("AND", self.immediate_mode)
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self.ops[0x2A] = ("ROL", )
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self.ops[0x2C] = ("BIT", self.absolute_mode)
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self.ops[0x2D] = ("AND", self.absolute_mode)
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self.ops[0x2E] = ("ROL", self.absolute_mode)
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self.ops[0x30] = ("BMI", self.relative_mode)
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self.ops[0x31] = ("AND", self.indirect_y_mode)
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self.ops[0x35] = ("AND", self.zero_page_x_mode)
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self.ops[0x36] = ("ROL", self.zero_page_x_mode)
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self.ops[0x38] = ("SEC", )
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self.ops[0x39] = ("AND", self.absolute_y_mode)
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self.ops[0x3D] = ("AND", self.absolute_x_mode)
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self.ops[0x3E] = ("ROL", self.absolute_x_mode)
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self.ops[0x40] = ("RTI", )
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self.ops[0x41] = ("EOR", self.indirect_x_mode)
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self.ops[0x45] = ("EOR", self.zero_page_mode)
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self.ops[0x46] = ("LSR", self.zero_page_mode)
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self.ops[0x48] = ("PHA", )
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self.ops[0x49] = ("EOR", self.immediate_mode)
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self.ops[0x4A] = ("LSR", )
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self.ops[0x4C] = ("JMP", self.absolute_mode)
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self.ops[0x4D] = ("EOR", self.absolute_mode)
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self.ops[0x4E] = ("LSR", self.absolute_mode)
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self.ops[0x50] = ("BVC", self.relative_mode)
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self.ops[0x51] = ("EOR", self.indirect_y_mode)
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self.ops[0x55] = ("EOR", self.zero_page_x_mode)
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self.ops[0x56] = ("LSR", self.zero_page_x_mode)
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self.ops[0x58] = ("CLI", )
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self.ops[0x59] = ("EOR", self.absolute_y_mode)
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self.ops[0x5D] = ("EOR", self.absolute_x_mode)
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self.ops[0x5E] = ("LSR", self.absolute_x_mode)
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self.ops[0x60] = ("RTS", )
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self.ops[0x61] = ("ADC", self.indirect_x_mode)
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self.ops[0x65] = ("ADC", self.zero_page_mode)
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self.ops[0x66] = ("ROR", self.zero_page_mode)
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self.ops[0x68] = ("PLA", )
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self.ops[0x69] = ("ADC", self.immediate_mode)
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self.ops[0x6A] = ("ROR", )
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self.ops[0x6C] = ("JMP", self.indirect_mode)
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self.ops[0x6D] = ("ADC", self.absolute_mode)
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self.ops[0x6E] = ("ROR", self.absolute_mode)
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self.ops[0x70] = ("BVS", self.relative_mode)
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self.ops[0x71] = ("ADC", self.indirect_y_mode)
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self.ops[0x75] = ("ADC", self.zero_page_x_mode)
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self.ops[0x76] = ("ROR", self.zero_page_x_mode)
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self.ops[0x78] = ("SEI", )
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self.ops[0x79] = ("ADC", self.absolute_y_mode)
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self.ops[0x7D] = ("ADC", self.absolute_x_mode)
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self.ops[0x7E] = ("ROR", self.absolute_x_mode)
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self.ops[0x81] = ("STA", self.indirect_x_mode)
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self.ops[0x84] = ("STY", self.zero_page_mode)
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self.ops[0x85] = ("STA", self.zero_page_mode)
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self.ops[0x86] = ("STX", self.zero_page_mode)
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self.ops[0x88] = ("DEY", )
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self.ops[0x8A] = ("TXA", )
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self.ops[0x8C] = ("STY", self.absolute_mode)
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self.ops[0x8D] = ("STA", self.absolute_mode)
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self.ops[0x8E] = ("STX", self.absolute_mode)
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self.ops[0x90] = ("BCC", self.relative_mode)
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self.ops[0x91] = ("STA", self.indirect_y_mode)
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self.ops[0x94] = ("STY", self.zero_page_x_mode)
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self.ops[0x95] = ("STA", self.zero_page_x_mode)
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self.ops[0x96] = ("STX", self.zero_page_y_mode)
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self.ops[0x98] = ("TYA", )
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self.ops[0x99] = ("STA", self.absolute_y_mode)
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self.ops[0x9A] = ("TXS", )
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self.ops[0x9D] = ("STA", self.absolute_x_mode)
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self.ops[0xA0] = ("LDY", self.immediate_mode)
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self.ops[0xA1] = ("LDA", self.indirect_x_mode)
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self.ops[0xA2] = ("LDX", self.immediate_mode)
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self.ops[0xA4] = ("LDY", self.zero_page_mode)
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self.ops[0xA5] = ("LDA", self.zero_page_mode)
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self.ops[0xA6] = ("LDX", self.zero_page_mode)
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self.ops[0xA8] = ("TAY", )
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self.ops[0xA9] = ("LDA", self.immediate_mode)
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self.ops[0xAA] = ("TAX", )
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self.ops[0xAC] = ("LDY", self.absolute_mode)
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self.ops[0xAD] = ("LDA", self.absolute_mode)
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self.ops[0xAE] = ("LDX", self.absolute_mode)
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self.ops[0xB0] = ("BCS", self.relative_mode)
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self.ops[0xB1] = ("LDA", self.indirect_y_mode)
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self.ops[0xB4] = ("LDY", self.zero_page_x_mode)
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self.ops[0xB5] = ("LDA", self.zero_page_x_mode)
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self.ops[0xB6] = ("LDX", self.zero_page_y_mode)
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self.ops[0xB8] = ("CLV", )
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self.ops[0xB9] = ("LDA", self.absolute_y_mode)
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self.ops[0xBA] = ("TSX", )
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self.ops[0xBC] = ("LDY", self.absolute_x_mode)
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self.ops[0xBD] = ("LDA", self.absolute_x_mode)
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self.ops[0xBE] = ("LDX", self.absolute_y_mode)
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self.ops[0xC0] = ("CPY", self.immediate_mode)
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self.ops[0xC1] = ("CMP", self.indirect_x_mode)
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self.ops[0xC4] = ("CPY", self.zero_page_mode)
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self.ops[0xC5] = ("CMP", self.zero_page_mode)
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self.ops[0xC6] = ("DEC", self.zero_page_mode)
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self.ops[0xC8] = ("INY", )
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self.ops[0xC9] = ("CMP", self.immediate_mode)
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self.ops[0xCA] = ("DEX", )
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self.ops[0xCC] = ("CPY", self.absolute_mode)
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self.ops[0xCD] = ("CMP", self.absolute_mode)
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self.ops[0xCE] = ("DEC", self.absolute_mode)
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self.ops[0xD0] = ("BNE", self.relative_mode)
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self.ops[0xD1] = ("CMP", self.indirect_y_mode)
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self.ops[0xD5] = ("CMP", self.zero_page_x_mode)
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self.ops[0xD6] = ("DEC", self.zero_page_x_mode)
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self.ops[0xD8] = ("CLD", )
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self.ops[0xD9] = ("CMP", self.absolute_y_mode)
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self.ops[0xDD] = ("CMP", self.absolute_x_mode)
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self.ops[0xDE] = ("DEC", self.absolute_x_mode)
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self.ops[0xE0] = ("CPX", self.immediate_mode)
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self.ops[0xE1] = ("SBC", self.indirect_x_mode)
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self.ops[0xE4] = ("CPX", self.zero_page_mode)
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self.ops[0xE5] = ("SBC", self.zero_page_mode)
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self.ops[0xE6] = ("INC", self.zero_page_mode)
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self.ops[0xE8] = ("INX", )
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self.ops[0xE9] = ("SBC", self.immediate_mode)
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self.ops[0xEA] = ("NOP", )
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self.ops[0xEC] = ("CPX", self.absolute_mode)
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self.ops[0xED] = ("SBC", self.absolute_mode)
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self.ops[0xEE] = ("INC", self.absolute_mode)
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self.ops[0xF0] = ("BEQ", self.relative_mode)
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self.ops[0xF1] = ("SBC", self.indirect_y_mode)
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self.ops[0xF5] = ("SBC", self.zero_page_x_mode)
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self.ops[0xF6] = ("INC", self.zero_page_x_mode)
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self.ops[0xF8] = ("SED", )
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self.ops[0xF9] = ("SBC", self.absolute_y_mode)
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self.ops[0xFD] = ("SBC", self.absolute_x_mode)
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self.ops[0xFE] = ("INC", self.absolute_x_mode)
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self.ops[0x00] = (1, "BRK", )
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self.ops[0x01] = (2, "ORA", self.indirect_x_mode)
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self.ops[0x05] = (2, "ORA", self.zero_page_mode)
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self.ops[0x06] = (2, "ASL", self.zero_page_mode)
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self.ops[0x08] = (1, "PHP", )
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self.ops[0x09] = (2, "ORA", self.immediate_mode)
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self.ops[0x0A] = (1, "ASL", )
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self.ops[0x0D] = (3, "ORA", self.absolute_mode)
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self.ops[0x0E] = (3, "ASL", self.absolute_mode)
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self.ops[0x10] = (2, "BPL", self.relative_mode)
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self.ops[0x11] = (2, "ORA", self.indirect_y_mode)
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self.ops[0x15] = (2, "ORA", self.zero_page_x_mode)
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self.ops[0x16] = (2, "ASL", self.zero_page_x_mode)
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self.ops[0x18] = (1, "CLC", )
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self.ops[0x19] = (3, "ORA", self.absolute_y_mode)
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self.ops[0x1D] = (3, "ORA", self.absolute_x_mode)
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self.ops[0x1E] = (3, "ASL", self.absolute_x_mode)
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self.ops[0x20] = (3, "JSR", self.absolute_mode)
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self.ops[0x21] = (2, "AND", self.indirect_x_mode)
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self.ops[0x24] = (2, "BIT", self.zero_page_mode)
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self.ops[0x25] = (2, "AND", self.zero_page_mode)
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self.ops[0x26] = (2, "ROL", self.zero_page_mode)
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self.ops[0x28] = (1, "PLP", )
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self.ops[0x29] = (2, "AND", self.immediate_mode)
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self.ops[0x2A] = (1, "ROL", )
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self.ops[0x2C] = (3, "BIT", self.absolute_mode)
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self.ops[0x2D] = (3, "AND", self.absolute_mode)
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self.ops[0x2E] = (3, "ROL", self.absolute_mode)
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self.ops[0x30] = (2, "BMI", self.relative_mode)
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self.ops[0x31] = (2, "AND", self.indirect_y_mode)
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self.ops[0x35] = (2, "AND", self.zero_page_x_mode)
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self.ops[0x36] = (2, "ROL", self.zero_page_x_mode)
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self.ops[0x38] = (1, "SEC", )
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self.ops[0x39] = (3, "AND", self.absolute_y_mode)
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self.ops[0x3D] = (3, "AND", self.absolute_x_mode)
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self.ops[0x3E] = (3, "ROL", self.absolute_x_mode)
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self.ops[0x40] = (1, "RTI", )
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self.ops[0x41] = (2, "EOR", self.indirect_x_mode)
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self.ops[0x45] = (2, "EOR", self.zero_page_mode)
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self.ops[0x46] = (2, "LSR", self.zero_page_mode)
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self.ops[0x48] = (1, "PHA", )
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self.ops[0x49] = (2, "EOR", self.immediate_mode)
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self.ops[0x4A] = (1, "LSR", )
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self.ops[0x4C] = (3, "JMP", self.absolute_mode)
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self.ops[0x4D] = (3, "EOR", self.absolute_mode)
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self.ops[0x4E] = (3, "LSR", self.absolute_mode)
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self.ops[0x50] = (2, "BVC", self.relative_mode)
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self.ops[0x51] = (2, "EOR", self.indirect_y_mode)
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self.ops[0x55] = (2, "EOR", self.zero_page_x_mode)
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self.ops[0x56] = (2, "LSR", self.zero_page_x_mode)
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self.ops[0x58] = (1, "CLI", )
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self.ops[0x59] = (3, "EOR", self.absolute_y_mode)
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self.ops[0x5D] = (3, "EOR", self.absolute_x_mode)
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self.ops[0x5E] = (3, "LSR", self.absolute_x_mode)
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self.ops[0x60] = (1, "RTS", )
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self.ops[0x61] = (2, "ADC", self.indirect_x_mode)
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self.ops[0x65] = (2, "ADC", self.zero_page_mode)
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self.ops[0x66] = (2, "ROR", self.zero_page_mode)
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self.ops[0x68] = (1, "PLA", )
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self.ops[0x69] = (2, "ADC", self.immediate_mode)
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self.ops[0x6A] = (1, "ROR", )
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self.ops[0x6C] = (3, "JMP", self.indirect_mode)
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self.ops[0x6D] = (3, "ADC", self.absolute_mode)
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self.ops[0x6E] = (3, "ROR", self.absolute_mode)
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self.ops[0x70] = (2, "BVS", self.relative_mode)
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self.ops[0x71] = (2, "ADC", self.indirect_y_mode)
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self.ops[0x75] = (2, "ADC", self.zero_page_x_mode)
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self.ops[0x76] = (2, "ROR", self.zero_page_x_mode)
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self.ops[0x78] = (1, "SEI", )
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self.ops[0x79] = (3, "ADC", self.absolute_y_mode)
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self.ops[0x7D] = (3, "ADC", self.absolute_x_mode)
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self.ops[0x7E] = (3, "ROR", self.absolute_x_mode)
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self.ops[0x81] = (2, "STA", self.indirect_x_mode)
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self.ops[0x84] = (2, "STY", self.zero_page_mode)
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self.ops[0x85] = (2, "STA", self.zero_page_mode)
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self.ops[0x86] = (2, "STX", self.zero_page_mode)
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self.ops[0x88] = (1, "DEY", )
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self.ops[0x8A] = (1, "TXA", )
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self.ops[0x8C] = (3, "STY", self.absolute_mode)
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self.ops[0x8D] = (3, "STA", self.absolute_mode)
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self.ops[0x8E] = (3, "STX", self.absolute_mode)
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self.ops[0x90] = (2, "BCC", self.relative_mode)
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self.ops[0x91] = (2, "STA", self.indirect_y_mode)
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self.ops[0x94] = (2, "STY", self.zero_page_x_mode)
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self.ops[0x95] = (2, "STA", self.zero_page_x_mode)
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self.ops[0x96] = (2, "STX", self.zero_page_y_mode)
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self.ops[0x98] = (1, "TYA", )
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self.ops[0x99] = (3, "STA", self.absolute_y_mode)
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self.ops[0x9A] = (1, "TXS", )
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self.ops[0x9D] = (3, "STA", self.absolute_x_mode)
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self.ops[0xA0] = (2, "LDY", self.immediate_mode)
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self.ops[0xA1] = (2, "LDA", self.indirect_x_mode)
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self.ops[0xA2] = (2, "LDX", self.immediate_mode)
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self.ops[0xA4] = (2, "LDY", self.zero_page_mode)
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self.ops[0xA5] = (2, "LDA", self.zero_page_mode)
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self.ops[0xA6] = (2, "LDX", self.zero_page_mode)
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self.ops[0xA8] = (1, "TAY", )
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self.ops[0xA9] = (2, "LDA", self.immediate_mode)
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self.ops[0xAA] = (1, "TAX", )
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self.ops[0xAC] = (3, "LDY", self.absolute_mode)
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self.ops[0xAD] = (3, "LDA", self.absolute_mode)
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self.ops[0xAE] = (3, "LDX", self.absolute_mode)
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self.ops[0xB0] = (2, "BCS", self.relative_mode)
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self.ops[0xB1] = (2, "LDA", self.indirect_y_mode)
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self.ops[0xB4] = (2, "LDY", self.zero_page_x_mode)
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self.ops[0xB5] = (2, "LDA", self.zero_page_x_mode)
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self.ops[0xB6] = (2, "LDX", self.zero_page_y_mode)
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self.ops[0xB8] = (1, "CLV", )
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self.ops[0xB9] = (3, "LDA", self.absolute_y_mode)
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self.ops[0xBA] = (1, "TSX", )
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self.ops[0xBC] = (3, "LDY", self.absolute_x_mode)
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self.ops[0xBD] = (3, "LDA", self.absolute_x_mode)
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self.ops[0xBE] = (3, "LDX", self.absolute_y_mode)
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self.ops[0xC0] = (2, "CPY", self.immediate_mode)
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self.ops[0xC1] = (2, "CMP", self.indirect_x_mode)
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self.ops[0xC4] = (2, "CPY", self.zero_page_mode)
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self.ops[0xC5] = (2, "CMP", self.zero_page_mode)
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self.ops[0xC6] = (2, "DEC", self.zero_page_mode)
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self.ops[0xC8] = (1, "INY", )
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self.ops[0xC9] = (2, "CMP", self.immediate_mode)
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self.ops[0xCA] = (1, "DEX", )
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self.ops[0xCC] = (3, "CPY", self.absolute_mode)
|
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self.ops[0xCD] = (3, "CMP", self.absolute_mode)
|
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self.ops[0xCE] = (3, "DEC", self.absolute_mode)
|
||||
self.ops[0xD0] = (2, "BNE", self.relative_mode)
|
||||
self.ops[0xD1] = (2, "CMP", self.indirect_y_mode)
|
||||
self.ops[0xD5] = (2, "CMP", self.zero_page_x_mode)
|
||||
self.ops[0xD6] = (2, "DEC", self.zero_page_x_mode)
|
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self.ops[0xD8] = (1, "CLD", )
|
||||
self.ops[0xD9] = (3, "CMP", self.absolute_y_mode)
|
||||
self.ops[0xDD] = (3, "CMP", self.absolute_x_mode)
|
||||
self.ops[0xDE] = (3, "DEC", self.absolute_x_mode)
|
||||
self.ops[0xE0] = (2, "CPX", self.immediate_mode)
|
||||
self.ops[0xE1] = (2, "SBC", self.indirect_x_mode)
|
||||
self.ops[0xE4] = (2, "CPX", self.zero_page_mode)
|
||||
self.ops[0xE5] = (2, "SBC", self.zero_page_mode)
|
||||
self.ops[0xE6] = (2, "INC", self.zero_page_mode)
|
||||
self.ops[0xE8] = (1, "INX", )
|
||||
self.ops[0xE9] = (2, "SBC", self.immediate_mode)
|
||||
self.ops[0xEA] = (1, "NOP", )
|
||||
self.ops[0xEC] = (3, "CPX", self.absolute_mode)
|
||||
self.ops[0xED] = (3, "SBC", self.absolute_mode)
|
||||
self.ops[0xEE] = (3, "INC", self.absolute_mode)
|
||||
self.ops[0xF0] = (2, "BEQ", self.relative_mode)
|
||||
self.ops[0xF1] = (2, "SBC", self.indirect_y_mode)
|
||||
self.ops[0xF5] = (2, "SBC", self.zero_page_x_mode)
|
||||
self.ops[0xF6] = (2, "INC", self.zero_page_x_mode)
|
||||
self.ops[0xF8] = (1, "SED", )
|
||||
self.ops[0xF9] = (3, "SBC", self.absolute_y_mode)
|
||||
self.ops[0xFD] = (3, "SBC", self.absolute_x_mode)
|
||||
self.ops[0xFE] = (3, "INC", self.absolute_x_mode)
|
||||
|
||||
def absolute_mode(self, pc):
|
||||
a = self.cpu.read_word(pc + 1)
|
||||
|
|
@ -321,9 +321,15 @@ class Disassemble:
|
|||
def disasm(self, pc):
|
||||
op = self.cpu.read_byte(pc)
|
||||
info = self.ops[op]
|
||||
s = "%04X %s" % (pc, info[0])
|
||||
if len(info) > 1:
|
||||
s += " " + info[1](pc)
|
||||
s = "%04X " % (pc)
|
||||
for i in range(3):
|
||||
if i < info[0]:
|
||||
s += "%02X " % self.cpu.read_byte(pc + i)
|
||||
else:
|
||||
s += " "
|
||||
s += " %s" % (info[1])
|
||||
if len(info) > 2:
|
||||
s += " " + info[2](pc)
|
||||
return s
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue