implemented cycle calculation (except for page boundary crossing)
This commit is contained in:
James Tauber
parent
1159cef81c
commit
a92dcfecd3
65
applepy.py
65
applepy.py
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@ -583,6 +583,8 @@ class CPU:
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self.stack_pointer = 0xFF
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self.cycles = 0
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self.setup_ops()
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self.reset()
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@ -604,7 +606,7 @@ class CPU:
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self.ops[0x18] = lambda: self.CLC()
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self.ops[0x19] = lambda: self.ORA(self.absolute_y_mode())
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self.ops[0x1D] = lambda: self.ORA(self.absolute_x_mode())
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self.ops[0x1E] = lambda: self.ASL(self.absolute_x_mode())
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self.ops[0x1E] = lambda: self.ASL(self.absolute_x_mode(rmw=True))
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self.ops[0x20] = lambda: self.JSR(self.absolute_mode())
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self.ops[0x21] = lambda: self.AND(self.indirect_x_mode())
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self.ops[0x24] = lambda: self.BIT(self.zero_page_mode())
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@ -623,7 +625,7 @@ class CPU:
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self.ops[0x38] = lambda: self.SEC()
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self.ops[0x39] = lambda: self.AND(self.absolute_y_mode())
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self.ops[0x3D] = lambda: self.AND(self.absolute_x_mode())
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self.ops[0x3E] = lambda: self.ROL(self.absolute_x_mode())
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self.ops[0x3E] = lambda: self.ROL(self.absolute_x_mode(rmw=True))
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self.ops[0x40] = lambda: self.RTI()
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self.ops[0x41] = lambda: self.EOR(self.indirect_x_mode())
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self.ops[0x45] = lambda: self.EOR(self.zero_page_mode())
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@ -641,7 +643,7 @@ class CPU:
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self.ops[0x58] = lambda: self.CLI()
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self.ops[0x59] = lambda: self.EOR(self.absolute_y_mode())
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self.ops[0x5D] = lambda: self.EOR(self.absolute_x_mode())
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self.ops[0x5E] = lambda: self.LSR(self.absolute_x_mode())
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self.ops[0x5E] = lambda: self.LSR(self.absolute_x_mode(rmw=True))
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self.ops[0x60] = lambda: self.RTS()
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self.ops[0x61] = lambda: self.ADC(self.indirect_x_mode())
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self.ops[0x65] = lambda: self.ADC(self.zero_page_mode())
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@ -659,7 +661,7 @@ class CPU:
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self.ops[0x78] = lambda: self.SEI()
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self.ops[0x79] = lambda: self.ADC(self.absolute_y_mode())
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self.ops[0x7D] = lambda: self.ADC(self.absolute_x_mode())
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self.ops[0x7E] = lambda: self.ROR(self.absolute_x_mode())
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self.ops[0x7E] = lambda: self.ROR(self.absolute_x_mode(rmw=True))
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self.ops[0x81] = lambda: self.STA(self.indirect_x_mode())
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self.ops[0x84] = lambda: self.STY(self.zero_page_mode())
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self.ops[0x85] = lambda: self.STA(self.zero_page_mode())
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@ -670,14 +672,14 @@ class CPU:
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self.ops[0x8D] = lambda: self.STA(self.absolute_mode())
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self.ops[0x8E] = lambda: self.STX(self.absolute_mode())
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self.ops[0x90] = lambda: self.BCC(self.relative_mode())
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self.ops[0x91] = lambda: self.STA(self.indirect_y_mode())
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self.ops[0x91] = lambda: self.STA(self.indirect_y_mode(rmw=True))
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self.ops[0x94] = lambda: self.STY(self.zero_page_x_mode())
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self.ops[0x95] = lambda: self.STA(self.zero_page_x_mode())
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self.ops[0x96] = lambda: self.STX(self.zero_page_y_mode())
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self.ops[0x98] = lambda: self.TYA()
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self.ops[0x99] = lambda: self.STA(self.absolute_y_mode())
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self.ops[0x99] = lambda: self.STA(self.absolute_y_mode(rmw=True))
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self.ops[0x9A] = lambda: self.TXS()
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self.ops[0x9D] = lambda: self.STA(self.absolute_x_mode())
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self.ops[0x9D] = lambda: self.STA(self.absolute_x_mode(rmw=True))
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self.ops[0xA0] = lambda: self.LDY(self.immediate_mode())
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self.ops[0xA1] = lambda: self.LDA(self.indirect_x_mode())
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self.ops[0xA2] = lambda: self.LDX(self.immediate_mode())
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@ -719,7 +721,7 @@ class CPU:
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self.ops[0xD8] = lambda: self.CLD()
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self.ops[0xD9] = lambda: self.CMP(self.absolute_y_mode())
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self.ops[0xDD] = lambda: self.CMP(self.absolute_x_mode())
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self.ops[0xDE] = lambda: self.DEC(self.absolute_x_mode())
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self.ops[0xDE] = lambda: self.DEC(self.absolute_x_mode(rmw=True))
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self.ops[0xE0] = lambda: self.CPX(self.immediate_mode())
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self.ops[0xE1] = lambda: self.SBC(self.indirect_x_mode())
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self.ops[0xE4] = lambda: self.CPX(self.zero_page_mode())
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@ -738,7 +740,7 @@ class CPU:
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self.ops[0xF8] = lambda: self.SED()
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self.ops[0xF9] = lambda: self.SBC(self.absolute_y_mode())
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self.ops[0xFD] = lambda: self.SBC(self.absolute_x_mode())
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self.ops[0xFE] = lambda: self.INC(self.absolute_x_mode())
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self.ops[0xFE] = lambda: self.INC(self.absolute_x_mode(rmw=True))
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def reset(self):
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self.program_counter = self.memory.read_word(self.RESET_VECTOR)
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@ -747,6 +749,7 @@ class CPU:
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update_cycle = 0
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quit = False
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while not quit:
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self.cycles += 2 # all instructions take this as a minimum
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op = self.read_pc_byte()
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func = self.ops[op]
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if func is None:
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@ -776,6 +779,7 @@ class CPU:
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def test_run(self, start, end):
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self.program_counter = start
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while True:
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self.cycles += 2 # all instructions take this as a minimum
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if self.program_counter == end:
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break
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op = self.read_pc_byte()
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@ -841,30 +845,44 @@ class CPU:
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return self.get_pc()
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def absolute_mode(self):
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self.cycles += 2
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return self.read_pc_word()
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def absolute_x_mode(self):
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def absolute_x_mode(self, rmw=False):
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if rmw:
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self.cycles += 1
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return self.absolute_mode() + self.x_index
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def absolute_y_mode(self):
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def absolute_y_mode(self, rmw=False):
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if rmw:
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self.cycles += 1
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return self.absolute_mode() + self.y_index
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def zero_page_mode(self):
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self.cycles += 1
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return self.read_pc_byte()
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def zero_page_x_mode(self):
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self.cycles += 1
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return (self.zero_page_mode() + self.x_index) % 0x100
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def zero_page_y_mode(self):
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self.cycles += 1
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return (self.zero_page_mode() + self.y_index) % 0x100
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def indirect_mode(self):
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self.cycles += 2
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return self.memory.read_word_bug(self.absolute_mode())
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def indirect_x_mode(self):
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self.cycles += 4
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return self.memory.read_word_bug((self.read_pc_byte() + self.x_index) % 0x100)
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def indirect_y_mode(self):
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def indirect_y_mode(self, rmw=False):
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if rmw:
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self.cycles += 4
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else:
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self.cycles += 3
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return self.memory.read_word_bug(self.read_pc_byte()) + self.y_index
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def relative_mode(self):
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@ -931,6 +949,7 @@ class CPU:
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if operand_address is None:
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self.accumulator = self.update_nzc(self.accumulator << 1)
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else:
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self.cycles += 2
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self.memory.write_byte(operand_address, self.update_nzc(self.memory.read_byte(operand_address) << 1))
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def ROL(self, operand_address=None):
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@ -940,6 +959,7 @@ class CPU:
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a = a | 0x01
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self.accumulator = self.update_nzc(a)
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else:
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self.cycles += 2
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m = self.memory.read_byte(operand_address) << 1
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if self.carry_flag:
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m = m | 0x01
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@ -952,6 +972,7 @@ class CPU:
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self.carry_flag = self.accumulator % 2
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self.accumulator = self.update_nz(self.accumulator >> 1)
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else:
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self.cycles += 2
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m = self.memory.read_byte(operand_address)
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if self.carry_flag:
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m = m | 0x100
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@ -963,53 +984,65 @@ class CPU:
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self.carry_flag = self.accumulator % 2
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self.accumulator = self.update_nz(self.accumulator >> 1)
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else:
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self.cycles += 2
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self.carry_flag = self.memory.read_byte(operand_address) % 2
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self.memory.write_byte(operand_address, self.update_nz(self.memory.read_byte(operand_address) >> 1))
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# JUMPS / RETURNS
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def JMP(self, operand_address):
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self.cycles -= 1
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self.program_counter = operand_address
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def JSR(self, operand_address):
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self.cycles += 2
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self.push_word(self.program_counter - 1)
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self.program_counter = operand_address
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def RTS(self):
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self.cycles += 4
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self.program_counter = self.pull_word() + 1
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# BRANCHES
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def BCC(self, operand_address):
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if not self.carry_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BCS(self, operand_address):
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if self.carry_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BEQ(self, operand_address):
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if self.zero_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BNE(self, operand_address):
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if not self.zero_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BMI(self, operand_address):
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if self.sign_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BPL(self, operand_address):
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if not self.sign_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BVC(self, operand_address):
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if not self.overflow_flag:
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self.cycles += 1
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self.program_counter = operand_address
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def BVS(self, operand_address):
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if self.overflow_flag:
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self.cycles += 1
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self.program_counter = operand_address
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# SET / CLEAR FLAGS
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@ -1038,6 +1071,7 @@ class CPU:
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# INCREMENT / DECREMENT
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def DEC(self, operand_address):
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self.cycles += 2
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self.memory.write_byte(operand_address, self.update_nz(self.memory.read_byte(operand_address) - 1))
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def DEX(self):
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@ -1047,6 +1081,7 @@ class CPU:
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self.y_index = self.update_nz(self.y_index - 1)
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def INC(self, operand_address):
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self.cycles += 2
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self.memory.write_byte(operand_address, self.update_nz(self.memory.read_byte(operand_address) + 1))
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def INX(self):
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@ -1058,15 +1093,19 @@ class CPU:
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# PUSH / PULL
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def PHA(self):
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self.cycles += 1
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self.push_byte(self.accumulator)
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def PHP(self):
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self.cycles += 1
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self.push_byte(self.status_as_byte())
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def PLA(self):
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self.cycles += 2
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self.accumulator = self.update_nz(self.pull_byte())
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def PLP(self):
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self.cycles += 2
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self.status_from_byte(self.pull_byte())
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# LOGIC
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@ -1154,12 +1193,14 @@ class CPU:
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pass
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def BRK(self):
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self.cycles += 5
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self.push_word(self.program_counter + 1)
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self.push_byte(self.status_as_byte())
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self.program_counter = self.memory.read_word(0xFFFE)
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self.break_flag = 1
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def RTI(self):
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self.cycles += 4
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self.status_from_byte(self.pull_byte())
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self.program_counter = self.pull_word()
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