mirror of
https://github.com/bradgrantham/apple2e.git
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"clean" Makefile target Rearrange DEBUG constants so least bits trigger output with most impact New "implemented" bool SoftSwitch Add page2 handling to textport (untested) Separate out "region" encapsulating address start and end for convenience Factor out "set_flags()" for most common "flag_change()" sequences Move comment with instruction opcode onto case for compactness Remove old disassembly in favor of open source disassembly
1229 lines
36 KiB
C++
1229 lines
36 KiB
C++
#include <cstdlib>
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#include <string>
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#include <set>
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#include <chrono>
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#include <thread>
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#include <ratio>
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#include <iostream>
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#include <signal.h>
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using namespace std;
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#include "emulator.h"
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#include "keyboard.h"
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#include "dis6502.h"
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const unsigned int DEBUG_ERROR = 0x01;
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const unsigned int DEBUG_DECODE = 0x02;
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const unsigned int DEBUG_STATE = 0x04;
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const unsigned int DEBUG_RW = 0x08;
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const unsigned int DEBUG_BUS = 0x10;
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volatile unsigned int debug = DEBUG_ERROR | DEBUG_DECODE | DEBUG_STATE; // | DEBUG_RW;
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struct SoftSwitch
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{
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string name;
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int clear_address;
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int set_address;
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int read_address;
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bool read_also_changes;
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bool sw = false;
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bool implemented;
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SoftSwitch(const char* name_, int clear, int on, int read, bool read_changes, vector<SoftSwitch*>& s, bool implemented_ = false) :
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name(name_),
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clear_address(clear),
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set_address(on),
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read_address(read),
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read_also_changes(read_changes),
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implemented(implemented_)
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{
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s.push_back(this);
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}
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operator bool() const
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{
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return sw;
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}
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};
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const int textport_row_base_addresses[] =
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{
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0x400,
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0x480,
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0x500,
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0x580,
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0x600,
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0x680,
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0x700,
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0x780,
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0x428,
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0x4A8,
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0x528,
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0x5A8,
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0x628,
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0x6A8,
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0x728,
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0x7A8,
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0x450,
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0x4D0,
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0x550,
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0x5D0,
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0x650,
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0x6D0,
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0x750,
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0x7D0,
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};
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void textport_change(int page, unsigned char *textport)
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{
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printf("TEXTPORT:\n");
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printf("------------------------------------------\n");
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for(int row = 0; row < 24; row++) {
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printf("|");
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for(int col = 0; col < 40; col++) {
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int addr = textport_row_base_addresses[row] + col + ((page == 1) ? 0x0 : 0x400);
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int ch = textport[addr] & 0x7F;
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printf("%c", isprint(ch) ? ch : '?');
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}
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printf("|\n");
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}
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printf("------------------------------------------\n");
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}
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struct region {
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const int base;
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const int size;
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bool contains(int addr) const
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{
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return addr >= base && addr < base + size;
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}
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};
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const region hires1_region = {0x2000, 0x2000};
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const region hires2_region = {0x4000, 0x2000};
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const region text1_region = {0x400, 0x400};
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const region text2_region = {0x800, 0x400};
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const region io_region = {0xC000, 0x100};
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const region irom_region = {0xC100, 0x0F00};
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const region rom_region = {0xD000, 0x3000};
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struct MAINboard : board_base
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{
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unsigned char rom_bytes[0x3000/*rom_region.size*/];
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unsigned char irom_bytes[0x0F00/*irom_region.size*/];
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unsigned char ram_bytes[65536];
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vector<SoftSwitch*> switches;
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SoftSwitch CXROM {"CXROM", 0xC006, 0xC007, 0xC015, false, switches, true};
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SoftSwitch STORE80 {"STORE80", 0xC000, 0xC001, 0xC018, false, switches};
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SoftSwitch RAMRD {"RAMRD", 0xC002, 0xC003, 0xC013, false, switches};
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SoftSwitch RAMWRT {"RAMWRT", 0xC004, 0xC005, 0xC014, false, switches};
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SoftSwitch ALTZP {"ALTZP", 0xC008, 0xC009, 0xC016, false, switches};
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SoftSwitch C3ROM {"C3ROM", 0xC00A, 0xC00B, 0xC017, false, switches};
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SoftSwitch ALTCHAR {"ALTCHAR", 0xC00E, 0xC00F, 0xC01E, false, switches};
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SoftSwitch VID80 {"VID80", 0xC00C, 0xC00D, 0xC01F, false, switches};
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SoftSwitch TEXT {"TEXT", 0xC050, 0xC051, 0xC01A, true, switches, true};
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SoftSwitch MIXED {"MIXED", 0xC052, 0xC053, 0xC01B, true, switches};
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SoftSwitch PAGE2 {"PAGE2", 0xC054, 0xC055, 0xC01C, true, switches};
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SoftSwitch HIRES {"HIRES", 0xC056, 0xC057, 0xC01D, true, switches};
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set<int> ignore_mmio = {0xC058, 0xC05A, 0xC05D, 0xC05F, 0xC061, 0xC062};
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MAINboard(unsigned char rom[32768])
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{
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memcpy(rom_bytes, rom + rom_region.base - 0x8000 , sizeof(rom_bytes));
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memcpy(irom_bytes, rom + irom_region.base - 0x8000 , sizeof(irom_bytes));
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memset(ram_bytes, 0x00, sizeof(ram_bytes));
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start_keyboard();
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}
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virtual ~MAINboard()
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{
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stop_keyboard();
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}
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virtual bool read(int addr, unsigned char &data)
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{
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if(debug & DEBUG_RW) printf("MAIN board read\n");
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if(io_region.contains(addr)) {
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for(auto it = switches.begin(); it != switches.end(); it++) {
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SoftSwitch* sw = *it;
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if(addr == sw->read_address) {
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data = sw->sw ? 0x80 : 0x00;
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if(debug & DEBUG_RW) printf("Read status of %s = %02X\n", sw->name.c_str(), data);
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return true;
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} else if(sw->read_also_changes && addr == sw->set_address) {
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if(!sw->implemented) { printf("%s ; set is unimplemented\n", sw->name.c_str()); exit(0); }
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data = 0xff;
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sw->sw = true;
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if(debug & DEBUG_RW) printf("Set %s\n", sw->name.c_str());
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return true;
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} else if(sw->read_also_changes && addr == sw->clear_address) {
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// if(!sw->implemented) { printf("%s ; unimplemented\n", sw->name.c_str()); exit(0); }
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data = 0xff;
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sw->sw = false;
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if(debug & DEBUG_RW) printf("Clear %s\n", sw->name.c_str());
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return true;
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}
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}
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if(ignore_mmio.find(addr) != ignore_mmio.end()) {
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if(debug & DEBUG_RW) printf("read %04X, ignored, return 0x00\n", addr);
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data = 0x00;
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return true;
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}
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if(addr == 0xC000) {
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data = get_keyboard_data_and_strobe();
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if(debug & DEBUG_RW) printf("read KBD, return 0x%02X\n", data);
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return true;
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}
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if(addr == 0xC030) {
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if(debug & DEBUG_RW) printf("read SPKR, force 0x00\n");
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// click
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data = 0x00;
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return true;
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}
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if(addr == 0xC010) {
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// reset keyboard latch
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data = get_any_key_down_and_clear_strobe();
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if(debug & DEBUG_RW) printf("read KBDSTRB, return 0x%02X\n", data);
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return true;
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}
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printf("unhandled MMIO Read at %04X\n", addr);
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exit(0);
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}
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if(CXROM && irom_region.contains(addr)) {
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data = irom_bytes[addr - irom_region.base];
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from internal ROM\n", addr, data);
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return true;
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}
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if(rom_region.contains(addr)) {
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data = rom_bytes[addr - rom_region.base];
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from ROM\n", addr, data);
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return true;
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}
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if(addr >= 0 && addr < sizeof(ram_bytes)) {
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data = ram_bytes[addr];
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if(debug & DEBUG_RW) printf("read 0x%04X -> 0x%02X from RAM\n", addr, data);
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return true;
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}
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return false;
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}
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virtual bool write(int addr, unsigned char data)
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{
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if(TEXT) {
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// TEXT takes precedence over all other modes
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if(text1_region.contains(addr)) {
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printf("TEXT1 WRITE!\n");
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if(!PAGE2) textport_change(1, ram_bytes);
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}
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if(text2_region.contains(addr)) {
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printf("TEXT2 WRITE!\n");
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if(PAGE2) textport_change(2, ram_bytes);
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}
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} else {
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// MIXED shows text in last 4 columns in both HIRES or LORES
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if(MIXED) {
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printf("MIXED WRITE, abort!\n");
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exit(0);
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} else {
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if(HIRES) {
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if(hires1_region.contains(addr)) {
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printf("HIRES1 WRITE, abort!\n");
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exit(0);
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}
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if(hires2_region.contains(addr)) {
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printf("HIRES2 WRITE, abort!\n");
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exit(0);
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}
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} else {
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if(text1_region.contains(addr)) {
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printf("LORES1 WRITE, abort!\n");
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exit(0);
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}
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if(text2_region.contains(addr)) {
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printf("LORES2 WRITE, abort!\n");
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exit(0);
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}
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}
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}
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}
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if(io_region.contains(addr)) {
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for(auto it = switches.begin(); it != switches.end(); it++) {
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SoftSwitch* sw = *it;
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if(addr == sw->set_address) {
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if(!sw->implemented) { printf("%s ; set is unimplemented\n", sw->name.c_str()); exit(0); }
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data = 0xff;
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sw->sw = true;
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if(debug & DEBUG_RW) printf("Set %s\n", sw->name.c_str());
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return true;
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} else if(addr == sw->clear_address) {
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// if(!sw->implemented) { printf("%s ; unimplemented\n", sw->name.c_str()); exit(0); }
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data = 0xff;
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sw->sw = false;
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if(debug & DEBUG_RW) printf("Clear %s\n", sw->name.c_str());
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return true;
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}
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}
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if(addr == 0xC010) {
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if(debug & DEBUG_RW) printf("write KBDSTRB\n");
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// reset keyboard latch
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get_any_key_down_and_clear_strobe();
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return true;
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}
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if(addr == 0xC030) {
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if(debug & DEBUG_RW) printf("write SPKR\n");
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// click
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return true;
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}
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printf("unhandled MMIO Write at %04X\n", addr);
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exit(0);
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}
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if(rom_region.contains(addr)) {
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return false;
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}
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if(CXROM && irom_region.contains(addr)) {
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return false;
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}
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if(addr >= 0 && addr < sizeof(ram_bytes)) {
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ram_bytes[addr] = data;
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if(debug & DEBUG_RW) printf("wrote 0x%02X to RAM 0x%04X\n", data, addr);
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return true;
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}
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return false;
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}
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};
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struct bus_controller
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{
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std::vector<board_base*> boards;
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unsigned char read(int addr)
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{
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for(auto b = boards.begin(); b != boards.end(); b++) {
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unsigned char data = 0xaa;
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if((*b)->read(addr, data)) {
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if(debug & DEBUG_BUS) printf("read %04X returned %02X\n", addr, data);
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return data;
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}
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}
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if(debug & DEBUG_ERROR)
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fprintf(stderr, "no ownership of read at %04X\n", addr);
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return 0xAA;
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}
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void write(int addr, unsigned char data)
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{
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for(auto b = boards.begin(); b != boards.end(); b++) {
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if((*b)->write(addr, data)) {
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if(debug & DEBUG_BUS) printf("write %04X %02X\n", addr, data);
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return;
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}
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}
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if(debug & DEBUG_ERROR)
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fprintf(stderr, "no ownership of write %02X at %04X\n", data, addr);
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}
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};
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bus_controller bus;
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struct CPU6502
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{
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unsigned char a, x, y, s, p;
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static const unsigned char N = 0x80;
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static const unsigned char V = 0x40;
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static const unsigned char B = 0x10;
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static const unsigned char D = 0x08;
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static const unsigned char I = 0x04;
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static const unsigned char Z = 0x02;
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static const unsigned char C = 0x01;
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int pc;
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enum Exception {
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NONE,
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RESET,
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NMI,
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BRK,
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INT,
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} exception;
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CPU6502() :
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exception(RESET)
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{
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}
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void stack_push(bus_controller& bus, unsigned char d)
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{
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bus.write(0x100 + s--, d);
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}
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unsigned char stack_pull(bus_controller& bus)
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{
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return bus.read(0x100 + ++s);
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}
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unsigned char read_pc_inc(bus_controller& bus)
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{
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return bus.read(pc++);
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}
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void flag_change(unsigned char flag, bool v)
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{
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if(v)
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p |= flag;
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else
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p &= ~flag;
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}
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void flag_set(unsigned char flag)
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{
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p |= flag;
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}
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void flag_clear(unsigned char flag)
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{
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p &= ~flag;
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}
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void reset(bus_controller& bus)
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{
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s = 0xFD;
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pc = bus.read(0xFFFC) + bus.read(0xFFFD) * 256;
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exception = NONE;
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}
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enum Operand {
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A,
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IMPL,
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REL,
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ABS,
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ABS_X,
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ABS_Y,
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IND,
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X_IND,
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IND_Y,
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ZPG,
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ZPG_X,
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ZPG_Y,
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IMM,
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UND,
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};
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int carry()
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{
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return (p & C) ? 1 : 0;
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}
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bool isset(unsigned char flag)
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{
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return (p & flag) != 0;
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}
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#if 0
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int get_operand(bus_controller& bus, Operand oper)
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{
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switch(oper)
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{
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case A: return 0;
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case UND: return 0;
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case IMPL: return 0;
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case REL: return (bus.read(pc) + 128) % 256 - 128;
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case ABS: return bus.read(pc) + bus.read(pc + 1) * 256;
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case ABS_Y: return bus.read(pc) + bus.read(pc + 1) * 256 + y + carry;
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case ABS_X: return bus.read(pc) + bus.read(pc + 1) * 256 + x + carry;
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case ZPG: return bus.read(pc);
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case ZPG_Y: return (bus.read(pc) + y) & 0xFF;
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case ZPG_X: return (bus.read(pc) + x) & 0xFF;
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case IND: return bus.read(bus.read(pc) + bus.read(pc + 1) * 256);
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}
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}
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#endif
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void set_flags(unsigned char flags, unsigned char v)
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{
|
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if(flags & Z)
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flag_change(Z, v == 0x00);
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if(flags & N)
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flag_change(N, v & 0x80);
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}
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void cycle(bus_controller& bus)
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{
|
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if(exception == RESET) {
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if(debug & DEBUG_STATE) printf("RESET\n");
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reset(bus);
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}
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||
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unsigned char inst = read_pc_inc(bus);
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||
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unsigned char m;
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||
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int bytes;
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string dis;
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||
unsigned char buf[4];
|
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buf[0] = inst;
|
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buf[1] = bus.read(pc + 0);
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buf[2] = bus.read(pc + 1);
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buf[3] = bus.read(pc + 2);
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tie(bytes, dis) = disassemble_6502(pc - 1, buf);
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if(debug & DEBUG_DECODE) printf("%s\n", dis.c_str());
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switch(inst) {
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case 0xEA: { // NOP
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break;
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}
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||
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case 0x8A: { // TXA
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set_flags(N | Z, a = x);
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break;
|
||
}
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||
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case 0xAA: { // TAX
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set_flags(N | Z, x = a);
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break;
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}
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case 0xBA: { // TSX
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set_flags(N | Z, x = s);
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break;
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}
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||
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case 0x9A: { // TXS
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set_flags(N | Z, s = x);
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break;
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}
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case 0xA8: { // TAY
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set_flags(N | Z, y = a);
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break;
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}
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||
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case 0x98: { // TYA
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set_flags(N | Z, a = y);
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break;
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}
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||
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||
case 0x18: { // CLC
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flag_clear(C);
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break;
|
||
}
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||
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||
case 0x38: { // SEC
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flag_set(C);
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||
break;
|
||
}
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||
|
||
case 0xD8: { // CLD
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||
flag_clear(D);
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break;
|
||
}
|
||
|
||
case 0x58: { // CLI
|
||
flag_clear(I);
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||
break;
|
||
}
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||
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||
case 0x78: { // SEI
|
||
flag_set(I);
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||
break;
|
||
}
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||
|
||
case 0xB8: { // CLV
|
||
flag_clear(V);
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||
break;
|
||
}
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||
|
||
case 0xC6: { // DEC
|
||
int zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, m = bus.read(zpg) - 1);
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0xCE: { // DEC
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
set_flags(N | Z, m = bus.read(addr) - 1);
|
||
bus.write(addr, m);
|
||
break;
|
||
}
|
||
|
||
case 0xCA: { // DEC
|
||
set_flags(N | Z, x = x - 1);
|
||
break;
|
||
}
|
||
|
||
case 0xE6: { // INC
|
||
int zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, m = bus.read(zpg) + 1);
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0xE8: { // INX
|
||
set_flags(N | Z, x = x + 1);
|
||
break;
|
||
}
|
||
|
||
case 0xC8: { // INY
|
||
set_flags(N | Z, y = y + 1);
|
||
break;
|
||
}
|
||
|
||
case 0x10: { // BPL
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(!isset(N))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0x50: { // BVC
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(!isset(V))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0x70: { // BVS
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(isset(V))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0x30: { // BMI
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(isset(N))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0xB5: { // LDA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = zpg + y;
|
||
set_flags(N | Z, a = bus.read(addr & 0xFF));
|
||
break;
|
||
}
|
||
|
||
case 0xB1: { // LDA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = bus.read(zpg) + bus.read(zpg + 1) * 256 + y;
|
||
set_flags(N | Z, a = bus.read(addr));
|
||
break;
|
||
}
|
||
|
||
case 0xA5: { // LDA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, a = bus.read(zpg));
|
||
break;
|
||
}
|
||
|
||
case 0xDD: { // CMP
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr + x);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xD9: { // CMP
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr + y);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xB9: { // LDA
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
set_flags(N | Z, a = bus.read(addr + y));
|
||
break;
|
||
}
|
||
|
||
case 0xBD: { // LDA
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
set_flags(N | Z, a = bus.read(addr + x));
|
||
break;
|
||
}
|
||
|
||
case 0x65: { // ADC
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
int carry = isset(C) ? 1 : 0;
|
||
flag_change(C, (int)(a + m + carry) > 0xFF);
|
||
a = a + m + carry;
|
||
flag_change(N, a & 0x80);
|
||
flag_change(V, isset(C) != isset(N));
|
||
flag_change(Z, a == 0);
|
||
break;
|
||
}
|
||
|
||
case 0xF1: { // SBC
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = bus.read(zpg) + bus.read(zpg + 1) * 256 + y;
|
||
m = bus.read(addr);
|
||
int borrow = isset(C) ? 0 : 1;
|
||
flag_change(C, !(a < m - borrow));
|
||
a = a - m - borrow;
|
||
flag_change(N, a & 0x80);
|
||
flag_change(V, isset(C) != isset(N));
|
||
flag_change(Z, a == 0);
|
||
break;
|
||
}
|
||
case 0xED: { // SBC
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
unsigned char imm = bus.read(addr);
|
||
int borrow = isset(C) ? 0 : 1;
|
||
flag_change(C, !(a < imm - borrow));
|
||
a = a - imm - borrow;
|
||
flag_change(N, a & 0x80);
|
||
flag_change(V, isset(C) != isset(N));
|
||
flag_change(Z, a == 0);
|
||
break;
|
||
}
|
||
|
||
case 0xE9: { // SBC
|
||
unsigned char imm = read_pc_inc(bus);
|
||
int borrow = isset(C) ? 0 : 1;
|
||
flag_change(C, !(a < imm - borrow));
|
||
a = a - imm - borrow;
|
||
flag_change(N, a & 0x80);
|
||
flag_change(V, isset(C) != isset(N));
|
||
flag_change(Z, a == 0);
|
||
break;
|
||
}
|
||
|
||
case 0x69: { // ADC
|
||
unsigned char imm = read_pc_inc(bus);
|
||
int carry = isset(C) ? 1 : 0;
|
||
flag_change(C, (int)(a + imm + carry) > 0xFF);
|
||
a = a + imm + carry;
|
||
flag_change(N, a & 0x80);
|
||
flag_change(V, isset(C) != isset(N));
|
||
flag_change(Z, a == 0);
|
||
break;
|
||
}
|
||
|
||
case 0x06: { // ASL
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m & 0x80);
|
||
set_flags(N | Z, m = m << 1);
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0x0A: { // ASL
|
||
flag_change(C, a & 0x80);
|
||
set_flags(N | Z, a = a << 1);
|
||
break;
|
||
}
|
||
|
||
case 0x46: { // LSR
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m & 0x01);
|
||
set_flags(N | Z, m = m >> 1);
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0x4E: { // LSR
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr);
|
||
flag_change(C, m & 0x01);
|
||
set_flags(N | Z, m = m >> 1);
|
||
bus.write(addr, m);
|
||
break;
|
||
}
|
||
|
||
case 0x4A: { // LSR
|
||
flag_change(C, a & 0x01);
|
||
set_flags(N | Z, a = a >> 1);
|
||
break;
|
||
}
|
||
|
||
case 0x68: { // PLA
|
||
set_flags(N | Z, a = stack_pull(bus));
|
||
break;
|
||
}
|
||
|
||
case 0x48: { // PHA
|
||
stack_push(bus, a);
|
||
break;
|
||
}
|
||
|
||
case 0x05: { // ORA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
set_flags(N | Z, a = a | m);
|
||
break;
|
||
}
|
||
|
||
case 0x09: { // ORA
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, a = a | imm);
|
||
break;
|
||
}
|
||
|
||
case 0x25: { // AND
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, a = a & bus.read(zpg));
|
||
break;
|
||
}
|
||
|
||
case 0x29: { // AND
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, a = a & imm);
|
||
break;
|
||
}
|
||
|
||
case 0x88: { // DEY
|
||
set_flags(N | Z, y = y - 1);
|
||
break;
|
||
}
|
||
|
||
case 0x2A: { // ROL
|
||
bool c = isset(C);
|
||
flag_change(C, a & 0x80);
|
||
set_flags(N | Z, a = (c ? 0x01 : 0x00) | (a << 1));
|
||
break;
|
||
}
|
||
|
||
case 0x6A: { // ROR
|
||
bool c = isset(C);
|
||
flag_change(C, a & 0x01);
|
||
set_flags(N | Z, a = (c ? 0x80 : 0x00) | (a >> 1));
|
||
break;
|
||
}
|
||
|
||
case 0x76: { // ROR
|
||
unsigned char zpg = read_pc_inc(bus) + x;
|
||
m = bus.read(zpg);
|
||
bool c = isset(C);
|
||
flag_change(C, m & 0x01);
|
||
set_flags(N | Z, m = (c ? 0x80 : 0x00) | (m >> 1));
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0x26: { // ROL
|
||
unsigned char zpg = read_pc_inc(bus) + x;
|
||
bool c = isset(C);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m & 0x80);
|
||
set_flags(N | Z, m = (c ? 0x01 : 0x00) | (m << 1));
|
||
bus.write(zpg, m);
|
||
break;
|
||
}
|
||
|
||
case 0x4C: {
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
// JMP
|
||
pc = addr;
|
||
break;
|
||
}
|
||
|
||
case 0x6C: { // JMP
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
unsigned char addrl = bus.read(addr);
|
||
unsigned char addrh = bus.read(addr + 1);
|
||
addr = addrl + addrh * 256;
|
||
pc = addr;
|
||
break;
|
||
}
|
||
|
||
case 0x9D: { // STA
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
bus.write(addr + x, a);
|
||
break;
|
||
}
|
||
|
||
case 0x99: { // STA
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
bus.write(addr + y, a);
|
||
break;
|
||
}
|
||
|
||
case 0x91: { // STA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = bus.read(zpg) + bus.read(zpg + 1) * 256 + y;
|
||
bus.write(addr, a);
|
||
break;
|
||
}
|
||
|
||
case 0x8D: { // STA
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
bus.write(addr, a);
|
||
break;
|
||
}
|
||
|
||
case 0x08: { // PHP
|
||
stack_push(bus, p);
|
||
break;
|
||
}
|
||
|
||
case 0x28: { // PLP
|
||
p = stack_pull(bus);
|
||
break;
|
||
}
|
||
|
||
case 0x24: { // BIT
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(Z, a & m);
|
||
flag_change(N, m & 0x80);
|
||
flag_change(V, m & 0x70);
|
||
break;
|
||
}
|
||
|
||
case 0x2C: { // BIT
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr);
|
||
flag_change(Z, a & m);
|
||
flag_change(N, m & 0x80);
|
||
flag_change(V, m & 0x70);
|
||
break;
|
||
}
|
||
|
||
case 0xB4: { // LDY
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, y = bus.read(zpg + x));
|
||
break;
|
||
}
|
||
|
||
case 0xA6: { // LDX
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, x = bus.read(zpg));
|
||
break;
|
||
}
|
||
|
||
case 0xA4: { // LDY
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, y = bus.read(zpg));
|
||
break;
|
||
}
|
||
|
||
case 0xAC: { // LDY
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
set_flags(N | Z, y = bus.read(addr));
|
||
break;
|
||
}
|
||
|
||
case 0xA2: { // LDX
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, x = imm);
|
||
break;
|
||
}
|
||
|
||
case 0xA0: { // LDY
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, y = imm);
|
||
break;
|
||
}
|
||
|
||
case 0xA9: { // LDA
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, a = imm);
|
||
break;
|
||
}
|
||
|
||
case 0xAD: {
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
// LDA
|
||
set_flags(N | Z, a = bus.read(addr));
|
||
break;
|
||
}
|
||
|
||
case 0xCC: { // CPY
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xE0: { // CPX
|
||
unsigned char imm = read_pc_inc(bus);
|
||
flag_change(C, imm <= x);
|
||
set_flags(N | Z, imm = x - imm);
|
||
break;
|
||
}
|
||
|
||
case 0xC0: { // CPY
|
||
unsigned char imm = read_pc_inc(bus);
|
||
flag_change(C, imm <= y);
|
||
set_flags(N | Z, imm = y - imm);
|
||
break;
|
||
}
|
||
|
||
case 0x45: { // EOR
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
set_flags(N | Z, a = a ^ bus.read(zpg));
|
||
break;
|
||
}
|
||
|
||
case 0x49: { // EOR
|
||
unsigned char imm = read_pc_inc(bus);
|
||
set_flags(N | Z, a = a ^ imm);
|
||
break;
|
||
}
|
||
|
||
case 0x51: { // EOR
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = bus.read(zpg) + bus.read(zpg + 1) * 256 + y;
|
||
m = bus.read(addr);
|
||
set_flags(N | Z, a = a ^ m);
|
||
break;
|
||
}
|
||
|
||
case 0xD1: { // CMP
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
int addr = bus.read(zpg) + bus.read(zpg + 1) * 256 + y;
|
||
m = bus.read(addr);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xC5: { // CMP
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xCD: { // CMP
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
m = bus.read(addr);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xC9: { // CMP
|
||
unsigned char imm = read_pc_inc(bus);
|
||
flag_change(C, imm <= a);
|
||
set_flags(N | Z, imm = a - imm);
|
||
break;
|
||
}
|
||
|
||
case 0xD5: { // CMP
|
||
unsigned char zpg = read_pc_inc(bus) + x;
|
||
m = bus.read(zpg);
|
||
flag_change(C, m <= a);
|
||
set_flags(N | Z, m = a - m);
|
||
break;
|
||
}
|
||
|
||
case 0xE4: { // CPX
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m <= x);
|
||
set_flags(N | Z, m = x - m);
|
||
break;
|
||
}
|
||
|
||
case 0xC4: { // CPY
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
m = bus.read(zpg);
|
||
flag_change(C, m <= y);
|
||
set_flags(N | Z, m = y - m);
|
||
break;
|
||
}
|
||
|
||
case 0x90: { // BCC
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(!isset(C))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0xB0: { // BCS
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(isset(C))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0xD0: { // BNE
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(!isset(Z))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0xF0: { // BEQ
|
||
int rel = (read_pc_inc(bus) + 128) % 256 - 128;
|
||
if(isset(Z))
|
||
pc += rel;
|
||
break;
|
||
}
|
||
|
||
case 0x85: { // STA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
bus.write(zpg, a);
|
||
break;
|
||
}
|
||
|
||
case 0x60: { // RTS
|
||
unsigned char pcl = stack_pull(bus);
|
||
unsigned char pch = stack_pull(bus);
|
||
pc = pcl + pch * 256 + 1;
|
||
break;
|
||
}
|
||
|
||
case 0x95: { // STA
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
bus.write((zpg + x) % 0x100, a);
|
||
break;
|
||
}
|
||
|
||
case 0x94: { // STY
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
bus.write((zpg + x) % 0x100, y);
|
||
break;
|
||
}
|
||
|
||
case 0x86: { // STX
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
bus.write(zpg, x);
|
||
break;
|
||
}
|
||
|
||
case 0x84: { // STY
|
||
unsigned char zpg = read_pc_inc(bus);
|
||
bus.write(zpg, y);
|
||
break;
|
||
}
|
||
|
||
case 0x8C: { // STY
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
bus.write(addr, y);
|
||
break;
|
||
}
|
||
|
||
case 0x20: { // JSR
|
||
stack_push(bus, (pc + 1) >> 8);
|
||
stack_push(bus, (pc + 1) & 0xFF);
|
||
int addr = read_pc_inc(bus) + read_pc_inc(bus) * 256;
|
||
pc = addr;
|
||
break;
|
||
}
|
||
|
||
default:
|
||
printf("unhandled instruction %02X\n", inst);
|
||
exit(1);
|
||
}
|
||
if(debug & DEBUG_STATE) {
|
||
unsigned char s0 = bus.read(0x100 + s + 0);
|
||
unsigned char s1 = bus.read(0x100 + s + 1);
|
||
unsigned char s2 = bus.read(0x100 + s + 2);
|
||
unsigned char pc0 = bus.read(pc + 0);
|
||
unsigned char pc1 = bus.read(pc + 1);
|
||
unsigned char pc2 = bus.read(pc + 2);
|
||
printf("6502: A:%02X X:%02X Y:%02X P:", a, x, y);
|
||
printf("%s", (p & N) ? "N" : "n");
|
||
printf("%s", (p & V) ? "V" : "v");
|
||
printf("-");
|
||
printf("%s", (p & B) ? "B" : "b");
|
||
printf("%s", (p & D) ? "D" : "d");
|
||
printf("%s", (p & I) ? "I" : "i");
|
||
printf("%s", (p & Z) ? "Z" : "z");
|
||
printf("%s ", (p & C) ? "C" : "c");
|
||
printf("S:%02X (%02X %02X %02X ...) PC:%04X (%02X %02X %02X ...)\n", s, s0, s1, s2, pc, pc0, pc1, pc2);
|
||
}
|
||
}
|
||
};
|
||
|
||
|
||
void usage(char *progname)
|
||
{
|
||
printf("\n");
|
||
printf("usage: %s ROM.bin\n", progname);
|
||
printf("\n");
|
||
printf("\n");
|
||
}
|
||
|
||
void go_verbose(int)
|
||
{
|
||
debug = DEBUG_ERROR | DEBUG_DECODE | DEBUG_STATE | DEBUG_RW;
|
||
|
||
}
|
||
|
||
int main(int argc, char **argv)
|
||
{
|
||
char *progname = argv[0];
|
||
argc -= 1;
|
||
argv += 1;
|
||
|
||
while((argc > 0) && (argv[0][0] == '-')) {
|
||
if(
|
||
(strcmp(argv[0], "-help") == 0) ||
|
||
(strcmp(argv[0], "-h") == 0) ||
|
||
(strcmp(argv[0], "-?") == 0))
|
||
{
|
||
usage(progname);
|
||
exit(EXIT_SUCCESS);
|
||
} else {
|
||
fprintf(stderr, "unknown parameter \"%s\"\n", argv[0]);
|
||
usage(progname);
|
||
exit(EXIT_FAILURE);
|
||
}
|
||
}
|
||
|
||
if(argc < 1) {
|
||
usage(progname);
|
||
exit(EXIT_FAILURE);
|
||
}
|
||
|
||
char *romname = argv[0];
|
||
unsigned char b[32768];
|
||
|
||
FILE *fp = fopen(romname, "rb");
|
||
if(fp == NULL) {
|
||
fprintf(stderr, "failed to open %s for reading\n", romname);
|
||
exit(EXIT_FAILURE);
|
||
}
|
||
size_t length = fread(b, 1, sizeof(b), fp);
|
||
if(length < rom_region.size) {
|
||
fprintf(stderr, "ROM read from %s was unexpectedly short (%zd bytes)\n", romname, length);
|
||
exit(EXIT_FAILURE);
|
||
}
|
||
fclose(fp);
|
||
|
||
bus.boards.push_back(new MAINboard(b));
|
||
|
||
for(auto b = bus.boards.begin(); b != bus.boards.end(); b++) {
|
||
(*b)->reset();
|
||
}
|
||
|
||
signal(SIGUSR1, go_verbose);
|
||
|
||
CPU6502 cpu;
|
||
|
||
bool debugging = false;
|
||
|
||
while(1) {
|
||
if(!debugging) {
|
||
poll_keyboard();
|
||
|
||
char key;
|
||
bool have_key = peek_key(&key);
|
||
|
||
if(have_key && (key == '')) {
|
||
debugging = true;
|
||
clear_strobe();
|
||
stop_keyboard();
|
||
get_any_key_down_and_clear_strobe();
|
||
continue;
|
||
}
|
||
|
||
chrono::time_point<chrono::system_clock> then;
|
||
for(int i = 0; i < 25575; i++) // ~ 1/10th second
|
||
cpu.cycle(bus);
|
||
chrono::time_point<chrono::system_clock> now;
|
||
|
||
auto elapsed_millis = chrono::duration_cast<chrono::milliseconds>(now - then);
|
||
this_thread::sleep_for(chrono::milliseconds(100) - elapsed_millis);
|
||
|
||
} else {
|
||
|
||
printf("> ");
|
||
char line[512];
|
||
fgets(line, sizeof(line) - 1, stdin);
|
||
line[strlen(line) - 1] = '\0';
|
||
if(strcmp(line, "go") == 0) {
|
||
printf("continuing\n");
|
||
debugging = false;
|
||
start_keyboard();
|
||
continue;
|
||
} else if(strncmp(line, "debug", 5) == 0) {
|
||
sscanf(line + 6, "%d", &debug);
|
||
printf("debug set to %02X\n", debug);
|
||
}
|
||
|
||
cpu.cycle(bus);
|
||
}
|
||
}
|
||
}
|