2019-01-26 16:05:51 +00:00
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package main
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type state struct {
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registers registers
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memory memory
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}
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func step(s *state) {
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}
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const modeNone = -1
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const modeImmediate = 0
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const modeZeroPage = 1
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const modeZeroPageX = 3
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const modeZeroPageY = 6
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const modeAbsolute = 2
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const modeAbsoluteX = 4
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const modeAbsoluteY = 5
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const modeIndexedIndirectX = 7
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const modeIndirectIndexedY = 8
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2019-01-26 17:57:03 +00:00
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// https://www.masswerk.at/6502/6502_instruction_set.html
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2019-01-27 08:25:33 +00:00
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func getWordInLine(line []uint8) uint16 {
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return uint16(line[1]) + 0x100*uint16(line[2])
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}
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2019-01-27 08:25:33 +00:00
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type opcode struct {
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name string
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bytes int
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cycles int
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action opFunc
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}
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type opFunc func(s *state, line []uint8, opcode opcode)
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func opNOP(s *state, line []uint8, opcode opcode) {}
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func buildOPTransfer(regSrc int, regDst int) opFunc {
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return func(s *state, line []uint8, opcode opcode) {
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s.registers.setRegister(regDst, s.registers.getRegister(regSrc))
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// TODO: Update flags (N, Z) for all but TXS
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}
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}
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func buildOpLoad(addressMode int, regDst int) opFunc {
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return func(s *state, line []uint8, opcode opcode) {
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var value uint8
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switch addressMode {
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case modeImmediate:
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value = line[1]
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case modeZeroPage:
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address := line[1]
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value = s.memory[address]
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case modeZeroPageX:
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address := line[1] + s.registers.getX()
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value = s.memory[address]
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case modeZeroPageY:
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address := line[1] + s.registers.getY()
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value = s.memory[address]
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case modeAbsolute:
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address := getWordInLine(line)
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value = s.memory[address]
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case modeAbsoluteX:
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address := getWordInLine(line) + uint16(s.registers.getX())
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value = s.memory[address]
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case modeAbsoluteY:
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address := getWordInLine(line) + uint16(s.registers.getY())
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value = s.memory[address]
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case modeIndexedIndirectX:
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addressAddress := uint8(line[1] + s.registers.getX())
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address := s.memory.getZeroPageWord(addressAddress)
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value = s.memory[address]
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case modeIndirectIndexedY:
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address := s.memory.getZeroPageWord(line[1]) +
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uint16(s.registers.getY())
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value = s.memory[address]
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}
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s.registers.setRegister(regDst, value)
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// TODO: Update flags (N, Z)
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}
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}
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var opcodes = [256]opcode{
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0x00: opcode{"BRK", 1, 7, opNOP},
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0xA0: opcode{"LDY", 2, 2, buildOpLoad(modeImmediate, regY)},
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0xA1: opcode{"LDX", 2, 6, buildOpLoad(modeIndexedIndirectX, regA)},
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0xA2: opcode{"LDX", 2, 2, buildOpLoad(modeImmediate, regX)},
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0xA4: opcode{"LDY", 2, 3, buildOpLoad(modeZeroPage, regY)},
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0xA5: opcode{"LDA", 2, 3, buildOpLoad(modeZeroPage, regA)},
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0xA6: opcode{"LDX", 2, 3, buildOpLoad(modeZeroPage, regX)},
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0xA9: opcode{"LDA", 2, 2, buildOpLoad(modeImmediate, regA)},
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0xAA: opcode{"TAX", 1, 2, buildOPTransfer(regA, regX)},
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0xA8: opcode{"TAY", 1, 2, buildOPTransfer(regA, regY)},
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0xBA: opcode{"TSX", 1, 2, buildOPTransfer(regSP, regX)},
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0x8A: opcode{"TXA", 1, 2, buildOPTransfer(regX, regA)},
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0x9A: opcode{"TXS", 1, 2, buildOPTransfer(regX, regSP)},
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0x98: opcode{"TYA", 1, 2, buildOPTransfer(regY, regA)},
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0xAC: opcode{"LDY", 3, 4, buildOpLoad(modeAbsolute, regY)},
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0xAD: opcode{"LDA", 3, 4, buildOpLoad(modeAbsolute, regA)},
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0xAE: opcode{"LDX", 3, 4, buildOpLoad(modeAbsolute, regX)},
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0xB1: opcode{"LDX", 2, 5, buildOpLoad(modeIndirectIndexedY, regA)}, // Extra cycles
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0xB4: opcode{"LDY", 2, 4, buildOpLoad(modeZeroPageX, regY)},
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0xB5: opcode{"LDA", 2, 4, buildOpLoad(modeZeroPageX, regA)},
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0xB6: opcode{"LDX", 2, 4, buildOpLoad(modeZeroPageY, regX)},
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0xB9: opcode{"LDA", 3, 4, buildOpLoad(modeAbsoluteY, regA)}, // Extra cycles
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0xBC: opcode{"LDY", 3, 4, buildOpLoad(modeAbsoluteX, regY)}, // Extra cycles
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0xBD: opcode{"LDA", 3, 4, buildOpLoad(modeAbsoluteX, regA)}, // Extra cycles
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0xBE: opcode{"LDX", 3, 4, buildOpLoad(modeAbsoluteY, regX)}, // Extra cycles
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}
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func executeLine(s *state, line []uint8) {
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opcode := opcodes[line[0]]
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opcode.action(s, line, opcode)
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}
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