First run with https://github.com/TomHarte/ProcessorTests
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@ -92,6 +92,14 @@ func resolveAddress(s *State, line []uint8, opcode opcode) uint16 {
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case modeIndirect:
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case modeIndirect:
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addressAddress := getWordInLine(line)
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addressAddress := getWordInLine(line)
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address = getWord(s.mem, addressAddress)
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address = getWord(s.mem, addressAddress)
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//address = getWordNoCrossPage(s.mem, addressAddress)
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/*
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The tests from https://github.com/Klaus2m5/6502_65C02_functional_tests
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pass with getWord(), but the tests in https://github.com/TomHarte/ProcessorTests/tree/main/6502/v1
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need getWordNoCrossPage().
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*/
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case modeIndirectIndexedY:
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case modeIndirectIndexedY:
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base := getZeroPageWord(s.mem, line[1])
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base := getZeroPageWord(s.mem, line[1])
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address, extraCycle = addOffset(base, s.reg.getY())
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address, extraCycle = addOffset(base, s.reg.getY())
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@ -162,7 +170,7 @@ func lineString(line []uint8, opcode opcode) string {
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case modeImplicitY:
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case modeImplicitY:
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//Nothing
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//Nothing
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case modeAccumulator:
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case modeAccumulator:
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t += fmt.Sprintf(" A")
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t += " A"
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case modeImmediate:
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case modeImmediate:
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t += fmt.Sprintf(" #$%02x", line[1])
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t += fmt.Sprintf(" #$%02x", line[1])
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case modeZeroPage:
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case modeZeroPage:
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@ -0,0 +1,115 @@
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package core6502
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import (
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"encoding/json"
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"fmt"
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"os"
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"testing"
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)
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type scenarioState struct {
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Pc uint16
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S uint8
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A uint8
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X uint8
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Y uint8
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P uint8
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Ram [][]uint16
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}
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type scenario struct {
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Name string
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Initial scenarioState
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Final scenarioState
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Cycles [][]interface{}
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}
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/*
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Tests from https://github.com/TomHarte/ProcessorTests/tree/main/6502/v1
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more work needed.
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*/
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func TestHarteNMOS6502(t *testing.T) {
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t.Skip("Not ready to be used in CI")
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s := NewNMOS6502(nil) // Use to get the opcodes names
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path := "/home/casa/code/ProcessorTests/6502/v1/"
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for i := 0x00; i <= 0xff; /*0xff*/ i++ {
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if s.opcodes[i].name != "ADC" && // Issue with ADC crossing page boundaries
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s.opcodes[i].name != "SBC" && // Issue with ADC crossing page boundaries
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s.opcodes[i].name != "" {
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opcode := fmt.Sprintf("%02x", i)
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t.Run(opcode+s.opcodes[i].name, func(t *testing.T) {
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t.Parallel()
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testOpcode(t, path, opcode)
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})
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}
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}
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}
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func testOpcode(t *testing.T, path string, opcode string) {
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m := new(FlatMemory)
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s := NewNMOS6502(m)
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data, err := os.ReadFile(path + opcode + ".json")
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if err != nil {
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t.Fatal(err)
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}
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var scenarios []scenario
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err = json.Unmarshal(data, &scenarios)
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if err != nil {
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t.Fatal(err)
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}
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for _, scenario := range scenarios {
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if scenario.Name != "20 55 13" { // Skip JSR on the stack being modified
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t.Run(scenario.Name, func(t *testing.T) {
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testScenario(t, s, &scenario)
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})
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}
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}
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}
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func testScenario(t *testing.T, s *State, sc *scenario) {
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// Setup CPU
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s.reg.setPC(sc.Initial.Pc)
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s.reg.setSP(sc.Initial.S)
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s.reg.setA(sc.Initial.A)
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s.reg.setX(sc.Initial.X)
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s.reg.setY(sc.Initial.Y)
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s.reg.setP(sc.Initial.P)
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for _, e := range sc.Initial.Ram {
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s.mem.Poke(uint16(e[0]), uint8(e[1]))
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}
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// Execute instruction
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s.ExecuteInstruction()
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// Check result
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assertReg8(t, sc, "A", s.reg.getA(), sc.Final.A)
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assertReg8(t, sc, "X", s.reg.getX(), sc.Final.X)
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assertReg8(t, sc, "Y", s.reg.getY(), sc.Final.Y)
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assertFlags(t, sc, sc.Initial.P, s.reg.getP(), sc.Final.P)
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assertReg8(t, sc, "SP", s.reg.getSP(), sc.Final.S)
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assertReg16(t, sc, "PC", s.reg.getPC(), sc.Final.Pc)
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}
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func assertReg8(t *testing.T, sc *scenario, name string, actual uint8, wanted uint8) {
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if actual != wanted {
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t.Errorf("Register %s is %02x and should be %02x for %+v", name, actual, wanted, sc)
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}
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}
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func assertReg16(t *testing.T, sc *scenario, name string, actual uint16, wanted uint16) {
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if actual != wanted {
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t.Errorf("Register %s is %04x and should be %04x for %+v", name, actual, wanted, sc)
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}
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}
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func assertFlags(t *testing.T, sc *scenario, initial uint8, actual uint8, wanted uint8) {
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if actual != wanted {
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t.Errorf("%08b flag diffs, they are %08b and should be %08b, initial %08b for %+v", actual^wanted, actual, wanted, initial, sc)
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}
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}
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@ -16,6 +16,15 @@ func getWord(m Memory, address uint16) uint16 {
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return uint16(m.Peek(address)) + 0x100*uint16(m.Peek(address+1))
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return uint16(m.Peek(address)) + 0x100*uint16(m.Peek(address+1))
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}
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}
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func getWordNoCrossPage(m Memory, address uint16) uint16 {
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addressMSB := address + 1
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if address&0xff == 0xff {
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// We won't cross the page bounday for the MSB byte
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addressMSB -= 0x100
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}
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return uint16(m.Peek(address)) + 0x100*uint16(m.Peek(addressMSB))
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}
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func getZeroPageWord(m Memory, address uint8) uint16 {
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func getZeroPageWord(m Memory, address uint8) uint16 {
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return uint16(m.Peek(uint16(address))) + 0x100*uint16(m.Peek(uint16(address+1)))
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return uint16(m.Peek(uint16(address))) + 0x100*uint16(m.Peek(uint16(address+1)))
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}
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}
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@ -184,6 +184,6 @@ var opcodesNMOS6502 = [256]opcode{
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// Undocumented opcodes, see http://bbc.nvg.org/doc/6502OpList.txt
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// Undocumented opcodes, see http://bbc.nvg.org/doc/6502OpList.txt
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0x1A: {"NOP", 1, 2, modeImplicit, opNOP}, // INC A in the 65c02
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0x1A: {"NOP", 1, 2, modeImplicit, opNOP}, // INC A in the 65c02
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0xC2: {"NOP", 1, 2, modeImplicit, opNOP}, // Should be HALT?
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0xC2: {"NOP", 2, 2, modeImplicit, opNOP},
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0x02: {"NOP", 1, 2, modeImplicit, opNOP}, // Should be HALT?
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0x02: {"NOP", 1, 1, modeImplicit, opHALT},
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}
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}
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@ -255,7 +255,9 @@ func buildOpPull(regDst int) opFunc {
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return func(s *State, line []uint8, opcode opcode) {
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return func(s *State, line []uint8, opcode opcode) {
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value := pullByte(s)
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value := pullByte(s)
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s.reg.setRegister(regDst, value)
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s.reg.setRegister(regDst, value)
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if regDst != regP {
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if regDst == regP {
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s.reg.updateFlag5B()
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} else {
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s.reg.updateFlagZN(value)
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s.reg.updateFlagZN(value)
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}
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}
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}
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}
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@ -278,6 +280,10 @@ func opJMP(s *State, line []uint8, opcode opcode) {
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func opNOP(s *State, line []uint8, opcode opcode) {}
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func opNOP(s *State, line []uint8, opcode opcode) {}
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func opHALT(s *State, line []uint8, opcode opcode) {
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s.reg.setPC(s.reg.getPC() - 1)
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}
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func opJSR(s *State, line []uint8, opcode opcode) {
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func opJSR(s *State, line []uint8, opcode opcode) {
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pushWord(s, s.reg.getPC()-1)
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pushWord(s, s.reg.getPC()-1)
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address := resolveAddress(s, line, opcode)
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address := resolveAddress(s, line, opcode)
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@ -286,6 +292,7 @@ func opJSR(s *State, line []uint8, opcode opcode) {
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func opRTI(s *State, line []uint8, opcode opcode) {
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func opRTI(s *State, line []uint8, opcode opcode) {
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s.reg.setP(pullByte(s))
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s.reg.setP(pullByte(s))
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s.reg.updateFlag5B()
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s.reg.setPC(pullWord(s))
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s.reg.setPC(pullWord(s))
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}
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}
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@ -86,6 +86,11 @@ func (r *registers) updateFlagZN(t uint8) {
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r.updateFlag(flagN, t >= (1<<7))
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r.updateFlag(flagN, t >= (1<<7))
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}
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}
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func (r *registers) updateFlag5B() {
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r.setFlag(flag5)
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r.clearFlag(flagB)
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}
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func (r registers) String() string {
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func (r registers) String() string {
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//ch := (r.getA() & 0x3F) + 0x40
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//ch := (r.getA() & 0x3F) + 0x40
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ch := (r.getA() & 0x7F)
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ch := (r.getA() & 0x7F)
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