Reset LC activation count on writes. To pass a2audit tests

This commit is contained in:
Ivan Izaguirre 2020-09-23 18:10:46 +02:00
parent 10d2551b36
commit 696038fa30
1 changed files with 15 additions and 5 deletions

View File

@ -50,11 +50,11 @@ func (c *cardLanguage) assign(a *Apple2, slot int) {
for i := uint8(0x0); i <= 0xf; i++ { for i := uint8(0x0); i <= 0xf; i++ {
iCopy := i iCopy := i
c.addCardSoftSwitchR(iCopy, func(*ioC0Page) uint8 { c.addCardSoftSwitchR(iCopy, func(*ioC0Page) uint8 {
c.ssAction(iCopy) c.ssAction(iCopy, false)
return 0 return 0
}, "LANGCARDR") }, "LANGCARDR")
c.addCardSoftSwitchW(iCopy, func(*ioC0Page, uint8) { c.addCardSoftSwitchW(iCopy, func(*ioC0Page, uint8) {
c.ssAction(iCopy) c.ssAction(iCopy, true)
}, "LANGCARDW") }, "LANGCARDW")
} }
@ -62,7 +62,7 @@ func (c *cardLanguage) assign(a *Apple2, slot int) {
c.applyState() c.applyState()
} }
func (c *cardLanguage) ssAction(ss uint8) { func (c *cardLanguage) ssAction(ss uint8, write bool) {
c.altBank = ((ss >> 3) & 1) == 0 c.altBank = ((ss >> 3) & 1) == 0
action := ss & 0x3 action := ss & 0x3
switch action { switch action {
@ -73,7 +73,9 @@ func (c *cardLanguage) ssAction(ss uint8) {
case 1: case 1:
// ROM read, RAM write // ROM read, RAM write
c.readState = false c.readState = false
c.writeState++ if !write {
c.writeState++
}
case 2: case 2:
// ROM read, no writes // ROM read, no writes
c.readState = false c.readState = false
@ -81,7 +83,15 @@ func (c *cardLanguage) ssAction(ss uint8) {
case 3: case 3:
//RAM read, RAM write //RAM read, RAM write
c.readState = true c.readState = true
c.writeState++ if !write {
c.writeState++
}
}
if write && c.writeState == lcWriteHalfEnabled {
// UtA2e, 5-23. It is reset by even read access or any write acccess in the $C08x range
// And https://github.com/zellyn/a2audit/issues/3
c.writeState = lcWriteDisabled
} }
if c.writeState > lcWriteEnabled { if c.writeState > lcWriteEnabled {