From 8ebd745a63a38d60b04a5720d399a57cf3f9b888 Mon Sep 17 00:00:00 2001 From: Ivan Izaguirre Date: Wed, 23 Sep 2020 18:19:15 +0200 Subject: [PATCH] Name all the memory segments --- apple2Setup.go | 2 +- base64a.go | 2 +- cardBase.go | 8 ++++---- cardInOut.go | 4 ++-- memoryManager.go | 29 +++++++---------------------- memoryRange.go | 32 +++++++++++++++++++++++++++++--- 6 files changed, 44 insertions(+), 33 deletions(-) diff --git a/apple2Setup.go b/apple2Setup.go index 570fe8e..0a3c6c9 100644 --- a/apple2Setup.go +++ b/apple2Setup.go @@ -78,7 +78,7 @@ func (a *Apple2) LoadRom(filename string) error { } romBase := 0x10000 - size - a.mmu.physicalROM[0] = newMemoryRangeROM(uint16(romBase), data) + a.mmu.physicalROM[0] = newMemoryRangeROM(uint16(romBase), data, "Main ROM") return nil } diff --git a/base64a.go b/base64a.go index 268dc04..8380a07 100644 --- a/base64a.go +++ b/base64a.go @@ -47,7 +47,7 @@ func loadBase64aRom(a *Apple2) error { // Create banks for j := range romBanksBytes { - a.mmu.physicalROM[j] = newMemoryRange(0xd000, romBanksBytes[j]) + a.mmu.physicalROM[j] = newMemoryRange(0xd000, romBanksBytes[j], fmt.Sprintf("Base64 ROM page %v", j)) } // Start with first bank active diff --git a/cardBase.go b/cardBase.go index b34e471..f05412c 100644 --- a/cardBase.go +++ b/cardBase.go @@ -23,16 +23,16 @@ func (c *cardBase) loadRom(data []uint8) { } if len(data) == 0x100 { // Just 256 bytes in Cs00 - c.romCsxx = newMemoryRangeROM(0, data) + c.romCsxx = newMemoryRangeROM(0, data, "Slot ROM") } else if len(data) == 0x800 { // The file has C800 to C8FF // The 256 bytes in Cx00 are copied from the first page in C800 - c.romCsxx = newMemoryRangeROM(0, data) - c.romC8xx = newMemoryRangeROM(0xc800, data) + c.romCsxx = newMemoryRangeROM(0, data, "Slor ROM") + c.romC8xx = newMemoryRangeROM(0xc800, data, "Slot C8 ROM") } else if len(data) == 0x1000 { // The file covers the full Cxxx range. Only showing the page // corresponding to the slot used. - c.romCxxx = newMemoryRangeROM(0xc000, data) + c.romCxxx = newMemoryRangeROM(0xc000, data, "Slot ROM") } else { panic("Invalid ROM size") } diff --git a/cardInOut.go b/cardInOut.go index 6f6337e..26ee120 100644 --- a/cardInOut.go +++ b/cardInOut.go @@ -71,10 +71,10 @@ func (c *cardInOut) assign(a *Apple2, slot int) { } } - c.romCsxx = newMemoryRangeROM(0xC200, data[0:255]) + c.romCsxx = newMemoryRangeROM(0xC200, data[0:255], "InOUt card") if slot != 2 { - // To make ifwork on other slots, patch C2, A0 and A1 + // To make it work on other slots, patch C2, A0 and A1 panic("Assert failed. Only slot 2 supported for the InOut card") } c.cardBase.assign(a, slot) diff --git a/memoryManager.go b/memoryManager.go index ce852a4..6643ba5 100644 --- a/memoryManager.go +++ b/memoryManager.go @@ -1,5 +1,7 @@ package apple2 +import "fmt" + // See https://fabiensanglard.net/fd_proxy/prince_of_persia/Inside%20the%20Apple%20IIe.pdf // See https://i.stack.imgur.com/yn21s.gif @@ -72,7 +74,7 @@ type memoryHandler interface { func newMemoryManager(a *Apple2) *memoryManager { var mmu memoryManager mmu.apple2 = a - mmu.physicalMainRAM = newMemoryRange(0, make([]uint8, 0xc000)) + mmu.physicalMainRAM = newMemoryRange(0, make([]uint8, 0xc000), "Main RAM") mmu.slotC3ROMActive = true // For II+, this is the default behaviour @@ -138,23 +140,6 @@ func (mmu *memoryManager) getVideoRAM(ext bool) *memoryRange { return mmu.physicalMainRAM } -func (mmu *memoryManager) accessReadCached(address uint16) memoryHandler { - page := address & 0xff00 - if address&0xff00 == mmu.lastAddressPage { - //fmt.Printf(" hit %v\n", mmu.apple2.cpu.GetCycles()) - return mmu.lastAddressHandler - } - - //fmt.Printf("Not hit %v\n", mmu.apple2.cpu.GetCycles()) - mh := mmu.accessRead(address) - if address&0xf000 != 0xc000 { - // Do not cache 0xC area as it may reconfigure the MMU - mmu.lastAddressPage = page - mmu.lastAddressHandler = mh - } - return mh -} - func (mmu *memoryManager) accessRead(address uint16) memoryHandler { if address <= addressLimitZero { return mmu.getPhysicalMainRAM(mmu.altZeroPage) @@ -266,8 +251,8 @@ func (mmu *memoryManager) initLanguageRAM(groups uint8) { mmu.physicalLangRAM = make([]*memoryRange, groups) mmu.physicalLangAltRAM = make([]*memoryRange, groups) for i := uint8(0); i < groups; i++ { - mmu.physicalLangRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x3000)) - mmu.physicalLangAltRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x1000)) + mmu.physicalLangRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x3000), fmt.Sprintf("LC RAM block %v", i)) + mmu.physicalLangAltRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x1000), fmt.Sprintf("LC RAM Alt block %v", i)) } } @@ -276,8 +261,8 @@ func (mmu *memoryManager) initExtendedRAM(groups int) { mmu.physicalExtRAM = make([]*memoryRange, groups) mmu.physicalExtAltRAM = make([]*memoryRange, groups) for i := 0; i < groups; i++ { - mmu.physicalExtRAM[i] = newMemoryRange(0, make([]uint8, 0x10000)) - mmu.physicalExtAltRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x1000)) + mmu.physicalExtRAM[i] = newMemoryRange(0, make([]uint8, 0x10000), fmt.Sprintf("Extra RAM block %v", i)) + mmu.physicalExtAltRAM[i] = newMemoryRange(0xd000, make([]uint8, 0x1000), fmt.Sprintf("Extra RAM Alt block %v", i)) } } diff --git a/memoryRange.go b/memoryRange.go index a0d5767..0f5e635 100644 --- a/memoryRange.go +++ b/memoryRange.go @@ -1,28 +1,40 @@ package apple2 +import ( + "fmt" +) + type memoryRange struct { base uint16 data []uint8 - basePtr uintptr + name string + address string + //basePtr uintptr } type memoryRangeROM struct { memoryRange } -func newMemoryRange(base uint16, data []uint8) *memoryRange { +func newMemoryRange(base uint16, data []uint8, name string) *memoryRange { var m memoryRange m.base = base m.data = data m.setBase(base) + + m.name = name + m.address = fmt.Sprintf("%p", &m) return &m } -func newMemoryRangeROM(base uint16, data []uint8) *memoryRangeROM { +func newMemoryRangeROM(base uint16, data []uint8, name string) *memoryRangeROM { var m memoryRangeROM m.base = base m.data = data m.setBase(base) + + m.name = name + m.address = fmt.Sprintf("%p", &m) return &m } @@ -56,3 +68,17 @@ func (m *memoryRange) subRange(a, b uint16) []uint8 { func (m *memoryRangeROM) poke(address uint16, value uint8) { // Ignore } + +func identifyMemory(m memoryHandler) string { + ram, ok := m.(*memoryRange) + if ok { + return fmt.Sprintf("RAM 0x%04x %s at %s", ram.base, ram.name, ram.address) + } + + rom, ok := m.(*memoryRangeROM) + if ok { + return fmt.Sprintf("ROM 0x%04x %s at %s", rom.base, ram.name, rom.address) + } + + return ("Unknown memory") +}