mirror of
https://github.com/ivanizag/izapple2.git
synced 2025-04-11 17:39:47 +00:00
Fix shadow slot 3 ROM in Apple //e
This commit is contained in:
Ivan Izaguirre
Iván Izaguirre
parent
09117fd7c5
commit
a28745ab83
@ -32,7 +32,7 @@ type cardLanguage struct {
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cardBase
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readState bool
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writeState uint8
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altBank bool
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altBank bool // false is bank1, true is bank2
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}
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const (
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@ -45,7 +45,7 @@ const (
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func (c *cardLanguage) assign(a *Apple2, slot int) {
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c.readState = false
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c.writeState = lcWriteEnabled
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c.altBank = true
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c.altBank = true // Start on bank2
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if a.isApple2e {
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// The Apple //e with 128kb has two blocks of language upper RAM
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@ -69,7 +69,7 @@ func (c *cardLanguage) assign(a *Apple2, slot int) {
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}
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func (c *cardLanguage) ssAction(ss uint8, write bool) {
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c.altBank = ((ss >> 3) & 1) == 1
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c.altBank = ((ss >> 3) & 1) == 0
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action := ss & 0x3
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switch action {
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case 0:
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@ -148,3 +148,10 @@ func (p *ioC0Page) poke(address uint16, value uint8) {
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}
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ss(p, value)
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}
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func ssFromBool(value bool) uint8 {
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if value {
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return ssOn
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}
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return ssOff
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}
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111
memoryManager.go
111
memoryManager.go
@ -36,8 +36,8 @@ type memoryManager struct {
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altZeroPage bool // Use extra RAM from 0x0000 to 0x01ff. And additional language card block
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altMainRAMActiveRead bool // Use extra RAM from 0x0200 to 0xbfff for read
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altMainRAMActiveWrite bool // Use extra RAM from 0x0200 to 0xbfff for write
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c3ROMActive bool // Apple2e slot 3 ROM shadow
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cxROMActive bool // Apple2e slots ROM shadow
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slotC3ROMActive bool // Apple2e slot 3 ROM shadow
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intCxROMActive bool // Apple2e slots internal ROM shadow
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activeSlot uint8 // Active slot owner of 0xc800 to 0xcfff
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// Configuration switches, Base64A
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@ -67,8 +67,47 @@ func newMemoryManager(a *Apple2) *memoryManager {
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return &mmu
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}
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func (mmu *memoryManager) accessCArea(address uint16) memoryHandler {
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if mmu.intCxROMActive {
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return mmu.physicalROMe
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}
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// First slot area
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if address <= addressLimitSlots {
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slot := uint8((address >> 8) & 0x07)
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mmu.activeSlot = slot
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if !mmu.slotC3ROMActive && (slot == 3) {
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return mmu.physicalROMe
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}
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return mmu.cardsROM[slot]
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}
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// Extra slot area
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if address == ioC8Off {
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// Reset extra slot area owner
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mmu.activeSlot = 0
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}
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if !mmu.slotC3ROMActive && (mmu.activeSlot == 3) {
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return mmu.physicalROMe
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}
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return mmu.cardsROMExtra[mmu.activeSlot]
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}
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func (mmu *memoryManager) accessLCArea(address uint16) memoryHandler {
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block := mmu.lcSelectedBlock
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if mmu.altZeroPage {
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block = 1
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}
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if address <= addressLimitDArea {
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if mmu.lcAltBank {
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return mmu.physicalDAltRAM[block]
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}
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return mmu.physicalDRAM[block]
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}
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return mmu.physicalEFRAM[block]
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}
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func (mmu *memoryManager) accessRead(address uint16) memoryHandler {
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// First two pages
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// First two pages, $00xx and $01xx
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if address <= addressLimitZero {
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if mmu.altZeroPage {
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return mmu.physicalMainRAMAlt
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@ -84,46 +123,19 @@ func (mmu *memoryManager) accessRead(address uint16) memoryHandler {
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return mmu.physicalMainRAM
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}
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// IO section
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// IO section, $C0cc
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if address <= addressLimitIO {
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return mmu.apple2.io
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}
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// Slots sections
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// Slots sections, $Cxxx
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if address <= addressLimitSlotsExtra {
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slot := uint8((address >> 8) & 0x07)
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if mmu.cxROMActive {
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return mmu.physicalROMe
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}
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// First slot area
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if address <= addressLimitSlots {
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if mmu.c3ROMActive && (slot == 3) {
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return mmu.physicalROMe
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}
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mmu.activeSlot = slot
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return mmu.cardsROM[slot]
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}
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// Extra slot area
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if address == ioC8Off {
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// Reset extra slot area owner
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mmu.activeSlot = 0
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}
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return mmu.cardsROMExtra[slot]
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return mmu.accessCArea(address)
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}
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// Upper address area
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if mmu.lcActiveRead {
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block := mmu.lcSelectedBlock
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if mmu.altZeroPage {
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block = 1
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}
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if address <= addressLimitDArea {
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if mmu.lcAltBank {
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return mmu.physicalDAltRAM[block]
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}
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return mmu.physicalDRAM[block]
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}
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return mmu.physicalEFRAM[block]
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return mmu.accessLCArea(address)
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}
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// Use ROM
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@ -131,7 +143,7 @@ func (mmu *memoryManager) accessRead(address uint16) memoryHandler {
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}
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func (mmu *memoryManager) accessWrite(address uint16) memoryHandler {
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// First two pages
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// First two pages, $00xx and $01xx
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if address <= addressLimitZero {
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if mmu.altZeroPage {
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return mmu.physicalMainRAMAlt
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@ -147,40 +159,19 @@ func (mmu *memoryManager) accessWrite(address uint16) memoryHandler {
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return mmu.physicalMainRAM
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}
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// IO section
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// IO section, $C0xx
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if address <= addressLimitIO {
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return mmu.apple2.io
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}
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// Slots sections
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// Slots sections, $Cxxx
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if address <= addressLimitSlotsExtra {
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slot := uint8((address >> 8) & 0x07)
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// First slot area
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if address <= addressLimitSlots {
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mmu.activeSlot = slot
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return mmu.cardsROM[slot]
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}
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// Extra slot area
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if address == ioC8Off {
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// Reset extra slot area owner
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mmu.activeSlot = 0
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}
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return mmu.cardsROMExtra[slot]
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return mmu.accessCArea(address)
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}
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// Upper address area
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if mmu.lcActiveWrite {
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block := mmu.lcSelectedBlock
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if mmu.altZeroPage {
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block = 1
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}
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if address <= addressLimitDArea {
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if mmu.lcAltBank {
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return mmu.physicalDAltRAM[block]
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}
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return mmu.physicalDRAM[block]
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}
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return mmu.physicalEFRAM[block]
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return mmu.accessLCArea(address)
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}
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// Use ROM
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@ -17,9 +17,9 @@ func addApple2ESoftSwitches(io *ioC0Page) {
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mmu := io.apple2.mmu
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addSoftSwitchesMmu(io, 0x02, 0x03, 0x13, &mmu.altMainRAMActiveRead, "RAMRD")
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addSoftSwitchesMmu(io, 0x04, 0x05, 0x14, &mmu.altMainRAMActiveWrite, "RAMWRT")
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addSoftSwitchesMmu(io, 0x06, 0x07, 0x15, &mmu.cxROMActive, "INTCXROM")
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addSoftSwitchesMmu(io, 0x06, 0x07, 0x15, &mmu.intCxROMActive, "INTCXROM")
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addSoftSwitchesMmu(io, 0x08, 0x09, 0x16, &mmu.altZeroPage, "ALTZP")
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addSoftSwitchesMmu(io, 0x0a, 0x0b, 0x17, &mmu.c3ROMActive, "SLOTC3ROM")
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addSoftSwitchesMmu(io, 0x0a, 0x0b, 0x17, &mmu.slotC3ROMActive, "SLOTC3ROM")
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// New IOU read softswithes
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addSoftSwitchesIou(io, 0x00, 0x01, 0x18, ioFlag80Store, "80STORE")
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@ -32,6 +32,13 @@ func addApple2ESoftSwitches(io *ioC0Page) {
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io.addSoftSwitchR(0x1C, getStatusSoftSwitch(ioFlagSecondPage), "PAGE2")
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io.addSoftSwitchR(0x1D, getStatusSoftSwitch(ioFlagHiRes), "HIRES")
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io.addSoftSwitchR(0x11, func(_ *ioC0Page) uint8 {
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return ssFromBool(mmu.lcAltBank)
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}, "BSRBANK2")
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io.addSoftSwitchR(0x12, func(_ *ioC0Page) uint8 {
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return ssFromBool(mmu.lcActiveRead)
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}, "BSRREADRAM")
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// TOOD:
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// AKD read on 0x10
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// VBL read on 0x19
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@ -50,10 +57,7 @@ func addSoftSwitchesMmu(io *ioC0Page, addressClear uint8, addressSet uint8, Addr
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}, name+"ON")
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io.addSoftSwitchR(AddressGet, func(_ *ioC0Page) uint8 {
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if *flag {
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return ssOn
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}
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return ssOff
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return ssFromBool(*flag)
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}, name)
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}
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