Trace softswitch registrations

This commit is contained in:
Ivan Izaguirre 2020-08-30 21:11:43 +02:00
parent 3a3c350748
commit ccd100677e
6 changed files with 62 additions and 58 deletions

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@ -214,6 +214,8 @@ Only valid on SDL mode
dump to the console the calls to ProDOS machine language interface calls to $BF00 dump to the console the calls to ProDOS machine language interface calls to $BF00
-traceSS -traceSS
dump to the console the sofswitches calls dump to the console the sofswitches calls
-traceSSReg
dump to the console the sofswitch registrations
-vidHDSlot int -vidHDSlot int
slot for the VidHD card, only for //e models. -1 for none (default 2) slot for the VidHD card, only for //e models. -1 for none (default 2)
-woz string -woz string

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@ -6,42 +6,12 @@ import (
"github.com/ivanizag/apple2/core6502" "github.com/ivanizag/apple2/core6502"
) )
func newApple2plus() *Apple2 { func newApple2() *Apple2 {
var a Apple2 var a Apple2
a.Name = "Apple ][+"
a.Name = "Pending"
a.mmu = newMemoryManager(&a) a.mmu = newMemoryManager(&a)
a.cpu = core6502.NewNMOS6502(a.mmu)
a.io = newIoC0Page(&a) a.io = newIoC0Page(&a)
addApple2SoftSwitches(a.io)
return &a
}
func newApple2e() *Apple2 {
var a Apple2
a.Name = "Apple IIe"
a.isApple2e = true
a.mmu = newMemoryManager(&a)
a.cpu = core6502.NewNMOS6502(a.mmu)
a.io = newIoC0Page(&a)
a.mmu.initExtendedRAM(1)
addApple2SoftSwitches(a.io)
addApple2ESoftSwitches(a.io)
return &a
}
func newApple2eEnhanced() *Apple2 {
var a Apple2
a.Name = "Apple //e"
a.isApple2e = true
a.mmu = newMemoryManager(&a)
a.cpu = core6502.NewCMOS65c02(a.mmu)
a.io = newIoC0Page(&a)
a.mmu.initExtendedRAM(1)
addApple2SoftSwitches(a.io)
addApple2ESoftSwitches(a.io)
return &a return &a
} }
@ -61,6 +31,30 @@ func (a *Apple2) setup(isColor bool, clockMhz float64, fastMode bool, traceMLI b
} }
} }
func setApple2plus(a *Apple2) {
a.Name = "Apple ][+"
a.cpu = core6502.NewNMOS6502(a.mmu)
addApple2SoftSwitches(a.io)
}
func setApple2e(a *Apple2) {
a.Name = "Apple IIe"
a.isApple2e = true
a.cpu = core6502.NewNMOS6502(a.mmu)
a.mmu.initExtendedRAM(1)
addApple2SoftSwitches(a.io)
addApple2ESoftSwitches(a.io)
}
func setApple2eEnhanced(a *Apple2) {
a.Name = "Apple //e"
a.isApple2e = true
a.cpu = core6502.NewCMOS65c02(a.mmu)
a.mmu.initExtendedRAM(1)
addApple2SoftSwitches(a.io)
addApple2ESoftSwitches(a.io)
}
func (a *Apple2) insertCard(c card, slot int) { func (a *Apple2) insertCard(c card, slot int) {
c.assign(a, slot) c.assign(a, slot)
a.cards[slot] = c a.cards[slot] = c

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@ -109,6 +109,10 @@ func MainApple() *Apple2 {
"traceSS", "traceSS",
false, false,
"dump to the console the sofswitches calls") "dump to the console the sofswitches calls")
traceSSReg := flag.Bool(
"traceSSReg",
false,
"dump to the console the sofswitch registrations")
traceHD := flag.Bool( traceHD := flag.Bool(
"traceHD", "traceHD",
false, false,
@ -142,12 +146,18 @@ func MainApple() *Apple2 {
} }
var a *Apple2 a := newApple2()
a.setup(!*mono, *cpuClock, *fastDisk, *traceMLI)
a.io.setTrace(*traceSS)
a.io.setTraceRegistrations(*traceSSReg)
a.io.setPanicNotImplemented(*panicSS)
a.setProfiling(*profile)
var charGenMap charColumnMap var charGenMap charColumnMap
initialCharGenPage := 0 initialCharGenPage := 0
switch *model { switch *model {
case "2plus": case "2plus":
a = newApple2plus() setApple2plus(a)
if *romFile == defaultInternal { if *romFile == defaultInternal {
*romFile = "<internal>/Apple2_Plus.rom" *romFile = "<internal>/Apple2_Plus.rom"
} }
@ -158,7 +168,7 @@ func MainApple() *Apple2 {
*vidHDCardSlot = -1 *vidHDCardSlot = -1
case "2e": case "2e":
a = newApple2e() setApple2e(a)
if *romFile == defaultInternal { if *romFile == defaultInternal {
*romFile = "<internal>/Apple2e.rom" *romFile = "<internal>/Apple2e.rom"
} }
@ -169,7 +179,7 @@ func MainApple() *Apple2 {
charGenMap = charGenColumnsMap2e charGenMap = charGenColumnsMap2e
case "2enh": case "2enh":
a = newApple2eEnhanced() setApple2eEnhanced(a)
if *romFile == defaultInternal { if *romFile == defaultInternal {
*romFile = "<internal>/Apple2e_Enhanced.rom" *romFile = "<internal>/Apple2e_Enhanced.rom"
} }
@ -180,7 +190,7 @@ func MainApple() *Apple2 {
charGenMap = charGenColumnsMap2e charGenMap = charGenColumnsMap2e
case "base64a": case "base64a":
a = newBase64a() setBase64a(a)
if *romFile == defaultInternal { if *romFile == defaultInternal {
err := loadBase64aRom(a) err := loadBase64aRom(a)
if err != nil { if err != nil {
@ -199,11 +209,7 @@ func MainApple() *Apple2 {
panic("Model not supported") panic("Model not supported")
} }
a.setup(!*mono, *cpuClock, *fastDisk, *traceMLI)
a.cpu.SetTrace(*traceCPU) a.cpu.SetTrace(*traceCPU)
a.io.setTrace(*traceSS)
a.io.setPanicNotImplemented(*panicSS)
a.setProfiling(*profile)
// Load ROM if not loaded already // Load ROM if not loaded already
if *romFile != "" { if *romFile != "" {

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@ -10,18 +10,11 @@ import (
Copam BASE64A adaptation. Copam BASE64A adaptation.
*/ */
// newBase64a instantiates an apple2 func setBase64a(a *Apple2) {
func newBase64a() *Apple2 {
var a Apple2
a.Name = "Base 64A" a.Name = "Base 64A"
a.mmu = newMemoryManager(&a)
a.cpu = core6502.NewNMOS6502(a.mmu) a.cpu = core6502.NewNMOS6502(a.mmu)
a.io = newIoC0Page(&a)
addApple2SoftSwitches(a.io) addApple2SoftSwitches(a.io)
addBase64aSoftSwitches(a.io) addBase64aSoftSwitches(a.io)
return &a
} }
const ( const (

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@ -57,8 +57,12 @@ func (c *cardBase) assign(a *Apple2, slot int) {
} }
for i := 0; i < 0x10; i++ { for i := 0; i < 0x10; i++ {
a.io.addSoftSwitchR(uint8(0xC80+slot*0x10+i), c._ssr[i], c._ssrName[i]) if c._ssr[i] != nil {
a.io.addSoftSwitchW(uint8(0xC80+slot*0x10+i), c._ssw[i], c._sswName[i]) a.io.addSoftSwitchR(uint8(0xC80+slot*0x10+i), c._ssr[i], c._ssrName[i])
}
if c._ssw[i] != nil {
a.io.addSoftSwitchW(uint8(0xC80+slot*0x10+i), c._ssw[i], c._sswName[i])
}
} }
} }

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@ -16,6 +16,7 @@ type ioC0Page struct {
joysticks JoysticksProvider joysticks JoysticksProvider
apple2 *Apple2 apple2 *Apple2
trace bool trace bool
traceRegistrations bool
panicNotImplemented bool panicNotImplemented bool
} }
@ -57,6 +58,10 @@ func (p *ioC0Page) setTrace(trace bool) {
p.trace = trace p.trace = trace
} }
func (p *ioC0Page) setTraceRegistrations(traceRegistrations bool) {
p.traceRegistrations = traceRegistrations
}
func (p *ioC0Page) setPanicNotImplemented(value bool) { func (p *ioC0Page) setPanicNotImplemented(value bool) {
p.panicNotImplemented = value p.panicNotImplemented = value
} }
@ -69,17 +74,17 @@ func (p *ioC0Page) addSoftSwitchRW(address uint8, ss softSwitchR, name string) {
} }
func (p *ioC0Page) addSoftSwitchR(address uint8, ss softSwitchR, name string) { func (p *ioC0Page) addSoftSwitchR(address uint8, ss softSwitchR, name string) {
//if p.softSwitchesR[address] != nil { if p.traceRegistrations {
// fmt.Printf("Addresss 0x0c%02x is already assigned for read\n", address) fmt.Printf("Softswitch registered in $c0%02x for reads as %s\n", address, name)
//} }
p.softSwitchesR[address] = ss p.softSwitchesR[address] = ss
p.softSwitchesRName[address] = name p.softSwitchesRName[address] = name
} }
func (p *ioC0Page) addSoftSwitchW(address uint8, ss softSwitchW, name string) { func (p *ioC0Page) addSoftSwitchW(address uint8, ss softSwitchW, name string) {
//if p.softSwitchesW[address] != nil { if p.traceRegistrations {
// fmt.Printf("Addresss 0x0c%02x is already assigned for write\n", address) fmt.Printf("Softswitch registered in $c0%02x for writes as %s\n", address, name)
//} }
p.softSwitchesW[address] = ss p.softSwitchesW[address] = ss
p.softSwitchesWName[address] = name p.softSwitchesWName[address] = name
} }