Ivan Izaguirre
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71fd530e26
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Fix V flag on ADC for BCD
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2021-09-26 23:29:11 +02:00 |
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Ivan Izaguirre
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76f9ae514e
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Some undocumented NOPs for 6502
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2021-09-26 18:25:11 +02:00 |
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Ivan Izaguirre
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2a7cf020ae
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Fixes for ADC and SBC on BCD mode
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2021-09-26 17:32:15 +02:00 |
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Ivan Izaguirre
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4f963b0bd6
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Cycle count accurate per the Harte test suite
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2021-09-26 01:22:08 +02:00 |
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Ivan Izaguirre
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3f916a60fa
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First run with https://github.com/TomHarte/ProcessorTests
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2021-09-25 20:33:45 +02:00 |
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Ivan Izaguirre
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95998ba37d
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Add proper extra cycle when adding an index cross boundaries on memory reads
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2020-12-06 21:18:20 +01:00 |
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Ivan Izaguirre
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c7f643623d
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Extra cycle when brancing on conditional jumps. Fixes Sammy Lighfoot woz loadind.
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2020-12-06 17:16:57 +01:00 |
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Ivan Izaguirre
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cd9c4e2b41
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Double read on INC to pass a2audit tests
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2020-09-23 18:11:47 +02:00 |
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Ivan Izaguirre
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6387e93f06
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Much faster resolution avoiding a single getSet with callbacks.
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2020-01-11 17:15:42 +01:00 |
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Ivan Izaguirre
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df41114043
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Emulation of the 65c02 processor variant.
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2019-10-11 00:06:42 +02:00 |
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Ivan Izaguirre
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55ad73d01d
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Reorg 6502 files. Count cycles. Pending extra cycles on page change.
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2019-02-28 23:54:38 +01:00 |