169 lines
4.1 KiB
Go
169 lines
4.1 KiB
Go
package core6502
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/*
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Tests from https://github.com/TomHarte/ProcessorTests
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Know issues:
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- Test 6502/v1/20_55_13 (Note 1)
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- Not implemented undocumented opcodes for NMOS (Note 2)
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- Errors on flag N for ADC in BCD mode (Note 3)
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The tests are disabled by defaut because they take long to run
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and require a huge download.
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To enable them, clone the repo https://github.com/TomHarte/ProcessorTests
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and change the variables ProcessorTestsEnable and ProcessorTestsPath.
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*/
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import (
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"encoding/json"
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"fmt"
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"io/ioutil"
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"testing"
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)
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var ProcessorTestsEnable = false
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var ProcessorTestsPath = "/home/casa/code/ProcessorTests/"
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type scenarioState struct {
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Pc uint16
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S uint8
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A uint8
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X uint8
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Y uint8
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P uint8
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Ram [][]uint16
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}
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type scenario struct {
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Name string
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Initial scenarioState
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Final scenarioState
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Cycles [][]interface{}
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}
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func TestHarteNMOS6502(t *testing.T) {
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if !ProcessorTestsEnable {
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t.Skip("TomHarte/ProcessorTests are not enabled")
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}
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s := NewNMOS6502(nil) // Use to get the opcodes names
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path := ProcessorTestsPath + "6502/v1/"
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for i := 0x00; i <= 0xff; i++ {
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mnemonic := s.opcodes[i].name
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if mnemonic != "" { // Note 2
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opcode := fmt.Sprintf("%02x", i)
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t.Run(opcode+mnemonic, func(t *testing.T) {
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t.Parallel()
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m := new(FlatMemory)
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s := NewNMOS6502(m)
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testOpcode(t, s, path, opcode, mnemonic)
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})
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//} else {
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// opcode := fmt.Sprintf("%02x", i)
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// t.Run(opcode+mnemonic, func(t *testing.T) {
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// t.Error("Opcode not implemented")
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// })
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}
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}
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}
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func TestHarteCMOS65c02(t *testing.T) {
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if !ProcessorTestsEnable {
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t.Skip("TomHarte/ProcessorTests are not enabled")
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}
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s := NewCMOS65c02(nil) // Use to get the opcodes names
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path := ProcessorTestsPath + "wdc65c02/v1/"
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for i := 0x00; i <= 0xff; i++ {
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mnemonic := s.opcodes[i].name
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opcode := fmt.Sprintf("%02x", i)
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t.Run(opcode+mnemonic, func(t *testing.T) {
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t.Parallel()
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m := new(FlatMemory)
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s := NewCMOS65c02(m)
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testOpcode(t, s, path, opcode, mnemonic)
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})
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}
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}
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func testOpcode(t *testing.T, s *State, path string, opcode string, mnemonic string) {
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data, err := ioutil.ReadFile(path + opcode + ".json")
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if err != nil {
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t.Fatal(err)
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}
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if len(data) == 0 {
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return
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}
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var scenarios []scenario
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err = json.Unmarshal(data, &scenarios)
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if err != nil {
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t.Fatal(err)
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}
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for _, scenario := range scenarios {
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if scenario.Name != "20 55 13" { // Note 1
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t.Run(scenario.Name, func(t *testing.T) {
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testScenario(t, s, &scenario, mnemonic)
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})
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}
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}
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}
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func testScenario(t *testing.T, s *State, sc *scenario, mnemonic string) {
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// Setup CPU
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start := s.GetCycles()
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s.reg.setPC(sc.Initial.Pc)
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s.reg.setSP(sc.Initial.S)
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s.reg.setA(sc.Initial.A)
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s.reg.setX(sc.Initial.X)
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s.reg.setY(sc.Initial.Y)
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s.reg.setP(sc.Initial.P)
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for _, e := range sc.Initial.Ram {
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s.mem.Poke(uint16(e[0]), uint8(e[1]))
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}
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// Execute instruction
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s.ExecuteInstruction()
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// Check result
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assertReg8(t, sc, "A", s.reg.getA(), sc.Final.A)
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assertReg8(t, sc, "X", s.reg.getX(), sc.Final.X)
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assertReg8(t, sc, "Y", s.reg.getY(), sc.Final.Y)
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if s.reg.getFlag(flagD) && (mnemonic == "ADC") {
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// Note 3
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assertFlags(t, sc, sc.Initial.P, s.reg.getP()&0x7f, sc.Final.P&0x7f)
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} else {
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assertFlags(t, sc, sc.Initial.P, s.reg.getP(), sc.Final.P)
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}
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assertReg8(t, sc, "SP", s.reg.getSP(), sc.Final.S)
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assertReg16(t, sc, "PC", s.reg.getPC(), sc.Final.Pc)
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cycles := s.GetCycles() - start
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if cycles != uint64(len(sc.Cycles)) {
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t.Errorf("Took %v cycles, it should be %v for %+v", cycles, len(sc.Cycles), sc)
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}
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}
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func assertReg8(t *testing.T, sc *scenario, name string, actual uint8, wanted uint8) {
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if actual != wanted {
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t.Errorf("Register %s is $%02x and should be $%02x for %+v", name, actual, wanted, sc)
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}
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}
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func assertReg16(t *testing.T, sc *scenario, name string, actual uint16, wanted uint16) {
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if actual != wanted {
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t.Errorf("Register %s is $%04x and should be $%04x for %+v", name, actual, wanted, sc)
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}
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}
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func assertFlags(t *testing.T, sc *scenario, initial uint8, actual uint8, wanted uint8) {
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if actual != wanted {
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t.Errorf("%08b flag diffs, they are %08b and should be %08b, initial %08b for %+v", actual^wanted, actual, wanted, initial, sc)
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}
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}
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