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D5TimingBitRWTS
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c65b66c441
commit
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@ -216,6 +216,7 @@ class RWTS:
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start_bit_index = track.bit_index
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start_bit_index = track.bit_index
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if not self.find_address_prologue(track):
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if not self.find_address_prologue(track):
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# if we can't even find a single address prologue, just give up
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# if we can't even find a single address prologue, just give up
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self.logger.debug("can't find a single address prologue so LGTM or whatever")
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break
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break
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# decode address field
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# decode address field
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address_field = self.address_field_at_point(track)
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address_field = self.address_field_at_point(track)
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@ -243,6 +244,7 @@ class RWTS:
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continue
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continue
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if not self.find_data_prologue(track):
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if not self.find_data_prologue(track):
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# if we can't find a data field prologue, just give up
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# if we can't find a data field prologue, just give up
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self.logger.debug(repr(self.data_prologue))
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break
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break
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# read and decode the data field, and verify the data checksum
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# read and decode the data field, and verify the data checksum
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decoded = self.data_field_at_point(track)
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decoded = self.data_field_at_point(track)
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@ -300,7 +302,7 @@ class UniversalRWTS(RWTS):
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return False
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return False
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def verify_address_epilogue_at_point(self, track):
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def verify_address_epilogue_at_point(self, track):
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return True
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# return True
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if not self.address_epilogue:
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if not self.address_epilogue:
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self.address_epilogue = [next(track.nibble())]
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self.address_epilogue = [next(track.nibble())]
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result = True
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result = True
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@ -351,6 +353,35 @@ class DOS33RWTS(RWTS):
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nibble_translate_table=nibble_translate_table,
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nibble_translate_table=nibble_translate_table,
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logger=logger)
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logger=logger)
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class D5TimingBitRWTS(RWTS):
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def __init__(self, logical_sectors, logger):
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data_prologue = (logical_sectors[2][0xE7],
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0xAA,
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logical_sectors[2][0xFC])
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data_epilogue = (logical_sectors[3][0x35],
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0xAA)
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nibble_translate_table = {}
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for nibble in range(0x96, 0x100):
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nibble_translate_table[nibble] = logical_sectors[4][nibble]
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RWTS.__init__(self,
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sectors_per_track=16,
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data_prologue=data_prologue,
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data_epilogue=data_epilogue,
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nibble_translate_table=nibble_translate_table,
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logger=logger)
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def find_address_prologue(self, track):
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starting_revolutions = track.revolutions
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while (track.revolutions < starting_revolutions + 2):
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if next(track.nibble()) == 0xD5:
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bit = next(track.bit())
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if bit == 0: return True:
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track.rewind(1)
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return False
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def verify_address_epilogue_at_point(self, track):
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return True
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class BasePassportProcessor: # base class
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class BasePassportProcessor: # base class
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def __init__(self, disk_image, logger_class=DefaultLogger):
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def __init__(self, disk_image, logger_class=DefaultLogger):
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self.g = PassportGlobals()
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self.g = PassportGlobals()
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@ -701,7 +732,13 @@ class BasePassportProcessor: # base class
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# check for RWTS variant that uses non-standard address for slot
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# check for RWTS variant that uses non-standard address for slot
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# LDX $1FE8 e.g. Pinball Construction Set (1983)
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# LDX $1FE8 e.g. Pinball Construction Set (1983)
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use_builtin = find.at(0x43, logical_sectors[8], b'\xAE\xE8\x1F')
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use_builtin = find.at(0x43, logical_sectors[8], b'\xAE\xE8\x1F')
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if not use_builtin:
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# check for D5+timing+bit RWTS
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if find.at(0x58, logical_sectors[3], b'\xEA\xBD\x8C\xC0\xC9\xD5'):
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self.logger.PrintByID("diskrwts")
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self.g.is_rwts = True
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return D5TimingBitRWTS(logical_sectors, self.logger)
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# TODO handle Milliken here
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# TODO handle Milliken here
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# TODO handle Adventure International here
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# TODO handle Adventure International here
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# TODO handle Infocom here
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# TODO handle Infocom here
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@ -91,6 +91,12 @@ class Track:
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n += b << bit_index
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n += b << bit_index
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yield n
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yield n
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def rewind(self, bit_count):
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self.bit_index -= 1
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if self.bit_index < 0:
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self.bit_index = self.bit_count - 1
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self.revolutions -= 1
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def find(self, sequence):
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def find(self, sequence):
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starting_revolutions = self.revolutions
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starting_revolutions = self.revolutions
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seen = [0] * len(sequence)
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seen = [0] * len(sequence)
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