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basic blocks
This commit is contained in:
Sean
parent
54b1b4b8ce
commit
c7837da33e
317
src/65816.h
Normal file
317
src/65816.h
Normal file
@ -0,0 +1,317 @@
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/** @copyright 2020 Sean Kasun */
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#pragma once
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#include "disasm.h"
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enum Addressing {
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IMP, IMM, IMMM, IMMX, IMMS, ABS, ABL, ABX, ABY, ABLX, AIX,
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ZP, ZPX, ZPY, ZPS, IND, INZ, INL, INX, INY, INLY, INS, REL, RELL,
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BANK, DB, DW, DD,
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};
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struct Opcode {
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const char *inst;
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Addressing addressing;
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InsType type;
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};
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#define op(a, b, c) {#a, b, InsType::c}
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static const Opcode opcodes[] = {
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op(brk, IMP, Return), // 00
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op(ora, INX, Normal), // 01
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op(cop, IMP, Normal), // 02
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op(ora, ZPS, Normal), // 03
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op(tsb, ZP, Normal), // 04
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op(ora, ZP, Normal), // 05
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op(asl, ZP, Normal), // 06
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op(ora, INL, Normal), // 07
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op(php, IMP, Normal), // 08
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op(ora, IMMM, Normal), // 09
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op(asl, IMP, Normal), // 0a
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op(phd, IMP, Normal), // 0b
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op(tsb, ABS, Normal), // 0c
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op(ora, ABS, Normal), // 0d
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op(asl, ABS, Normal), // 0e
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op(ora, ABL, Normal), // 0f
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op(bpl, REL, Branch), // 10
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op(ora, INY, Normal), // 11
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op(ora, INZ, Normal), // 12
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op(ora, INS, Normal), // 13
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op(trb, ZP, Normal), // 14
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op(ora, ZPX, Normal), // 15
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op(asl, ZPX, Normal), // 16
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op(ora, INLY, Normal), // 17
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op(clc, IMP, Normal), // 18
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op(ora, ABY, Normal), // 19
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op(inc, IMP, Normal), // 1a
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op(tcs, IMP, Normal), // 1b
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op(trb, ABS, Normal), // 1c
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op(ora, ABX, Normal), // 1d
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op(asl, ABX, Normal), // 1e
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op(ora, ABLX, Normal), // 1f
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op(jsr, ABS, Call), // 20
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op(and, INX, Normal), // 21
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op(jsl, ABL, Call), // 22
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op(and, ZPS, Normal), // 23
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op(bit, ZP, Normal), // 24
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op(and, ZP, Normal), // 25
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op(rol, ZP, Normal), // 26
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op(and, INL, Normal), // 27
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op(plp, IMP, Normal), // 28
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op(and, IMMM, Normal), // 29
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op(rol, IMP, Normal), // 2a
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op(pld, IMP, Normal), // 2b
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op(bit, ABS, Normal), // 2c
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op(and, ABS, Normal), // 2d
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op(rol, ABS, Normal), // 2e
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op(and, ABL, Normal), // 2f
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op(bmi, REL, Branch), // 30
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op(and, INY, Normal), // 31
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op(and, INZ, Normal), // 32
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op(and, INS, Normal), // 33
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op(bit, ZPX, Normal), // 34
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op(and, ZPX, Normal), // 35
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op(rol, ZPX, Normal), // 36
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op(and, INLY, Normal), // 37
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op(sec, IMP, Normal), // 38
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op(and, ABY, Normal), // 39
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op(dec, IMP, Normal), // 3a
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op(tsc, IMP, Normal), // 3b
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op(bit, ABX, Normal), // 3c
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op(and, ABX, Normal), // 3d
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op(rol, ABX, Normal), // 3e
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op(and, ABLX, Normal), // 3f
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op(rti, IMP, Return), // 40
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op(eor, INX, Normal), // 41
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op(db, DB, Invalid), // 42
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op(eor, ZPS, Normal), // 43
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op(mvp, BANK, Normal), // 44
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op(eor, ZP, Normal), // 45
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op(lsr, ZP, Normal), // 46
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op(eor, INL, Normal), // 47
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op(pha, IMP, Normal), // 48
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op(eor, IMMM, Normal), // 49
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op(lsr, IMP, Normal), // 4a
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op(phk, IMP, Normal), // 4b
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op(jmp, ABS, Jump), // 4c
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op(eor, ABS, Normal), // 4d
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op(lsr, ABS, Normal), // 4e
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op(eor, ABL, Normal), // 4f
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op(bvc, REL, Branch), // 50
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op(eor, INY, Normal), // 51
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op(eor, INZ, Normal), // 52
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op(eor, INS, Normal), // 53
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op(mvn, BANK, Normal), // 54
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op(eor, ZPX, Normal), // 55
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op(lsr, ZPX, Normal), // 56
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op(eor, INLY, Normal), // 57
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op(cli, IMP, Normal), // 58
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op(eor, ABY, Normal), // 59
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op(phy, IMP, Normal), // 5a
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op(tcd, IMP, Normal), // 5b
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op(jmp, ABL, Jump), // 5c
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op(eor, ABX, Normal), // 5d
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op(lsr, ABX, Normal), // 5e
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op(eor, ABLX, Normal), // 5f
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op(rts, IMP, Return), // 60
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op(adc, INX, Normal), // 61
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op(per, REL, Normal), // 62
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op(adc, ZPS, Normal), // 63
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op(stz, ZP, Normal), // 64
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op(adc, ZP, Normal), // 65
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op(ror, ZP, Normal), // 66
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op(adc, INL, Normal), // 67
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op(pla, IMP, Normal), // 68
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op(adc, IMMM, Normal), // 69
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op(ror, IMP, Normal), // 6a
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op(rtl, IMP, Return), // 6b
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op(jmp, IND, Jump), // 6c
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op(adc, ABS, Normal), // 6d
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op(ror, ABS, Normal), // 6e
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op(adc, ABL, Normal), // 6f
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op(bvs, REL, Branch), // 70
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op(adc, INY, Normal), // 71
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op(adc, INZ, Normal), // 72
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op(adc, INS, Normal), // 73
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op(stz, ZPX, Normal), // 74
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op(adc, ZPX, Normal), // 75
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op(ror, ZPX, Normal), // 76
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op(adc, INLY, Normal), // 77
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op(sei, IMP, Normal), // 78
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op(adc, ABY, Normal), // 79
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op(ply, IMP, Normal), // 7a
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op(tdc, IMP, Normal), // 7b
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op(jmp, AIX, Jump), // 7c
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op(adc, ABX, Normal), // 7d
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op(ror, ABX, Normal), // 7e
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op(adc, ABLX, Normal), // 7f
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op(bra, REL, Jump), // 80
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op(sta, INX, Normal), // 81
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op(brl, RELL, Jump), // 82
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op(sta, ZPS, Normal), // 83
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op(sty, ZP, Normal), // 84
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op(sta, ZP, Normal), // 85
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op(stx, ZP, Normal), // 86
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op(sta, INL, Normal), // 87
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op(dey, IMP, Normal), // 88
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op(bit, IMMM, Normal), // 89
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op(txa, IMP, Normal), // 8a
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op(phb, IMP, Normal), // 8b
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op(sty, ABS, Normal), // 8c
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op(sta, ABS, Normal), // 8d
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op(stx, ABS, Normal), // 8e
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op(sta, ABL, Normal), // 8f
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op(bcc, REL, Branch), // 90
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op(sta, INY, Normal), // 91
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op(sta, INZ, Normal), // 92
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op(sta, INS, Normal), // 93
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op(sty, ZPX, Normal), // 94
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op(sta, ZPX, Normal), // 95
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op(stx, ZPY, Normal), // 96
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op(sta, INLY, Normal), // 97
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op(tya, IMP, Normal), // 98
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op(sta, ABY, Normal), // 99
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op(txs, IMP, Normal), // 9a
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op(txy, IMP, Normal), // 9b
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op(stz, ABS, Normal), // 9c
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op(sta, ABX, Normal), // 9d
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op(stz, ABX, Normal), // 9e
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op(sta, ABLX, Normal), // 9f
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op(ldy, IMMX, Normal), // a0
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op(lda, INX, Normal), // a1
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op(ldx, IMMX, Normal), // a2
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op(lda, ZPS, Normal), // a3
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op(ldy, ZP, Normal), // a4
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op(lda, ZP, Normal), // a5
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op(ldx, ZP, Normal), // a6
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op(lda, INL, Normal), // a7
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op(tay, IMP, Normal), // a8
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op(lda, IMMM, Normal), // a9
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op(tax, IMP, Normal), // aa
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op(plb, IMP, Normal), // ab
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op(ldy, ABS, Normal), // ac
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op(lda, ABS, Normal), // ad
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op(ldx, ABS, Normal), // ae
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op(lda, ABL, Normal), // af
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op(bcs, REL, Branch), // b0
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op(lda, INY, Normal), // b1
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op(lda, INZ, Normal), // b2
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op(lda, INS, Normal), // b3
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op(ldy, ZPX, Normal), // b4
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op(lda, ZPX, Normal), // b5
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op(ldx, ZPY, Normal), // b6
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op(lda, INLY, Normal), // b7
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op(clv, IMP, Normal), // b8
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op(lda, ABY, Normal), // b9
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op(tsx, IMP, Normal), // ba
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op(tyx, IMP, Normal), // bb
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op(ldy, ABX, Normal), // bc
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op(lda, ABX, Normal), // bd
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op(ldx, ABY, Normal), // be
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op(lda, ABLX, Normal), // bf
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op(cpy, IMMX, Normal), // c0
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op(cmp, INX, Normal), // c1
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op(rep, IMM, Normal), // c2
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op(cmp, ZPS, Normal), // c3
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op(cpy, ZP, Normal), // c4
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op(cmp, ZP, Normal), // c5
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op(dec, ZP, Normal), // c6
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op(cmp, INL, Normal), // c7
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op(iny, IMP, Normal), // c8
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op(cmp, IMMM, Normal), // c9
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op(dex, IMP, Normal), // ca
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op(wai, IMP, Normal), // cb
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op(cpy, ABS, Normal), // cc
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op(cmp, ABS, Normal), // cd
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op(dec, ABS, Normal), // ce
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op(cmp, ABL, Normal), // cf
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op(bne, REL, Branch), // d0
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op(cmp, INY, Normal), // d1
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op(cmp, INZ, Normal), // d2
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op(cmp, INS, Normal), // d3
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op(pei, ZP, Normal), // d4
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op(cmp, ZPX, Normal), // d5
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op(DEC, ZPX, Normal), // d6
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op(cmp, INLY, Normal), // d7
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op(cld, IMP, Normal), // d8
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op(cmp, ABY, Normal), // d9
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op(phx, IMP, Normal), // da
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op(stp, IMP, Return), // db
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op(jmp, IND, Jump), // dc
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op(cmp, ABX, Normal), // dd
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op(dec, ABX, Normal), // de
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op(cmp, ABLX, Normal), // df
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op(cpx, IMMX, Normal), // e0
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op(sbc, INX, Normal), // e1
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op(sep, IMM, Normal), // e2
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op(sbc, ZPS, Normal), // e3
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op(cpx, ZP, Normal), // e4
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op(sbc, ZP, Normal), // e5
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op(inc, ZP, Normal), // e6
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op(sbc, INL, Normal), // e7
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op(inx, IMP, Normal), // e8
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op(sbc, IMMM, Normal), // e9
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op(nop, IMP, Normal), // ea
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op(xba, IMP, Normal), // eb
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op(cpx, ABS, Normal), // ec
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op(sbc, ABS, Normal), // ed
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op(inc, ABS, Normal), // ee
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op(sbc, ABL, Normal), // ef
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op(beq, REL, Branch), // f0
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op(sbc, INY, Normal), // f1
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op(sbc, INZ, Normal), // f2
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op(sbc, INS, Normal), // f3
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op(pea, IMMS, Normal), // f4
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op(sbc, ZPX, Normal), // f5
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op(inc, ZPX, Normal), // f6
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op(sbc, INLY, Normal), // f7
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op(sed, IMP, Normal), // f8
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op(sbc, ABY, Normal), // f9
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op(plx, IMP, Normal), // fa
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op(xce, IMP, Normal), // fb
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op(jsr, AIX, Call), // fc
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op(sbc, ABX, Normal), // fd
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op(inc, ABX, Normal), // fe
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op(sbc, ABLX, Normal), // ff
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};
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#undef op
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struct AddressSize {
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Addressing mode;
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int length;
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};
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static const AddressSize addressSizes[] = {
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{IMP, 1},
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{IMM, 2},
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{IMMM, 3},
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{IMMX, 3},
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{IMMS, 3},
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{ABS, 3},
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{ABL, 4},
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{ABX, 3},
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{ABY, 3},
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{ABLX, 4},
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{AIX, 3},
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{ZP, 2},
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{ZPX, 2},
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{ZPY, 2},
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{ZPS, 2},
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{IND, 3},
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{INZ, 2},
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{INL, 2},
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{INX, 2},
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{INY, 2},
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{INLY, 2},
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{INS, 2},
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{REL, 2},
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{RELL, 3},
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{BANK, 3},
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{DB, 1},
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{DW, 2},
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{DD, 4},
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};
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#define numAddressSizes (sizeof(addressSizes) / sizeof(addressSizes[0]))
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336
src/disasm.cc
336
src/disasm.cc
@ -1,10 +1,20 @@
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/** @copyright 2020 Sean Kasun */
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#include "disasm.h"
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#include "65816.h"
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#include <fstream>
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#include <iostream>
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#include <stack>
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Disassembler::Disassembler(std::shared_ptr<Fingerprints> prints) : fingerprints(prints) { }
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static std::map<Addressing, int> sizes;
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Disassembler::Disassembler(std::shared_ptr<Fingerprints> prints,
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std::map<uint32_t, std::string> symbols)
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: symbols(symbols), fingerprints(prints) {
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for (int i = 0; i < numAddressSizes; i++) {
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sizes[addressSizes[i].mode] = addressSizes[i].length;
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}
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}
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bool Disassembler::disassemble(std::vector<Segment> segments,
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std::vector<Entry> entries) {
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@ -29,7 +39,7 @@ bool Disassembler::disassemble(std::vector<Segment> segments,
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std::cerr << "Failed to open '" << fname << "' for writing" << std::endl;
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return false;
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}
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f << "Section $" << std::ios::hex << segment.segnum << " "
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f << "Section $" << hex(segment.segnum, Value) << " "
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<< segment.name << std::endl;
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if (!decode(segment.mapped, segment.mapped + segment.length)) {
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std::cerr << "Disassembly failed" << std::endl;
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@ -62,9 +72,9 @@ bool Disassembler::trace(const Entry &start) {
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int8_t len = 0;
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auto fstart = ptr->tell();
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do {
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node = node->map.value(ptr->r8(), nullptr);
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node = node->map[ptr->r8()];
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len++;
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if (node != nullptr && !node->name.isEmpty()) {
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if (node != nullptr && !node->name.empty()) {
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if (inst == nullptr) {
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inst = std::make_shared<Inst>();
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inst->type = Special;
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@ -86,7 +96,7 @@ bool Disassembler::trace(const Entry &start) {
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if (i) {
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inst->name += ", ";
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}
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inst->name += hex2(ptr->r8());
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inst->name += hex(ptr->r8(), Value);
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}
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inst->name += "}";
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inst->length += numDB;
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@ -97,18 +107,20 @@ bool Disassembler::trace(const Entry &start) {
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}
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map[addr] = inst;
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if (inst->type == Jump || inst->type == Branch || inst->type == Call) {
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auto target = target(inst, resolver);
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if (target > 0 && !labels.contains(target)) {
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workList.push({state.flags, target});
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labels.insert(target, target);
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if (inst->operType == Opr::Imm || inst->operType == Opr::Abs) {
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if (valid(inst->oper) && labels.find(inst->oper) == labels.end()) {
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workList.push({state.flags, inst->oper});
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labels.insert(std::pair<uint32_t, uint32_t>(inst->oper,
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inst->oper));
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}
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}
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}
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if (inst->type == Jump || inst->type == Branch ||
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inst->type == Return) {
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branches.insert(state.org, addr);
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branches.insert(std::pair<uint32_t, uint32_t>(state.org, addr));
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}
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if (inst->type == Invalid) {
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branches.insert(addr, addr);
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branches.insert(std::pair<uint32_t, uint32_t>(addr, addr));
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}
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} while (inst->type != Return && inst->type != Jump &&
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inst->type != Invalid);
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@ -116,6 +128,66 @@ bool Disassembler::trace(const Entry &start) {
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return true;
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}
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bool Disassembler::basicBlocks() {
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// always starts at a label
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auto address = labels.lower_bound(0)->first;
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auto block = getBlock(address);
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auto done = false;
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while (!done) {
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auto label = labels.upper_bound(address);
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auto branch = branches.upper_bound(address);
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if (label != labels.end() && (branch == branches.end() ||
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label->second < branch->second)) {
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// label was earliest
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address = label->second;
|
||||
block->length = address - block->address;
|
||||
auto next = getBlock(address);
|
||||
next->preds.append(block);
|
||||
block->succs.append(next);
|
||||
block = next;
|
||||
} else if (branch != branches.end() && (label == labels.end() ||
|
||||
branch->second <= label->second)) {
|
||||
// branch was earliest (or equal)
|
||||
auto b = map[branch->second];
|
||||
block->branchLen = b->length;
|
||||
block->length = branch->first - block->address;
|
||||
if (b->type != Return && b->type != Invalid) {
|
||||
// branch has a destination
|
||||
if (b->operType == Opr::Imm || b->operType == Opr::Abs) {
|
||||
if (valid(b->oper)) {
|
||||
auto next = getBlock(b->oper);
|
||||
next->preds.append(block);
|
||||
block->succs.append(next);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (b->type == Jump || b->type == Return || b->type == Invalid) {
|
||||
// branch doesn't continue
|
||||
auto next = labels.upper_bound(branch->second);
|
||||
if (next == labels.end()) {
|
||||
done = true;
|
||||
} else {
|
||||
address = next->second;
|
||||
block = getBlock(address);
|
||||
}
|
||||
} else {
|
||||
// branch continues
|
||||
auto next = getBlock(branch->first);
|
||||
next->preds.append(block);
|
||||
block->succs.append(next);
|
||||
block = next;
|
||||
address = block->address;
|
||||
}
|
||||
} else {
|
||||
// out of labels and branches, we screwed up
|
||||
block->length = map.lastKey() + map.last()->length - block->address;
|
||||
done = true;
|
||||
}
|
||||
}
|
||||
std::sort(blocks.begin(), blocks.end(), compareBlocks);
|
||||
return true;
|
||||
}
|
||||
|
||||
Handle Disassembler::getAddress(uint32_t address) {
|
||||
for (auto &s : segments) {
|
||||
if (address >= s.mapped && address < s.mapped + s.length) {
|
||||
@ -125,3 +197,245 @@ Handle Disassembler::getAddress(uint32_t address) {
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
bool Disassembler::valid(uint32_t address) {
|
||||
for (auto &s : segments) {
|
||||
if (address >= s.mapped && address < s.mapped + s.length) {
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
std::shared_ptr<Inst> Disassembler::decodeInst(Handle f, Entry *entry) {
|
||||
auto inst = std::make_shared<Inst>();
|
||||
auto opcode = f->r8();
|
||||
inst->name = opcodes[opcode].inst;
|
||||
inst->type = opcodes[opcode].type;
|
||||
auto mode = opcodes[opcode].addressing;
|
||||
inst->length = sizes[mode];
|
||||
if (mode == IMMM && (entry->flags & (IsEmu | IsM8))) {
|
||||
inst->length--;
|
||||
}
|
||||
if (mode == IMMX && (entry->flags & (IsEmu | IsX8))) {
|
||||
inst->length--;
|
||||
}
|
||||
entry->org += inst->length;
|
||||
uint32_t addr = entry->org;
|
||||
entry->flags &= IsFlags; // clear changed flags
|
||||
uint32_t oldFlags = entry->flags;
|
||||
switch (mode) {
|
||||
case IMP:
|
||||
inst->operType = Opr::None;
|
||||
break;
|
||||
case IMM:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::Imm;
|
||||
if (opcode == 0xe2) {
|
||||
entry->flags |= inst->oper & IsFlags;
|
||||
} else if (opcode == 0xc2) {
|
||||
entry->flags &= ~inst->oper;
|
||||
}
|
||||
if ((entry->flags ^ oldFlags) & IsX8) {
|
||||
entry->flags |= IsX8Changed;
|
||||
}
|
||||
if ((entry->flags ^ oldFlags) & IsM8) {
|
||||
entry->flags |= IsM8Changed;
|
||||
}
|
||||
break;
|
||||
case IMMM:
|
||||
if (entry->flags & (IsEmu | IsM8)) {
|
||||
inst->oper = f->r8();
|
||||
} else {
|
||||
inst->oper = f->r16();
|
||||
}
|
||||
inst->operType = Opr::Imm;
|
||||
break;
|
||||
case IMMX:
|
||||
if (entry->flags & (IsEmu | IsX8)) {
|
||||
inst->oper = f->r8();
|
||||
} else {
|
||||
inst->oper = f->r16();
|
||||
}
|
||||
inst->operType = Opr::Imm;
|
||||
break;
|
||||
case IMMS:
|
||||
inst->oper = f->r16();
|
||||
inst->operType = Opr::Imm;
|
||||
break;
|
||||
case ABS:
|
||||
inst->oper = f->r16();
|
||||
if (inst->type == InsType::Jump || inst->type == InsType::Call) {
|
||||
inst->oper |= entry->org & 0xff0000; // K
|
||||
inst->operType = Opr::Abs;
|
||||
} else {
|
||||
inst->operType = Opr::AbsB;
|
||||
}
|
||||
break;
|
||||
case ABL:
|
||||
inst->oper = f->r24();
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
case ABX:
|
||||
inst->oper = f->r16();
|
||||
if (inst->type == InsType::Jump || inst->type == InsType::Call) {
|
||||
inst->oper |= entry->org & 0xff0000; // K
|
||||
inst->operType = Opr::AbsX;
|
||||
} else {
|
||||
inst->operType = Opr::AbsXB;
|
||||
}
|
||||
break;
|
||||
case ABY:
|
||||
inst->oper = f->r16();
|
||||
if (inst->type == InsType::Jump || inst->type == InsType::Call) {
|
||||
inst->oper |= entry->org & 0xff0000; // K
|
||||
inst->operType = Opr::AbsY;
|
||||
} else {
|
||||
inst->operType = Opr::AbsYB;
|
||||
}
|
||||
break;
|
||||
case ABLX:
|
||||
inst->oper = f->r24();
|
||||
inst->operType = Opr::AbsX;
|
||||
break;
|
||||
case AIX:
|
||||
inst->oper = f->r16();
|
||||
if (inst->type == InsType::Jump || inst->type == InsType::Call) {
|
||||
inst->oper |= entry->org & 0xff0000; // K
|
||||
inst->operType = Opr::IndX;
|
||||
} else {
|
||||
inst->operType = Opr::IndXB;
|
||||
}
|
||||
break;
|
||||
case ZP:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::AbsD;
|
||||
break;
|
||||
case ZPX:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::AbsXD;
|
||||
break;
|
||||
case ZPY:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::AbsYD;
|
||||
break;
|
||||
case ZPS:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::AbsS;
|
||||
break;
|
||||
case IND:
|
||||
inst->oper = f->r16();
|
||||
if (inst->type == InsType::Jump || inst->type == InsType::Call) {
|
||||
inst->oper |= entry->org & 0xff0000; // K
|
||||
inst->operType = Opr::Ind;
|
||||
} else {
|
||||
inst->operType = Opr::IndB;
|
||||
}
|
||||
break;
|
||||
case INZ:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndD;
|
||||
break;
|
||||
case INL:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndL;
|
||||
break;
|
||||
case INX:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndX;
|
||||
break;
|
||||
case INY:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndY;
|
||||
break;
|
||||
case INLY:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndLY;
|
||||
break;
|
||||
case INS:
|
||||
inst->oper = f->r8();
|
||||
inst->operType = Opr::IndS;
|
||||
break;
|
||||
case REL:
|
||||
inst->oper = addr + static_cast<int8_t>(f->r8());
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
case RELL:
|
||||
inst->oper = addr + static_cast<int16_t>(f->r16());
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
case BANK:
|
||||
inst->oper = f->r16();
|
||||
inst->operType = Opr::Bank;
|
||||
break;
|
||||
case DB:
|
||||
inst->oper = opcode;
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
case DW:
|
||||
inst->oper = opcode | (f->r8() << 8);
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
case DD:
|
||||
inst->oper = opcode | (f->r24() << 8);
|
||||
inst->operType = Opr::Abs;
|
||||
break;
|
||||
}
|
||||
if (opcode == 0x18) {
|
||||
if (f->r8() == 0xfb) { // clc xce
|
||||
entry->flags &= 0xffffff ^ IsEmu;
|
||||
}
|
||||
f->skip(-1);
|
||||
}
|
||||
if (opcode == 0x38) {
|
||||
if (f->r8() == 0xfb) { // sec xce
|
||||
entry->flags |= IsEmu;
|
||||
}
|
||||
f->skip(-1);
|
||||
}
|
||||
if ((entry->flags ^ oldFlags) & IsEmu) {
|
||||
entry->flags |= IsEmuChanged;
|
||||
}
|
||||
inst->flags = entry->flags;
|
||||
return inst;
|
||||
}
|
||||
|
||||
std::string Disassembler::hex(uint32_t val, HexType type) {
|
||||
std::string ret;
|
||||
int width = 0;
|
||||
if (type == HexType::Address) {
|
||||
ret = symbols[val];
|
||||
}
|
||||
if (ret.empty()) {
|
||||
if ((val & ~0xff) == ~0xff) {
|
||||
ret += "$-";
|
||||
val = ~val + 1;
|
||||
width = 2;
|
||||
} else if ((val & ~0xff) == 0) {
|
||||
ret += "$";
|
||||
width = 2;
|
||||
} else if ((val & ~0xffff) == ~0xffff) {
|
||||
ret += "$-";
|
||||
val = ~val + 1;
|
||||
width = 4;
|
||||
} else if ((val & ~0xffff) == 0) {
|
||||
ret += "$";
|
||||
width = 4;
|
||||
} else if (val & 0x80000000) {
|
||||
ret += "$-";
|
||||
width = 8;
|
||||
} else {
|
||||
ret += "$";
|
||||
width = 8;
|
||||
}
|
||||
for (int i = 0; i < width; i++) {
|
||||
uint8_t ch = val >> (width - (i + 1)) * 4;
|
||||
if (ch < 10) {
|
||||
ret += static_cast<char>(ch + '0');
|
||||
} else {
|
||||
ret += static_cast<char>(ch - 10 + 'a');
|
||||
}
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
29
src/disasm.h
29
src/disasm.h
@ -26,23 +26,44 @@ enum InsType : uint16_t {
|
||||
Invalid = 0xff,
|
||||
};
|
||||
|
||||
enum HexType {
|
||||
Value = 0x01,
|
||||
Address = 0x02,
|
||||
};
|
||||
|
||||
enum class Opr {
|
||||
None = 0, Imm, Abs, AbsB, AbsD, AbsX, AbsXB, AbsXD, AbsY, AbsYB, AbsYD, AbsS,
|
||||
Ind, IndB, IndD, IndX, IndXB, IndY, IndL, IndLY, IndS, Bank,
|
||||
};
|
||||
|
||||
struct Inst {
|
||||
std::string name;
|
||||
InsType type;
|
||||
uint16_t length;
|
||||
Opr operType;
|
||||
uint32_t oper;
|
||||
uint32_t flags;
|
||||
};
|
||||
|
||||
class Disassembler {
|
||||
public:
|
||||
Disassembler(std::shared_ptr<Fingerprints> prints);
|
||||
bool disassemble(std::vector<Segment> segments, std::vector<Entry> entries);
|
||||
Disassembler(std::shared_ptr<Fingerprints> prints,
|
||||
std::map<uint32_t, std::string> symbols);
|
||||
bool disassemble(std::vector<struct Segment> segments,
|
||||
std::vector<struct Entry> entries);
|
||||
|
||||
private:
|
||||
bool trace(const Entry &start);
|
||||
bool trace(const struct Entry &start);
|
||||
bool basicBlocks();
|
||||
std::shared_ptr<Inst> decodeInst(Handle f, Entry *entry);
|
||||
Handle getAddress(uint32_t address);
|
||||
bool valid(uint32_t address);
|
||||
std::string hex(uint32_t value, HexType type);
|
||||
|
||||
std::map<uint32_t, std::string> symbols;
|
||||
std::map<uint32_t, uint32_t> labels;
|
||||
std::map<uint32_t, uint32_t> branches;
|
||||
std::vector<Segment> segments;
|
||||
std::vector<struct Segment> segments;
|
||||
std::shared_ptr<Fingerprints> fingerprints;
|
||||
std::map<uint32_t, std::shared_ptr<Inst>> map;
|
||||
};
|
||||
|
||||
24
src/main.cc
24
src/main.cc
@ -130,27 +130,33 @@ int main(int argc, char **argv) {
|
||||
|
||||
auto prints = std::make_shared<Fingerprints>();
|
||||
for (auto s : api.symbols) {
|
||||
if (s->kind == symbol::isFunction) {
|
||||
auto f = std::static_pointer_cast<symbol::Function>(s);
|
||||
if (s.second->kind == symbol::isFunction) {
|
||||
auto f = std::static_pointer_cast<symbol::Function>(s.second);
|
||||
if (f->signature.size() >= 2) {
|
||||
if (f->signature[0] >= 0) { // tool
|
||||
// ldx tool, jsl e1/0000
|
||||
std::vector<uint8_t> sig = { 0xa2, f->signature[0], f->signature[1],
|
||||
std::vector<uint8_t> sig = { 0xa2, 0x00, 0x00,
|
||||
0x22, 0x00, 0x00, 0xe1 };
|
||||
sig[1] = f->signature[0];
|
||||
sig[2] = f->signature[1];
|
||||
prints->add(sig, f->name);
|
||||
} else if (f->signature[0] == -1) { // p16/gsos
|
||||
// jsl e1/00a8
|
||||
std::vector<uint8_t> sig = { 0x22, 0xa8, 0x00, 0xe1,
|
||||
f->signature[2] & 0xff, f->signature[2] >> 8 };
|
||||
std::vector<uint8_t> sig = { 0x22, 0xa8, 0x00, 0xe1, 0x00, 0x00 };
|
||||
sig[4] = f->signature[2] & 0xff;
|
||||
sig[5] = f->signature[2] >> 8;
|
||||
prints->add(sig, f->name, f->signature[1] & 0xff);
|
||||
} else if (f->signature[0] == -2) { // p8
|
||||
// jsr bf00
|
||||
std::vector<uint8_t> sig = { 0x20, 0x00, 0xbf, f->signature[2] };
|
||||
std::vector<uint8_t> sig = { 0x20, 0x00, 0xbf, 0x00 };
|
||||
sig[3] = f->signature[2];
|
||||
prints->add(sig, f->name, f->signature[1] & 0xff);
|
||||
} else if (f->signature[0] == -3) { // smartport
|
||||
// jsr c50d
|
||||
std::vector<uint8_t> sig5 = { 0x20, 0x0d, 0xc5, f->signature[2] };
|
||||
std::vector<uint8_t> sig7 = { 0x20, 0x0d, 0xc7, f->signature[2] };
|
||||
std::vector<uint8_t> sig5 = { 0x20, 0x0d, 0xc5, 0x00 };
|
||||
std::vector<uint8_t> sig7 = { 0x20, 0x0d, 0xc7, 0x00 };
|
||||
sig5[3] = f->signature[2];
|
||||
sig7[3] = f->signature[2];
|
||||
prints->add(sig5, f->name, f->signature[1]);
|
||||
prints->add(sig7, f->name, f->signature[1]);
|
||||
}
|
||||
@ -158,6 +164,6 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
}
|
||||
|
||||
Disassembler d(prints);
|
||||
Disassembler d(prints, map.getSymbols());
|
||||
d.disassemble(segments, map.getEntries());
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user