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Fixed tab alignment for better readability
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ArthurFerreira2 2021-07-07 20:07:43 +02:00 committed by GitHub
parent 423c72ce90
commit 250aae9430
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4 changed files with 1554 additions and 1726 deletions

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@ -1,5 +1,6 @@
/* /*
puce65c02, a WDC 65c02 cpu emulator, based on puce6502 by the same author puce65c02, a WDC 65c02 cpu emulator, based on puce6502 by the same author
Last modified 1st of July 2021 Last modified 1st of July 2021
Copyright (c) 2021 Arthur Ferreira (arthur.ferreira2@gmail.com) Copyright (c) 2021 Arthur Ferreira (arthur.ferreira2@gmail.com)
@ -9,7 +10,7 @@
in the Software without restriction, including without limitation the rights in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions : furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software. all copies or substantial portions of the Software.
@ -23,12 +24,17 @@
THE SOFTWARE. THE SOFTWARE.
*/ */
/*
This version is slightly modified for reinette IIe, a french Apple IIe
emulator using SDL2 (https://github.com/ArthurFerreira2/reinette-IIe).
Please download the latest version from
https://github.com/ArthurFerreira2/puce65c02
*/
#ifndef _PUCE65C02_H #ifndef _PUCE65C02_H
#define _PUCE65C02_H #define _PUCE65C02_H
#include <cstdint>
typedef enum {run, step, stop, wait} status; typedef enum {run, step, stop, wait} status;
#define CARRY 0x01 #define CARRY 0x01
@ -40,18 +46,7 @@ typedef enum {run, step, stop, wait} status;
#define OFLOW 0x40 #define OFLOW 0x40
#define SIGN 0x80 #define SIGN 0x80
typedef struct Pbits_t {
class puce65c02 {
public:
unsigned long long int ticks;
// private:
status state;
uint16_t PC; // Program Counter
uint8_t A, X, Y, SP; // Accumulator, X and y indexes and Stack Pointer
union {
uint8_t byte;
struct {
uint8_t C : 1; // Carry uint8_t C : 1; // Carry
uint8_t Z : 1; // Zero uint8_t Z : 1; // Zero
uint8_t I : 1; // Interupt disabled uint8_t I : 1; // Interupt disabled
@ -60,29 +55,36 @@ public:
uint8_t U : 1; // Undefined uint8_t U : 1; // Undefined
uint8_t V : 1; // Overflow uint8_t V : 1; // Overflow
uint8_t S : 1; // Sign uint8_t S : 1; // Sign
}; } Pbits;
class puce65c02 {
private:
uint16_t PC; // Program Counter
uint8_t A, X, Y, SP; // Accumulator, X and y indexes and Stack Pointer
union {
uint8_t byte;
Pbits bits;
} P; // Processor Status } P; // Processor Status
public: public:
puce65c02() { ticks = 0; RST(); } unsigned long long int ticks;
puce65c02(uint16_t address) { ticks = 0; RST(); PC = address; }
~puce65c02();
uint16_t getPC() { return PC; }; status state;
void setPC(uint16_t address) { PC = address; };
puce65c02();
~puce65c02();
void RST(); void RST();
void IRQ(); void IRQ();
void NMI(); void NMI();
uint16_t exec(unsigned long long int cycleCount); uint16_t exec(unsigned long long int cycleCount);
#if __TESTS__ uint16_t getPC();
void dasm(uint16_t address); void setPC(uint16_t address);
void printRegs();
int getRegs(char* buffer); int getRegs(char* buffer);
int getCode(uint16_t address, char* buffer, int size, int numLines); int getCode(uint16_t address, char* buffer, int size, int numLines);
#endif
}; };
#endif #endif