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Delete scratch.cpp

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notes
CALL -151
Emulating an enhanced Apple //e with an Apple IIe Extended 80-Column Text Card, with 64K of additional RAM and a disk ][ interface card in slot 6 with two floppy drives
Problems and bugs :
inverted space is normal ....
# Color Bit Pattern
01 Black 0xFF000000,
02 Dark blue 0xFFCD741C,
09 Magenta Dk red 0xFF5639E2,
Violet purple 0xFFAD6E7E,
04 Light blue 0xFFDFB290,
05 Brown 0xFF225897,
Dark green 0xFF80811F,
Gray1 0xFF7A8289,
Medium blue 0xFFE4A856,
10 Pink 0xFFF0CEFF,
Gray2 0xFF8F979E,
green 0xFF31C090,
13 Orange 0xFF156CEA,
Aqua Lt green 0xFFD5D29F,
15 Yellow 0xFFA6FDFF,
16 White 0xFFFFFFFF
GOOD:
const uint32_t dhcolor[16] = {
0xFF000000, // 01 Black
0xFFCD741C, // 02 Dark blue
0xFF80811F, // 03 Dark green
0xFFDFB290, // 04 Light blue
0xFF225897, // 05 Brown
0xFF7A8289, // Gray1
0xFF31C090, // green
0xFFE4A856, // Medium blue
0xFF5639E2, // 09 Magenta Dk red
0xFFAD6E7E, // Violet purple
0xFF8F979E, // Gray2
0xFFD5D29F, // Aqua Lt green
0xFF156CEA, // 13 Orange
0xFFF0CEFF, // 10 Pink
0xFFA6FDFF, // 15 Yellow
0xFFFFFFFF // 16 White
};
GOOD:
const uint32_t dlcolor[16] = {
0xFF000000, // 01 Black
0xFFCD741C, // 02 Dark blue
0xFF80811F, // 03 Dark green
0xFFDFB290, // 04 Light blue
0xFF225897, // 05 Brown
0xFF7A8289, // Gray1
0xFF31C090, // green
0xFFE4A856, // Medium blue
0xFF5639E2, // 09 Magenta Dk red
0xFFAD6E7E, // Violet purple
0xFF8F979E, // Gray2
0xFFD5D29F, // Aqua Lt green
0xFF156CEA, // 13 Orange
0xFFF0CEFF, // 10 Pink
0xFFA6FDFF, // 15 Yellow
0xFFFFFFFF // 16 White
};
# Color Bit Pattern
1 Black 0000 #121315 0xFF131512, #000000
9 Brown 0001 #874912 0xFF491287,
5 Dark green 0010 #238681 0xFF868123,
13 green 0011 #94C434 0xFFC43494,
3 Dark blue 0100 #1E79D2 0xFF79D21E,
11 Gray2 0101 #9D9690 0xFF96909D,
7 Medium blue 0110 #6BBDF9 0xFFBDF96B,
15 Aqua Lt green 0111 #99CDCB 0xFFCDCB99,
2 Magenta Dk Red 1000 #E73C5C 0xFF3C5CE7,
10 Orange 1001 #EE7420 0xFF7420EE,
6 Gray1 1010 #9C9791 0xFF97919C,
14 Yellow 1011 #FEFCA5 0xFFFCA5FE,
4 Violet purple 1100 #9384C2 0xFF84C293,
12 Pink 1101 #F7B5D8 0xFFB5D8F7,
8 Light blue 1110 #A2C4F2 0xFFC4F2A2,
16 White 1111 #FFFFFF 0xFFFFFFFF
const uint32_t dhcolor[16] = {
0xFF000000, 0xFF5639E2, 0xFFCD741C, 0xFFAD6E7E,
0xFF80811F, 0xFF7A8289, 0xFFE4A856, 0xFFDFB290,
0xFF225897, 0xFF156CEA, 0xFF8F979E, 0xFFF0CEFF,
0xFF31C090, 0xFFA6FDFF, 0xFFD5D29F, 0xFFFFFFFF
};
from aIIinPC
const uint32_t hdcolor[16] = {
0xFF131512,
0xFF3C5CE7,
0xFF79D21E,
0xFF84C293,
0xFF868123,
0xFF97919C,
0xFFBDF96B,
0xFFC4F2A2,
0xFF491287,
0xFF7420EE,
0xFF96909D,
0xFFB5D8F7,
0xFFC43494,
0xFFFCA5FE,
0xFFCDCB99,
0xFFFFFFFF
};
BAD :
const uint32_t color[16] = {
0xFF000000, 0xFF5639E2, 0xFF225897, 0xFF156CEA,
0xFF80811F, 0xFF7A8289, 0xFF31C090, 0xFFA6FDFF,
0xFFCD741C, 0xFFAD6E7E, 0xFF8F979E, 0xFFF0CEFF,
0xFFE4A856, 0xFFDFB290, 0xFFD5D29F, 0xFFFFFFFF
};
BAD :
const uint32_t dhcolor[16] = {
0xFF000000, 0xFF225897, 0xFF80811F, 0xFF31C090,
0xFFCD741C, 0xFF8F979E, 0xFFE4A856, 0xFFD5D29F,
0xFF5639E2, 0xFF156CEA, 0xFF7A8289, 0xFFA6FDFF,
0xFFAD6E7E, 0xFFF0CEFF, 0xFFDFB290, 0xFFFFFFFF
};
BAD :
const uint32_t dhcolor[16] = {
0xFFFFFFFF,
0xFFDFB290,
0xFFF0CEFF,
0xFFAD6E7E,
0xFFA6FDFF,
0xFF7A8289,
0xFF156CEA,
0xFF5639E2,
0xFFD5D29F,
0xFFE4A856,
0xFF8F979E,
0xFFCD741C,
0xFF31C090,
0xFF80811F,
0xFF225897,
0xFF000000
};
ROMS : https://comp.sys.apple2.narkive.com/yOkYv09h/rom-identification
Apple IIe
342-0134-A EF
342-0135-A CD
341-0150-A Keyboard (UK)
341-0151-A Keyboard (DE)
342-0160 Video (UK)
Apple //e Enhanced
342-0303 EF
342-0304 CD
342-0265 Video (Mousetext US)
Apple //e Platinum
342-0349-A CF
342-0150-A Keyboard (UK)
342-0273-A Video (Mousetext UK)
342-0275-A Video (Mousetext DE)
//e and //ee :
KEYBOARD :
Three special keys-Control, Shift, and Caps Lock-change the
codes generated by the other keys. The Control key is similar to the
ASCII CTRL key.
Three other keys have special functions: the Reset key, and two keys
marked with apples, one outlined (Open Apple) and one solid
(Solid Apple). Pressing the Reset key with the Control key depressed
resets the Apple Ile, as described in Chapter 4. The Apple keys are
connected to the one-bit game inputs, described later in this
chapter.
On the extended keyboard lie the Solid Apple key Is labeled
Option: the Solid Apple and Option keys are functionally
Identical. Also note that manuals accompanying products with
the Solid Apple labeled as Option may refer to the Open Apple
key as simply the Apple key
$COOO Keyboard data and strobe
$C010 Any-key-down flag and dear-strobe switch
Your program can find out whether any key is down, except the
Reset, Control, Shift, Caps Lock, Open Apple, and Solid Apple (or
Option, on the extended keyboard Ile) keys, by reading from
location $COOO
The Open Apple and Solid Apple keys are connected to switches 0
and 1 of the game I/0 connector inputs. If OA is pressed, switch 0 is
"pressed," and if Solid Apple is pressed, switch 1 is "pressed."
On the extended keyboard lie, the Shift key Is connected to
switch 2 of the game 1/0 ports via the X6 jumper (single-wire
Shift-key mod jumper).
Two more special keys are the Apple keys, Open Apple and Solid
Apple, located on either side of the Space bar. These keys are
connected to the one-bit game inputs, which are described later in
this chapter in the section •switch Inputs." Pressing them in
combination with the Control and Reset keys causes the built-in
firmware to perform special reset and self-test cycles, described
with the reset routine in Chapter 4.
VIDEO :
composite video compatible with the standard set by the NTSC
For a clear 80-column display, you must use a high-resolution video monitor
with a bandwidth of 14 MHz or greater.
When you turn on power or reset the Apple Ile, the 80-column
firmware is inactive and the Apple IIe displays the primary
character set, even if an 80-column text card is installed. When you
activate the 80-column firmware, it switches to the alternate
character set.
There are actually two versions of 40-column text mode sup-
ported by the //e. The "standard" 40-column mode is the one that
is usually in effect and is easily identified by its characteristic
"checkerboard" cursor that is displayed whenever keyboard in-
formation is being requested. The other version is the "special"
40-column mode that is available when the //e's 80-column firm-
ware is being used; in this mode the cursor is an inverse block that
does not flash
Once you are in 80-column mode, you can switch between the
80-column mode and the special 40-column mode whenever key-
board information is being requested by using the two special
escape sequences discussed in Chapter 6: ESC 4 and ESC 8. For
example, if you are in 80-column mode and you want to enter the
special 40-column mode, enter the sequence
ESC 4
If you want to go in the opposite direction, enter the sequence
ESC 8
// TODO : implement double hi-res :
// high-resolution graphics, 140 by 192, in 6 colors
// high-resolution graphics, 280 by 192, in black and white
// double high-resolution graphics, 140 by 192, in 16 colors (with optional 64K text card)
// double high-resolution graphics, 560 by 192, in black and white (with optional 64K text card)
===
integration is Dear IMGUI
show :
- registers
- live disassembly
- memory dump one window per page ?
- video memory, page 1, page 2
- sound shape
- disassembler
- joystick setup / live view
- live callstack view with support for imported symbols
- stepping by cycle / frame
- VRAM viewer - HIRES page 1, page 2
- audio buffer viewer, with pretty waveform plots
- savestate support in the most hacky way possible
===
void GUI::renderHoverText(const char *fmt, ...) {
va_list args;
va_start(args, fmt);
if (ImGui::IsItemHovered()) {
ImGui::BeginTooltip();
ImGui::TextV(fmt, args);
ImGui::EndTooltip();
}
va_end(args);
}
===
float fps = ImGui::GetIO().Framerate;
ImGui::Text("FPS: %.1f (%.1fx speed)", fps, fps / 61.0f);
===
ImGui::Text("Save state: ");
ImGui::PushID(0);
for (int i = 0; i < 10; ++i) {
if (i > 0)
ImGui::SameLine();
if (ImGui::SmallButton(std::to_string(i).c_str())) {
emu->saveState(i);
}
}
ImGui::PopID();
===
ImGui::Checkbox("Fast forward", &emu->cpu.fastForward);
ImGui::Checkbox("Step mode", &emu->cpu.stepMode);
if (ImGui::Button("Step instruction (space)")) {
emu->cpu.stepInst = true;
}
if (ImGui::Button("Step frame (f)")) {
emu->cpu.stepFrame = true;
}
===
ImGui::Text("cycle: %d", emu->cpu.c); // ticks
===
if (ImGui::CollapsingHeader("Disassembly @ PC", ImGuiTreeNodeFlags_DefaultOpen)) {
char buf[25 * 20];
buf[0] = '\0';
emu->cpu.disassemble(emu->cpu.r.pc, 20, buf);
ImGui::Text("%s", buf);
}
===
case SDLK_F1: // SAVES
if (ctrl) {
if (saveFloppy(0))
SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_INFORMATION, "Save", "\nDisk 1 saved back to file\n", NULL);
else
SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR, "Save", "\nTError while saving Disk 1\n", NULL);
} else if (alt) {
if (saveFloppy(1))
SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_INFORMATION, "Save", "\nDisk 2 saved back to file\n", NULL);
else
SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_ERROR, "Save", "\nError while saving Disk 2\n", NULL);
} else {
SDL_ShowSimpleMessageBox(SDL_MESSAGEBOX_WARNING, "Save", "CTRL-F1 to save D1\nALT-F1 to save D2\n", NULL);
}
break;
===
case SDLK_F2: { // SCREENSHOTS
sshot = SDL_GetWindowSurface(wdo);
SDL_RenderReadPixels(rdr, NULL, SDL_GetWindowPixelFormat(wdo), sshot->pixels, sshot->pitch);
workDir[workDirSize] = 0;
int i = -1, a = 0, b = 0;
while (disk[0].filename[++i] != '\0') {
if (disk[0].filename[i] == '\\') a = i;
if (disk[0].filename[i] == '.') b = i;
}
strncat(workDir, "screenshots\\", 14);
if (a != b) strncat(workDir, disk[0].filename + a, b - a);
else strncat(workDir, "no disk", 10);
strncat(workDir, ".bmp", 5);
SDL_SaveBMP(sshot, workDir);
SDL_FreeSurface(sshot);
break;
}
===
if (opened_popup) {
ImGui::SetKeyboardFocusHere();
}
===
ImGui::Begin("RAM", &show_ram_window);
if (ImGui::Button("SEARCH")) {};
ImGui::SameLine();
if (ImGui::Button("DISASSEMBLE")) {};
ImGui::SameLine();
if (ImGui::Button("SET PC")) {};
ImGui::Separator();
ImGui::End();
===
----------------------------------------------------------------
| |
| |
| Rockwell |
| |
| 666 5555555 CCCC 000 22222 |
| 6 5 C C 0 0 2 2 |
| 6 5 C 0 0 0 2 |
| 666666 555555 C 0 0 0 222 |
| 6 6 5 C 0 0 0 2 |
| 6 6 5 C C 0 0 2 |
| 66666 555555 CCCC 000 2222222 |
| |
| 65C02 CMOS MICROPROCESSOR Instruction Set Summary |
| |
| |
| |
| |
| |
| _________ _________ |
| _| \__/ |_ ___ |
| Vss |_|1 40|_| RES <-- |
| _| |_ |
| --> RDY |_|2 39|_| CLK2 --> |
| _| |_ |
| <-- CLK1 |_|3 38|_| NC |
| ___ _| |_ |
| --> IRQ |_|4 37|_| CLK0 <-- |
| _| |_ |
| NC |_|5 36|_| NC |
| ___ _| |_ |
| --> NMI |_|6 35|_| NC |
| _| |_ _ |
| --> SYNC |_|7 34|_| R/W --> |
| _| |_ |
| Vcc |_|8 33|_| DB7 <--> |
| _| |_ |
| <-- A0 |_|9 32|_| DB6 <--> |
| _| |_ |
| <-- A1 |_|10 65C02 31|_| DB5 <--> |
| _| |_ |
| <-- A2 |_|11 30|_| DB4 <--> |
| _| |_ |
| <-- A3 |_|12 29|_| DB3 <--> |
| _| |_ |
| <-- A4 |_|13 28|_| DB2 <--> |
| _| |_ |
| <-- A5 |_|14 27|_| DB1 <--> |
| _| |_ |
| <-- A6 |_|15 26|_| DB0 <--> |
| _| |_ |
| <-- A7 |_|16 25|_| A15 --> |
| _| |_ |
| <-- A8 |_|17 24|_| A14 --> |
| _| |_ |
| <-- A9 |_|18 23|_| A13 --> |
| _| |_ |
| <-- A10 |_|19 22|_| A12 --> |
| _| |_ |
| <-- A11 |_|20 21|_| Vss |
| |______________________| |
| |
| |
| |
| |
| |
| |
|Written by Jonathan Bowen |
| Programming Research Group |
| Oxford University Computing Laboratory |
| 8-11 Keble Road |
| Oxford OX1 3QD |
| England |
| |
| Tel +44-865-273840 |
| |
|Created November 1984 |
|Updated April 1985 |
|Issue 1.1 Copyright (C) J.P.Bowen 1985|
----------------------------------------------------------------
----------------------------------------------------------------
|Mnem. |Op|NVBDIZC|A#ZBIRX@|~|Description |Notes |
|------+--+-------+--------+-+---------------------+-----------|
|ADC s|6D|**---**| XxX XX|4|Add with Carry |A=A+s+C %|
|AND s|2D|*----*-| XxX XX|4|Logical AND |A=A&s %|
|ASL d|0E|*----**| xx |6|Arith. Shift Left |d={C,d,0}<-|
|ASLA |0A|*----**|X |2|Arith. Shift Left |A={C,d,0}<-|
|BBRb z|0F|-------| * X |2|Branch if Bit Reset |If s<b>=0 |
|BBSb z|8F|-------| * X |2|Branch if Bit Set |If s<b>=1 |
|BCC a|90|-------| X |2|Branch if Carry Clear|If C=0(4~)%|
|BCS a|B0|-------| X |2|Branch if Carry Set |If C=1(4~)%|
|BEQ a|F0|-------| X |2|Branch if Equal |If Z=1(4~)%|
|BIT s|2C|**---*-| Xxx |4|Bit Test |A&s $|
|BMI a|30|-------| X |2|Branch if Minus |If N=1(4~)%|
|BNE a|D0|-------| X |2|Branch if Not Equal |If Z=0(4~)%|
|BPL a|10|-------| X |2|Branch if Plus |If N=0(4~)%|
|BRA a|80|-------| X |2|Branch Always |PC=a (4~)%|
|BRK |00|--+-1--| X |7|Break(-[S]={PC+2,P}) |PC=[FFFEH] |
|BVC a|50|-------| X |2|Branch if Overflw Clr|If V=0(4~)%|
|BVS a|70|-------| X |2|Branch if Overflw Set|If V=1(4~)%|
|CLC |18|------0| X |2|Clear Carry flag |C=0 |
|CLD |D8|---0---| X |2|Clear Decimal mode |D=0 |
|CLI |58|----0--| X |2|Clear Int. disable |I=0 |
|CLV |B8|-0-----| X |2|Clear Overflow flag |V=0 |
|CMP s|CD|*----**| XxX XX|4|Compare |A-s |
|CPX s|EC|*----**| X** |4|Compare index reg. |X-s |
|CPY s|CC|*----**| X** |4|Compare index reg. |Y-s |
|DEC d|CE|*----*-| xx |6|Decrement |d=d-1 |
|DECA |3A|*----*-|X |6|Decrement Acc. |A=A-1 |
|DEX |CA|*----*-| X |2|Decrement index reg. |X=X-1 |
|DEY |88|*----*-| X |2|Decrement index reg. |Y=Y-1 |
|EOR s|4D|*----*-| XxX XX|4|Logical Exclusive OR |A=Axs %|
|INC d|EE|*----*-| xx |6|Increment |d=d+1 |
|INCA |1A|*----*-|X |6|Increment Acc. |A=A+1 |
|INX |E8|*----*-| X |2|Increment index reg. |X=X+1 |
|INY |C8|*----*-| X |2|Increment index reg. |Y=Y+1 |
|JMP s|4C|-------| * X|3|Jump |PC=s $|
|JSR s|20|-------| * |6|Jump to Subroutine |-[S]=PC+2=s|
|LDA s|AD|*----*-| XxX XX|4|Load Accumulator |A=s %|
|LDX s|AE|*----*-| Xyy |4|Load index register |X=s $%|
|LDY s|AC|*----*-| Xxx |4|Load index register |Y=s %|
|LSR d|4E|0----**| xx |6|Logical Shift Right |d=->{0,d,C}|
|LSRA |4A|0----**|X |2|Logical Shift Right |A=->{0,A,C}|
|NOP |EA|-------| X |2|No Operation | |
|ORA s|0D|*----*-| XxX XX|4|Logical Inclusive OR |A=Avs |
|PHA |48|-------| X |3|Push Accumulator |-[S]=A |
|PHP |08|-------| X |3|Push status register |-[S]=P |
|PHX |DA|-------| X |2|Push index register |-[S]=X |
|PHY |5A|-------| X |2|Push index register |-[S]=Y |
|PLA |68|-------| X |4|Pull Accumulator |A=[S]+ |
|PLP |28|*******| X |4|Pull status register |P=[S]+ |
|PLX |FA|-------| X |2|Pull index register |X=[S]+ |
|PLY |7A|-------| X |2|Pull index register |Y=[S]+ |
|RMBb d|07|-------| * |5|Reset Memory Bit |d<b>=0 |
|ROL d|2E|*----**| xx |6|Rotate Left |d={C,d}<- |
|ROLA |2A|*----**|X |2|Rotate Left Acc. |A={C,A}<- |
|ROR d|6E|*----**| xx |6|Rotate Right |d=->{C,d} |
|RORA |6A|*----**|X |2|Rotate Right Acc. |A=->{C,A} |
|RTI |40|*******| X |6|Return from Interrupt|{PC,P}=[S]+|
|RTS |60|-------| X |6|Return from Subr. |PC={[S]+}+1|
|SBC s|ED|*----**| XxX XX|4|Subtract with Carry |A=A-s-C %|
|SEC |38|------1| X |2|Set Carry flag |C=1 |
|SED |F8|---1---| X |2|Set Decimal mode |D=1 |
|SEI |78|----1--| X |2|Set Interrupt disable|I=1 |
|SMBb d|87|-------| * |5|Set Memory Bit |d<b>=1 |
|STA d|8D|-------| xX XX|4|Store Accumulator |d=A |
|STX d|8E|-------| y* |4|Store index register |d=X |
|STY d|8C|-------| x* |4|Store index register |d=Y |
|STZ d|9C|-------| xx |4|Store Zero |d=0 $|
|TAX |AA|*----*-| X |2|Transfer Accumulator |X=A |
|TAY |A8|*----*-| X |2|Transfer Accumulator |Y=A |
|TRB d|1C|**---*-| ** |2|Test and Reset Bits |d=~A&d |
|TSB d|0C|**---*-| ** |2|Test and Set Bits |d=Avd |
|TSX |BA|*----*-| X |2|Transfer Stack ptr |X=S |
|TXA |8A|*----*-| X |2|Transfer index reg. |A=X |
|TXS |9A|-------| X |2|Transfer index reg. |S=X |
|TYA |98|*----*-| X |2|Transfer index reg. |A=Y |
|------+--+-------+--------+-+---------------------------------|
| |XX| | |X|Hexadecimal opcode/no. of cycles |
----------------------------------------------------------------
----------------------------------------------------------------
|Mnemonic |NVBDIZC|A#ZBIRX@|Description |
|---------+-------+--------+-----------------------------------|
| P |-*01+ | |Unaff/affected/reset/set/stack set |
| N |N | |Negative status (Bit 7) |
| V | V | |Overflow status (Bit 6) |
| B | B | |Break command indicator (Bit 4) |
| D | D | |Decimal mode control (Bit 3) |
| I | I | |Interrupt disable control (Bit 2) |
| Z | Z | |Zero status (Bit 1) |
| C | C| |Carry status (Bit 0) |
|------------------+--------+----------------------------------|
| |* |Only non-indexed mode valid |
| |x |X and non-indexed mode valid |
| |y |Y and non-indexed mode valid |
| |X |All modes valid |
|-----------------+--------+-----------------------------------|
| | |Add XXH to opcode |+XXH| |
| | |Subtract XXH from opcode |-XXH| |
| | |Add X to number of cycles | |+X|
| | |Subtract X from cycles | |-X|
|-----------------+--------+---------------------------+----+--|
| b | |Bit number (b=0-7) |+b0H| |
| A |A |Accumulator | | |
| #n | # |Immediate |-0CH|-2|
| #n | # | ditto (opcode = XDH) | X9H| 2|
| BIT #n | # | ditto (special case) | 89H| 2|
| <n | Z |Zero page |-08H|-1|
| STZ n | Z | ditto (special case) | 64H| 3|
| n | * |Zero page (direct mode) |-08H|-1|
| n,X | x |Zero page indexed (X) |+08H|+0|
| n,Y | y |Zero Page indexed (Y) |+08H|+0|
| >nn | B |Absolute |+00H|+0|
| nn | * |Absolute (extended mode) |+00H|+0|
| nn,X | x |Absolute indexed (X) |+10H|+0|
| nn,Y | y |Absolute indexed (Y) |+0CH|+0|
| LDX nn,Y | y | ditto (special case) | BEH| 4|
| | I |Implicit | | |
| a | R |Relative (PC=PC+1+offset) | |+2|
| [nn,X] | x |Indexed indirect (X) |-0CH|+2|
| [nn],Y | y |Indirect indexed (Y) |+04H|+1|
| [nn] | @|Absolute indirect |+05H|+1|
| JMP [nn] | @| ditto (special case) | 6CH| 5|
|--------------------------+-----------------------------------|
| A |Accumulator (8-bit) |
| P |Processor status register (8-bit) |
| PC |Program Counter (16-bit) |
| S |Stack pointer (9-bit, MSB=1) |
| X |Index register X (8-bit) |
| Y |Index register Y (8-bit) |
|--------------------------+-----------------------------------|
| a |Relative address (-128 to +127) |
| b |Bit number (0 to 7) |
| d |Destination |
| n |8-bit expression (0 to 255) |
| nn |16-bit expression (0 to 65535) |
| s |Source |
| z |Zero page, relative address (n,a) |
|--------------------------+-----------------------------------|
| + - |Arithmetic addition/subtraction |
| * / |Arithmetic multiplication/division |
| & ~ |Logical AND/NOT |
| v x |Logical inclusive/exclusive OR |
| <- -> |Rotate left/right |
| [ ] |Indirect addressing |
| [ ]+ |Post-increment indirect addressing |
| -[ ] |Pre-decrement indirect addressing |
| { } |Combination of operands |
| < > |Bit number |
| $ |Special case for addressing mode |
| % |~s=~s+1 if crossing page boundary |
|--------------------------+-----------------------------------|
|0000H to 00FFH |Page 0 (see zero page addressing) |
|0100H to 01FFH |Page 1 (stack area, 01FFH = start) |
|XX00H to XXFFH |Page n (where n=XXH) |
|FFFAH to FFFBH |Non maskable interrupt vector(NMI) |
|FFFCH to FFFDH |Reset (RES) vector |
|FFFEH to FFFFH |Interrupt Request vector (IRQ) |
|FFFEH to FFFFH |Break command vector (see BRK) |
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