2012-04-10 23:31:47 +00:00
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/+
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+ cpu/d6502.d
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+
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+ Copyright: 2012 Ed McCardell, 2007 Gerald Stocker
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+
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+ This file is part of twoapple-reboot.
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+
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+ twoapple-reboot is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ twoapple-reboot is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with twoapple-reboot; if not, write to the Free Software
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+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+/
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module cpu.d6502;
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import std.array, std.format;
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import cpu.ctfe_d6502;
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template is6502(T)
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{
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enum is6502 = __traits(getMember, T, "_chip") == "6502";
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}
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template is65C02(T)
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{
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enum is65C02 = __traits(getMember, T, "_chip") == "65C02";
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}
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2012-04-14 01:35:40 +00:00
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final class Cpu(string chip, MEM, CLK)
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if (__traits(compiles, {
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MEM m; ubyte val; ushort addr;
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val = m.read(addr);
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m.write(addr, val);
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CLK c; int cycles;
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version(Cumulative) c.tick(cycles);
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else c.tick();
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}))
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2012-04-10 23:31:47 +00:00
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{
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static assert(chip == "6502" || chip == "65C02" || chip == "65c02");
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enum _isCpu = true;
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enum _chip = (chip == "6502" ? "6502" : "65C02");
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2012-04-14 01:35:40 +00:00
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MEM memory;
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CLK clock;
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2012-04-10 23:31:47 +00:00
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ubyte A, X, Y, S;
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ushort PC;
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// The status flags.
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ubyte N, Z;
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bool V, D, I, C;
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2012-04-14 01:35:40 +00:00
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version(OpDelegates)
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2012-04-11 13:27:46 +00:00
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{
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2012-04-14 01:35:40 +00:00
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mixin(OpArrayDef());
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2012-04-13 11:03:22 +00:00
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version(Cumulative) { int cycles; }
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2012-04-11 13:27:46 +00:00
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ushort address, base;
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ubyte data;
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}
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2012-04-10 23:31:47 +00:00
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2012-04-14 01:35:40 +00:00
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this(MEM memory, CLK clock)
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2012-04-10 23:31:47 +00:00
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{
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2012-04-14 07:07:02 +00:00
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this.memory = memory;
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this.clock = clock;
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2012-04-14 01:35:40 +00:00
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version(OpDelegates) mixin(OpArrayInit());
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2012-04-10 23:31:47 +00:00
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}
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final void statusFromByte(ubyte p)
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{
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N = p;
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V = ((p & 0x40) != 0);
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D = ((p & 0x08) != 0);
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I = ((p & 0x04) != 0);
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Z = ((p & 0x02) ? 0 : 1);
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C = ((p & 0x01) != 0);
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}
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final ubyte statusToByte()
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{
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return (C ? 0x01 : 0) |
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((Z == 0) ? 0x02 : 0) |
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(I ? 0x04 : 0) |
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(D ? 0x08 : 0) |
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0x30 | // break and reserved both set
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(V ? 0x40 : 0) |
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(N & 0x80);
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}
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2012-04-14 06:43:03 +00:00
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bool keepRunning;
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2012-04-14 10:33:56 +00:00
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bool signalActive;
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bool resetLow;
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2012-04-14 06:43:03 +00:00
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2012-04-10 23:31:47 +00:00
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final void run(bool continuous)
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{
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keepRunning = continuous;
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ubyte opcode;
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static if (!opArray)
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{
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2012-04-13 11:03:22 +00:00
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version(Cumulative) { int cycles; }
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2012-04-10 23:31:47 +00:00
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ushort address, base;
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ubyte data;
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}
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2012-04-14 06:43:03 +00:00
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do
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{
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2012-04-14 10:33:56 +00:00
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version(Cumulative) { static if (!opArray) cycles = 1; }
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else { clock.tick(); }
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if (signalActive) handleSignals();
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2012-04-10 23:31:47 +00:00
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opcode = memory.read(PC++);
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2012-04-13 11:03:22 +00:00
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mixin(OpExecute(_chip));
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2012-04-10 23:31:47 +00:00
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} while (keepRunning);
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}
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2012-04-14 10:33:56 +00:00
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// TODO: irq/nmi
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void handleSignals()
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{
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if (resetLow) doReset();
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// XXX fix when more than one signal
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signalActive = resetLow;
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}
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void doReset()
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{
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mixin(Tick() ~ Tick() ~
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Peek(STACK) ~ DecSP() ~
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Peek(STACK) ~ DecSP() ~
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Peek(STACK) ~ DecSP());
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I = true;
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resetLow = false;
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mixin(ReadWord(_PC, "RESET_VECTOR") ~
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Done());
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}
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2012-04-14 01:35:40 +00:00
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version(OpDelegates) mixin (OpMethods(_chip));
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2012-04-10 23:31:47 +00:00
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}
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enum ushort IRQ_VECTOR = 0xFFFE;
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2012-04-14 10:33:56 +00:00
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enum ushort RESET_VECTOR = 0xFFFC;
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2012-04-10 23:31:47 +00:00
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//alias Cpu!("6502", false, false) T1;
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//alias Cpu!("6502", false, true) T2;
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//alias Cpu!("6502", true, false) T3;
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//alias Cpu!("6502", true, true) T4;
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//alias Cpu!("65C02", false, false) T5;
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//alias Cpu!("65C02", false, true) T6;
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//alias Cpu!("65C02", true, false) T7;
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//alias Cpu!("65C02", true, true) T8;
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/+
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void main()
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{
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import std.stdio;
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2012-04-12 02:05:29 +00:00
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writeln(OpBody(0x11, "6502", true, false));
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2012-04-10 23:31:47 +00:00
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}
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+/
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