407 lines
9.8 KiB
D
407 lines
9.8 KiB
D
/+
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+ ioummu.d
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+
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+ Copyright: 2007 Gerald Stocker
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+
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+ This file is part of twoapple-reboot.
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+
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+ twoapple-reboot is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ twoapple-reboot is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with twoapple-reboot; if not, write to the Free Software
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+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+/
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import memory;
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import device.base;
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import system.io; // XXX XXX too many dependencies?
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import video.base;
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import peripheral.langcard;
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import iomem;
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struct MemMap
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{
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Memory X0000_01FF;
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Memory X0200_03FF;
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Memory X0400_07FF;
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Memory X0800_1FFF;
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Memory X2000_3FFF;
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Memory X4000_BFFF;
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void reboot()
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{
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X0000_01FF.reboot();
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X0200_03FF.reboot();
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X0400_07FF.reboot();
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X0800_1FFF.reboot();
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X2000_3FFF.reboot();
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X4000_BFFF.reboot();
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}
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}
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class IOU
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{
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IO io_;
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SignalBase signal;
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bool dHGR;
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this(IO ioDevices, SignalBase sig)
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{
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io_ = ioDevices;
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signal = sig;
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}
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void resetAn0()
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{
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io_.annun.ann_0_Off();
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}
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void resetAn1()
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{
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io_.annun.ann_1_Off();
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}
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void resetAn2()
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{
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io_.annun.ann_2_Off();
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}
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void resetAn3()
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{
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io_.annun.ann_3_Off();
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dHGR = true;
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signal.dHGRChange(true);
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}
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void setAn0()
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{
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io_.annun.ann_0_On();
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}
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void setAn1()
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{
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io_.annun.ann_1_On();
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}
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void setAn2()
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{
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io_.annun.ann_2_On();
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}
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void setAn3()
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{
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io_.annun.ann_3_On();
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dHGR = false;
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signal.dHGRChange(false);
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}
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ubyte readDHGR()
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{
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io_.paddles.trigger();
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return (dHGR ? 0x80 : 0x00);
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}
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void triggerTimers()
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{
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io_.paddles.trigger();
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}
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mixin(InitSwitches("", [
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mixin(MakeSwitch([0xC058], "R0W", "resetAn0")),
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mixin(MakeSwitch([0xC059], "R0W", "setAn0")),
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mixin(MakeSwitch([0xC05A], "R0W", "resetAn1")),
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mixin(MakeSwitch([0xC05B], "R0W", "setAn1")),
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mixin(MakeSwitch([0xC05C], "R0W", "resetAn2")),
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mixin(MakeSwitch([0xC05D], "R0W", "setAn2")),
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mixin(MakeSwitch([0xC05E], "R0W", "resetAn3")),
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mixin(MakeSwitch([0xC05F], "R0W", "setAn3")),
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// XXX next two only for enhanced:
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mixin(MakeSwitch([0xC07F], "R7", "readDHGR")),
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mixin(MakeSwitch([0xC07F], "W", "triggerTimers"))
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]));
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}
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class MMU
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{
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LanguageCard_IIe himemManager;
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AddressDecoder decoder;
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AuxiliaryCard auxCard;
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IOMem_IIe ioMem;
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ScannerBase scanner;
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ubyte delegate() kbdLatch;
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MemMap[2] mem;
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this()
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{
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himemManager = new LanguageCard_IIe();
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}
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void reboot()
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{
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himemManager.reboot();
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mem[0].reboot();
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}
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void reset()
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{
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himemManager.reset();
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ioMem.reset();
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}
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void init(SoftSwitchPage switches, AuxiliaryCard auxCard_,
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AddressDecoder addrDecode, DataMem mainRam, DataMem mainRom)
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{
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auxCard = auxCard_;
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decoder = addrDecode;
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himemManager.auxslot = auxCard.himem;
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himemManager.initSwitches(switches);
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himemManager.init(decoder, &mainRom.read,
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&mainRom.write);
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initMem(mainRam);
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initSwitches(switches);
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ioMem.initSwitches(switches);
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}
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void initMem(DataMem mainRam)
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{
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mem[0].X0000_01FF = new SliceMem(0x0000, 0x0200, mainRam);
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mem[0].X0200_03FF = new SliceMem(0x0200, 0x0200, mainRam);
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mem[0].X0400_07FF = new SliceMem(0x0400, 0x0400, mainRam);
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mem[0].X0800_1FFF = new SliceMem(0x0800, 0x1800, mainRam);
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mem[0].X2000_3FFF = new SliceMem(0x2000, 0x2000, mainRam);
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mem[0].X4000_BFFF = new SliceMem(0x4000, 0x8000, mainRam);
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mem[1] = auxCard.mem;
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}
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void initIO(ScannerBase scn, ubyte delegate() peekLatch)
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{
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kbdLatch = peekLatch;
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scanner = scn;
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ioMem.kbdLatch = kbdLatch;
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himemManager.kbdLatch = kbdLatch;
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}
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bool switchPage2, switchHires, switch80Store;
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bool ramRd, ramWrt, altZP;
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void mapVidMem(bool rd, bool wrt)
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{
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decoder.installRead(mem[cast(int)rd].X0400_07FF);
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decoder.installWrite(mem[cast(int)wrt].X0400_07FF);
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if (switchHires)
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{
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mapHiresVidMem(rd, wrt);
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}
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}
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void mapHiresVidMem(bool rd, bool wrt)
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{
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decoder.installRead(mem[cast(int)rd].X2000_3FFF);
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decoder.installWrite(mem[cast(int)wrt].X2000_3FFF);
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}
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void resetRamRd()
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{
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ramRd = false;
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changeRamSwitch(ramRd, true, false);
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}
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void setRamRd()
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{
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ramRd = true;
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changeRamSwitch(ramRd, true, false);
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}
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void resetRamWrt()
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{
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ramWrt = false;
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changeRamSwitch(ramWrt, false, true);
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}
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void setRamWrt()
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{
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ramWrt = true;
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changeRamSwitch(ramWrt, false, true);
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}
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void changeRamSwitch(bool sw, bool rd, bool wrt)
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{
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int bank = cast(int)sw;
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decoder.install(mem[bank].X0200_03FF, rd, wrt);
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if (!switch80Store)
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decoder.install(mem[bank].X0400_07FF, rd, wrt);
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decoder.install(mem[bank].X0800_1FFF, rd, wrt);
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if ((!switch80Store) || (!switchHires))
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decoder.install(mem[bank].X2000_3FFF, rd, wrt);
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decoder.install(mem[bank].X4000_BFFF, rd, wrt);
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}
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void resetAltZP()
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{
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altZP = false;
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himemManager.enableAuxSlot(false);
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decoder.install(mem[0].X0000_01FF);
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}
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void setAltZP()
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{
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altZP = true;
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himemManager.enableAuxSlot(true);
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decoder.install(mem[1].X0000_01FF);
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}
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void reset80Store()
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{
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if (switchPage2)
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scanner.page2SwitchOn();
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else
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scanner.page2SwitchOff();
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switch80Store = false;
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mapVidMem(ramRd, ramWrt);
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}
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void set80Store()
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{
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scanner.page2SwitchOff();
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switch80Store = true;
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mapVidMem(switchPage2, switchPage2);
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}
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void resetPage2()
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{
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if (!switch80Store) scanner.page2SwitchOff();
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switchPage2 = false;
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if (switch80Store) mapVidMem(switchPage2, switchPage2);
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}
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void setPage2()
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{
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if (!switch80Store) scanner.page2SwitchOn();
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switchPage2 = true;
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if (switch80Store) mapVidMem(switchPage2, switchPage2);
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}
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void resetHires()
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{
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scanner.hiresSwitchOff();
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switchHires = false;
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if (switch80Store) mapHiresVidMem(ramRd, ramWrt);
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}
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void setHires()
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{
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scanner.hiresSwitchOn();
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switchHires = true;
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if (switch80Store) mapHiresVidMem(switchPage2, switchPage2);
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}
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ubyte readKbdSwitch(bool sw)
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{
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return kbdLatch() | (sw ? 0x80 : 0x00);
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}
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ubyte readRamRd()
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{
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return readKbdSwitch(ramRd);
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}
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ubyte readRamWrt()
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{
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return readKbdSwitch(ramWrt);
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}
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ubyte readAltZP()
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{
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return readKbdSwitch(altZP);
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}
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ubyte read80Store()
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{
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return readKbdSwitch(switch80Store);
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}
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ubyte readPage2()
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{
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return readKbdSwitch(switchPage2);
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}
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ubyte readHires()
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{
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return readKbdSwitch(switchHires);
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}
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mixin(InitSwitches("", [
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mixin(MakeSwitch([0xC000], "W", "reset80Store")),
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mixin(MakeSwitch([0xC001], "W", "set80Store")),
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mixin(MakeSwitch([0xC002], "W", "resetRamRd")),
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mixin(MakeSwitch([0xC003], "W", "setRamRd")),
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mixin(MakeSwitch([0xC004], "W", "resetRamWrt")),
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mixin(MakeSwitch([0xC005], "W", "setRamWrt")),
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mixin(MakeSwitch([0xC008], "W", "resetAltZP")),
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mixin(MakeSwitch([0xC009], "W", "setAltZP")),
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mixin(MakeSwitch([0xC013], "R", "readRamRd")),
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mixin(MakeSwitch([0xC014], "R", "readRamWrt")),
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mixin(MakeSwitch([0xC016], "R", "readAltZP")),
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mixin(MakeSwitch([0xC018], "R", "read80Store")),
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mixin(MakeSwitch([0xC01C], "R", "readPage2")),
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mixin(MakeSwitch([0xC01D], "R", "readHires")),
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mixin(MakeSwitch([0xC054], "R0W", "resetPage2")),
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mixin(MakeSwitch([0xC055], "R0W", "setPage2")),
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mixin(MakeSwitch([0xC056], "R0W", "resetHires")),
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mixin(MakeSwitch([0xC057], "R0W", "setHires"))
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]));
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}
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class AuxiliaryCard
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{
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HighRam_IIe himem;
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MemMap mem;
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VideoPages vidPages;
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abstract void reboot();
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abstract void reset();
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}
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class Extended80ColumnCard : AuxiliaryCard
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{
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PrimaryMem auxRam;
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this()
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{
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auxRam = new PrimaryMem(0x0000, 0xC000);
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auxRam.debugName = "Aux RAM";
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himem = new HighRam_IIe(false, 1);
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himem.setDebugName("Aux high RAM");
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vidPages.lores1 = new SliceMem(0x0400, 0x0400, auxRam);
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vidPages.lores2 = new SliceMem(0x0800, 0x0400, auxRam);
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vidPages.hires1 = new SliceMem(0x2000, 0x2000, auxRam);
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vidPages.hires2 = new SliceMem(0x4000, 0x2000, auxRam);
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mem.X0000_01FF = new SliceMem(0x0000, 0x0200, auxRam);
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mem.X0200_03FF = new SliceMem(0x0200, 0x0200, auxRam);
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mem.X0400_07FF = new SliceMem(0x0400, 0x0400, auxRam);
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mem.X0800_1FFF = new SliceMem(0x0800, 0x1800, auxRam);
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mem.X2000_3FFF = new SliceMem(0x2000, 0x2000, auxRam);
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mem.X4000_BFFF = new SliceMem(0x4000, 0x8000, auxRam);
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}
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void reboot()
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{
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auxRam.reboot();
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vidPages.reboot();
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mem.reboot();
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}
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void reset() {}
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}
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