414 lines
9.2 KiB
D
414 lines
9.2 KiB
D
/+
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+ memory.d
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+
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+ Copyright: 2007 Gerald Stocker
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+
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+ This file is part of twoapple-reboot.
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+
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+ twoapple-reboot is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ twoapple-reboot is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with twoapple-reboot; if not, write to the Free Software
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+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+/
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import std.conv;
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class Memory
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{
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ushort baseAddress;
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uint blockSize;
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string debugName;
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this(ushort baseAddr, uint size)
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{
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assert(baseAddr + size <= 0x10000,
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"Memory block larger than 64K");
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assert((baseAddr % 0x0100) == 0,
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"Memory block does not start on page boundary");
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assert((size % 0x0100) == 0,
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"Memory block does not end on page boundary");
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baseAddress = baseAddr;
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blockSize = size;
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}
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abstract ubyte read(ushort addr);
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abstract void write(ushort addr, ubyte val);
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void reboot() {}
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}
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class ZeroMem : Memory
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{
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this(ushort baseAddr, uint size)
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{
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super(baseAddr, size);
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}
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ubyte read(ushort addr) { return 0; }
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void write(ushort addr, ubyte val) {}
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}
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class DataMem : Memory
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{
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ubyte* data;
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ubyte data_[];
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this(ushort baseAddr, uint size)
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{
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super(baseAddr, size);
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}
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ubyte read(ushort addr)
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{
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return data[addr - baseAddress];
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}
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void write(ushort addr, ubyte val)
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{
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data[addr - baseAddress] = val;
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}
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}
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class PrimaryMem : DataMem
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{
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this(ushort baseAddr, uint size)
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{
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super(baseAddr, size);
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}
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void reboot()
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{
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data_ = new ubyte[blockSize];
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data = data_.ptr;
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}
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}
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class Rom : DataMem
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{
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this(ushort baseAddr, uint size, ubyte[] rom)
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{
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super(baseAddr, size);
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data_ = rom;
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data = data_.ptr;
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}
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void write(ushort addr, ubyte val) {}
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}
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class SliceMem : DataMem
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{
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DataMem otherMem;
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this(ushort baseAddr, uint size, DataMem other)
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{
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super(baseAddr, size);
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otherMem = other;
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debugName = otherMem.debugName;
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}
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void reboot()
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{
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int otherStart = baseAddress - otherMem.baseAddress;
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int otherEnd = otherStart + blockSize;
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assert((otherStart >= 0) && (otherEnd <= otherMem.blockSize),
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"Memory slice out of range");
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data_ = otherMem.data_[otherStart..otherEnd];
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data = data_.ptr;
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}
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}
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class BankMem : DataMem
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{
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ubyte[][] banks;
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string[] debugNames;
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this(ushort baseAddr, uint size, uint numBanks)
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{
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super(baseAddr, size);
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banks.length = numBanks;
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debugNames.length = numBanks;
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}
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void setDebugNames(string name)
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{
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if (debugNames.length > 1)
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{
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for (int n = 0; n < debugNames.length; ++n)
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{
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debugNames[n] = name ~ " bank " ~ to!string(n);
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}
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}
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else
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{
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debugNames[0] = name;
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}
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}
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void reboot()
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{
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for (int b = 0; b < banks.length; ++b)
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{
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banks[b] = new ubyte[blockSize];
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}
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setBank(0);
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}
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void setBank(int bankNum)
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{
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data_ = banks[bankNum];
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data = data_.ptr;
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debugName = debugNames[bankNum];
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}
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}
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class SubBankMem : DataMem
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{
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ubyte[][][] banks;
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string[][] debugNames;
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int primaryBank, subBank;
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int numBanks, numSubBanks;
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this(ushort baseAddr, uint size, uint numBanks_, uint numSubBanks_)
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{
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super(baseAddr, size);
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banks.length = numBanks = numBanks_;
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debugNames.length = numBanks;
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numSubBanks = numSubBanks_;
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for (int b = 0; b < numBanks; ++b)
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{
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banks[b].length = numSubBanks_;
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debugNames[b].length = numSubBanks_;
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}
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}
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void setDebugNames(string[] names)
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{
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for (int b = 0; b < numBanks; ++b)
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{
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for (int n = 0; n < numSubBanks; ++n)
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{
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debugNames[b][n] = names[b] ~ " bank " ~ to!string(n);
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}
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}
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}
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void reboot()
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{
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for (int b = 0; b < banks.length; ++b)
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{
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for (int s = 0; s < banks[b].length; ++s)
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{
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banks[b][s] = new ubyte[blockSize];
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}
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}
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primaryBank = subBank = 0;
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setSubBank(0);
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setPrimaryBank(0);
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}
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void setPrimaryBank(uint bank)
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{
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primaryBank = bank;
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data_ = banks[bank][subBank];
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data = data_.ptr;
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debugName = debugNames[bank][subBank];
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}
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void setSubBank(uint bank)
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{
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subBank = bank;
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data_ = banks[primaryBank][bank];
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data = data_.ptr;
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debugName = debugNames[primaryBank][bank];
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}
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}
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alias ubyte delegate(ushort) ReadFunc;
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alias void delegate(ushort, ubyte) WriteFunc;
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class AddressDecoder
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{
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ReadFunc readPages[256];
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WriteFunc writePages[256];
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Memory readResponders[256];
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Memory writeResponders[256];
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void nullWrite(ushort addr, ubyte val) {}
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public:
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ubyte delegate(ushort) nullRead;
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void installSwitches(SoftSwitchPage switches)
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{
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readPages[0xC0] = &switches.read;
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writePages[0xC0] = &switches.write;
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}
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ubyte opIndex(ushort addr)
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{
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return readPages[addr >> 8](addr);
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}
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ubyte opIndexAssign(ubyte val, ushort addr)
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{
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writePages[addr >> 8](addr, val);
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return val;
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}
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// XXX address read only/write only code
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void install(Memory block, bool forRead = true, bool forWrite = true)
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{
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uint base = block.baseAddress >> 8;
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uint size = block.blockSize >> 8;
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for (uint pg = base; pg < base + size; ++pg)
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{
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if (pg == 0xC0) continue;
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if (forRead)
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{
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readPages[pg] = &block.read;
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readResponders[pg] = block;
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}
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if (forWrite)
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{
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writePages[pg] = &block.write;
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writeResponders[pg] = block;
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}
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}
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}
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void installNull(uint baseAddress, uint blockSize, bool forRead = true,
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bool forWrite = true)
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{
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uint base = baseAddress >> 8;
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uint size = blockSize >> 8;
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for (uint pg = base; pg < base + size; ++pg)
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{
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if (pg == 0xC0) continue;
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if (forRead)
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{
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readPages[pg] = nullRead;
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readResponders[pg] = null;
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}
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if (forWrite)
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{
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writePages[pg] = &nullWrite;
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writeResponders[pg] = null;
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}
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}
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}
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void installRead(Memory block)
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{
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install(block, true, false);
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}
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void installWrite(Memory block)
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{
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install(block, false, true);
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}
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string memoryReadName(ushort addr)
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{
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int page = addr >> 8;
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if (readResponders[page] is null) return null;
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return readResponders[page].debugName;
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}
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Memory readResponse(int page)
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{
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return readResponders[page];
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}
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Memory writeResponse(int page)
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{
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return writeResponders[page];
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}
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}
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class SoftSwitchPage : Memory
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{
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private:
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ReadFunc[256] readSwitches;
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ubyte[256] bitsReturned;
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WriteFunc[256] writeSwitches;
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ubyte nullRead(ushort addr) { return 0; }
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void nullWrite(ushort addr, ubyte val) {}
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public:
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ReadFunc floatingBus;
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this()
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{
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super(0xC000, 0x0100);
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for (int addr = 0xC000; addr < 0xC100; ++addr)
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{
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writeSwitches[addr & 0xFF] = &nullWrite;
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}
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}
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void setFloatingBus(ReadFunc floatingBus_)
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{
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floatingBus = floatingBus_;
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for (int addr = 0xC000; addr < 0xC100; ++addr)
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{
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if (readSwitches[addr & 0xFF] is null)
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readSwitches[addr & 0xFF] = floatingBus;
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}
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}
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void setReadSwitch(ushort addr, ReadFunc read_, ubyte bitsReturned_)
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{
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readSwitches[addr - 0xC000] = read_;
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bitsReturned[addr - 0xC000] = bitsReturned_;
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}
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void setR0Switch(ushort addr, ReadFunc read_)
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{
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setReadSwitch(addr, read_, 0);
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}
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void setR7Switch(ushort addr, ReadFunc read_)
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{
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setReadSwitch(addr, read_, 0x80);
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}
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void setRSwitch(ushort addr, ReadFunc read_)
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{
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setReadSwitch(addr, read_, 0xFF);
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}
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void setWSwitch(ushort addr, WriteFunc write_)
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{
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writeSwitches[addr - 0xC000] = write_;
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}
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final ubyte read(ushort addr)
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{
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ubyte ret = readSwitches[addr - 0xC000](addr);
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ubyte mask = bitsReturned[addr - 0xC000];
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if (mask < 0xFF)
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{
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ret = (ret & mask) | (floatingBus(addr) & (mask ^ 0xFF));
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}
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return ret;
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}
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final void write(ushort addr, ubyte val)
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{
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writeSwitches[addr - 0xC000](addr, val);
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}
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}
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