759 lines
21 KiB
D
759 lines
21 KiB
D
/+
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+ d6502/cpu.d
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+
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+ Copyright: 2007 Gerald Stocker
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+
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+ This file is part of Twoapple.
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+
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+ Twoapple is free software; you can redistribute it and/or modify
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+ it under the terms of the GNU General Public License as published by
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+ the Free Software Foundation; either version 2 of the License, or
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+ (at your option) any later version.
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+
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+ Twoapple is distributed in the hope that it will be useful,
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ GNU General Public License for more details.
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+
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+ You should have received a copy of the GNU General Public License
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+ along with Twoapple; if not, write to the Free Software
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+ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+/
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import d6502.base;
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class Cpu : CpuBase
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{
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static string InitOpcodes()
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{
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string initCalls;
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for (int op = 0; op < 256; ++op)
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{
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initCalls ~= "opcodes[0x" ~ hexByte(op) ~ "] = &opcode" ~
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hexByte(op) ~ ";\n";
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}
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return initCalls;
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}
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this()
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{
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mixin(InitOpcodes());
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flag = new StatusRegister();
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}
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const ushort STACK_BASE = 0x0100;
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const ushort NMI_VECTOR = 0xFFFA;
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const ushort RESET_VECTOR = 0xFFFC;
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const ushort IRQ_VECTOR = 0xFFFE;
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void delegate()[256] opcodes;
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bool continueExecution;
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version(CycleAccuracy) bool finalCycle;
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version(CumulativeCycles) int totalCycles;
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debug(disassemble)
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{
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import hacking.debugger;
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import std.stdio;
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}
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final override void run(bool continuous)
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{
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assert ((memoryRead !is null) && (memoryWrite !is null));
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version(CycleAccuracy) assert (tick !is null);
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continueExecution = continuous;
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do
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{
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if (signalActive) handleSignals();
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opcodePC = programCounter;
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opcode = read(programCounter++);
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version(CycleAccuracy) finalCycle = false;
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version(CumulativeCycles) totalCycles = 0;
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/+ TODO: call sync delegate +/
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opcodes[opcode]();
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debug(disassemble)
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{
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writefln(Debugger.disassemble(this, cmosMap)
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~ Debugger.displayRegisters(this));
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}
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} while (continueExecution);
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}
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final override void stop()
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{
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continueExecution = false;
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}
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version(CycleAccuracy)
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{
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final override bool checkFinalCycle()
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{
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return finalCycle;
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}
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}
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final override void resetLow()
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{
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resetActive = signalActive = true;
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}
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final override void nmiLow(bool signalLow)
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{
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nmiActive = signalLow;
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if (!signalLow) nmiArmed = true;
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signalActive = testSignals();
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}
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final override void irqLow(bool signalLow)
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{
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irqActive = signalLow;
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signalActive = testSignals();
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}
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final bool testSignals()
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{
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return (resetActive || nmiActive || irqActive);
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}
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final void handleSignals()
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{
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bool checkNMI()
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{
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if (nmiActive && nmiArmed)
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{
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nmiArmed = false;
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return true;
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}
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return false;
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}
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if (resetActive) doReset();
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else if (checkNMI()) do_IRQ_or_NMI(NMI_VECTOR);
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else if ((!flag.interrupt) && irqActive) do_IRQ_or_NMI(IRQ_VECTOR);
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}
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void do_IRQ_or_NMI(ushort vector)
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{
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doInterrupt(vector, (flag.toByte() & ~0x10));
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}
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final void doInterrupt(ushort vector, ubyte statusByte)
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{
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pushWord(programCounter);
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push(statusByte);
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flag.interrupt = true;
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programCounter = readWord(vector, vector + 1);
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version(CumulativeCycles) ticks(totalCycles);
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}
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void doReset()
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{
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version(CycleAccuracy)
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{
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tick(); tick();
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}
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version(CumulativeCycles)
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{
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totalCycles += 2;
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}
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peek(STACK_BASE + stackPointer);
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--stackPointer;
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peek(STACK_BASE + stackPointer);
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--stackPointer;
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peek(STACK_BASE + stackPointer);
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--stackPointer;
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flag.interrupt = true;
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resetActive = false;
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signalActive = testSignals();
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programCounter = readWord(RESET_VECTOR, RESET_VECTOR + 1);
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version(CumulativeCycles) ticks(totalCycles);
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}
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final ubyte read(ushort addr)
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{
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version(CycleAccuracy) tick();
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version(CumulativeCycles) ++totalCycles;
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return memoryRead(addr);
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}
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final void write(ushort addr, ubyte val)
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{
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version(CycleAccuracy) tick();
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version(CumulativeCycles) ++totalCycles;
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memoryWrite(addr, val);
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}
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final void peek(ushort addr)
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{
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version(CycleAccuracy) tick();
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version(CumulativeCycles) ++totalCycles;
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version(StrictMemoryAccess) memoryRead(addr);
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}
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final void poke(ushort addr, ubyte val)
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{
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version(CycleAccuracy) tick();
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version(CumulativeCycles) ++totalCycles;
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version(StrictMemoryAccess) memoryWrite(addr, val);
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}
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final ubyte readFinal(ushort addr)
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{
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version(CycleAccuracy)
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{
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finalCycle = true;
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tick();
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}
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version(CumulativeCycles) ticks(++totalCycles);
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return memoryRead(addr);
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}
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final void writeFinal(ushort addr, ubyte val)
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{
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version(CycleAccuracy)
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{
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finalCycle = true;
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tick();
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}
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version(CumulativeCycles) ticks(++totalCycles);
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memoryWrite(addr, val);
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}
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final ushort readWord(ushort addrLo, ushort addrHi)
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{
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ushort word = read(addrLo);
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return word | (read(addrHi) << 8);
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}
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final void push(ubyte val)
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{
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write((STACK_BASE + stackPointer), val);
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--stackPointer;
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/+ TODO: call stack overflow delegate +/
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}
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final void pushWord(ushort val)
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{
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push(val >> 8);
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push(val & 0xFF);
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}
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final ubyte readStack()
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{
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++stackPointer;
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/+ TODO: call stack underflow delegate +/
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return read(STACK_BASE + stackPointer);
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}
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final ubyte pull()
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{
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peek(STACK_BASE + stackPointer);
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return readStack();
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}
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final ushort pullWord()
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{
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ushort word = pull();
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return word | (readStack() << 8);
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}
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final ubyte readByteOperand()
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{
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return (operand1 = read(programCounter++));
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}
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final ushort readWordOperand()
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{
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operand1 = read(programCounter++);
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operand2 = read(programCounter++);
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return (operand1 | (operand2 << 8));
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}
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ushort* spuriousAddress;
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ushort badAddress, baseAddress, primaryAddress;
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ubyte readVal, writeVal;
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final ushort tryShortcut(bool noShortcut, ushort goodAddress)
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{
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badAddress = (baseAddress & 0xFF00) | cast(ubyte)goodAddress;
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if (noShortcut || (badAddress != goodAddress)) peek(*spuriousAddress);
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return goodAddress;
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}
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final void addrRelative(byte offset)
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{
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peek(programCounter);
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baseAddress = programCounter;
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programCounter = tryShortcut(false, programCounter + offset);
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}
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final void addrZeropage()
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{
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primaryAddress = readByteOperand();
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}
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final void addrAbsolute()
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{
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primaryAddress = readWordOperand();
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}
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final void addrZeropageX()
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{
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baseAddress = badAddress = readByteOperand();
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peek(*spuriousAddress);
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primaryAddress = cast(ubyte)(baseAddress + xIndex);
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}
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final void addrZeropageY()
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{
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baseAddress = badAddress = readByteOperand();
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peek(*spuriousAddress);
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primaryAddress = cast(ubyte)(baseAddress + yIndex);
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}
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final void addrIndirectX()
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{
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baseAddress = badAddress = readByteOperand();
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peek(*spuriousAddress);
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ushort vector = cast(ubyte)(baseAddress + xIndex);
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primaryAddress = readWord(vector, cast(ubyte)(vector + 1));
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}
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final void addrAbsoluteX(bool write)
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{
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baseAddress = readWordOperand();
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primaryAddress = tryShortcut(write, baseAddress + xIndex);
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}
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final void addrAbsoluteY(bool write)
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{
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baseAddress = readWordOperand();
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primaryAddress = tryShortcut(write, baseAddress + yIndex);
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}
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final void addrIndirectY(bool write)
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{
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ubyte vector = readByteOperand();
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baseAddress = readWord(vector, cast(ubyte)(vector + 1));
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primaryAddress = tryShortcut(write, baseAddress + yIndex);
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}
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void dec_addWithCarry(ubyte val)
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{
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uint bcdSum = (accumulator & 0x0F) + (val & 0x0F) + flag.carry;
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if (bcdSum >= 10)
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bcdSum = (bcdSum - 10) | 0x10;
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bcdSum += (accumulator & 0xF0) + (val & 0xF0);
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flag.negative_ = bcdSum;
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flag.overflow =
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(!((accumulator ^ val) & 0x80)) && ((val ^ bcdSum) & 0x80);
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if (bcdSum > 0x9f)
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bcdSum += 0x60;
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flag.zero_ = accumulator + val + (flag.carry ? 1 : 0);
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flag.carry = (bcdSum > 0xFF);
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accumulator = bcdSum;
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}
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void dec_subWithCarry(ubyte val)
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{
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uint diff = accumulator - val - (flag.carry ? 0 : 1);
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flag.overflow =
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((accumulator ^ diff) & 0x80) &&
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((accumulator ^ val) & 0x80);
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uint al = (accumulator & 0x0F) - (val & 0x0F) -
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(flag.carry ? 0 : 1);
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uint ah = (accumulator >> 4) - (val >> 4);
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if (al & 0x10)
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{
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al -= 6;
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ah--;
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}
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if (ah & 0x10)
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ah -= 6;
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flag.carry = (diff < 0x100);
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flag.zero_ = flag.negative_ = diff;
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accumulator = (ah << 4) + (al & 0x0F);
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}
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final void hex_addWithCarry(ubyte val)
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{
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uint sum = accumulator + val + flag.carry;
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flag.overflow =
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(!((accumulator ^ val) & 0x80)) && ((val ^ sum) & 0x80);
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flag.carry = (sum > 0xFF);
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flag.zero_ = flag.negative_ = (accumulator = sum);
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}
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final void hex_subWithCarry(ubyte val)
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{
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uint diff = accumulator - val - (flag.carry ? 0 : 1);
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flag.overflow =
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((accumulator ^ diff) & 0x80) &&
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((accumulator ^ val) & 0x80);
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flag.carry = (diff < 0x100);
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flag.zero_ = flag.negative_ = (accumulator = diff);
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}
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final ubyte compare(ubyte reg, ubyte val)
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{
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flag.carry = (reg >= val);
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return reg - val;
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}
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final void bitTest(ubyte val)
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{
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flag.negative_ = val;
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flag.zero_ = accumulator & val;
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flag.overflow = ((val & 0x40) != 0);
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}
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final ubyte shiftLeft(ubyte val)
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{
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flag.carry = (val > 0x7F);
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return val << 1;
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}
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final ubyte rotateLeft(ubyte val)
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{
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bool oldCarry = flag.carry;
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flag.carry = (val > 0x7F);
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val = (val << 1 | (oldCarry ? 1 : 0));
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return val;
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}
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final ubyte shiftRight(ubyte val)
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{
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flag.carry = ((val & 0x01) != 0);
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return val >> 1;
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}
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final ubyte rotateRight(ubyte val)
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{
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bool oldCarry = flag.carry;
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flag.carry = ((val & 0x01) != 0);
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val = (val >> 1 | (oldCarry ? 0x80 : 0));
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return val;
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}
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final ubyte increment(ubyte val)
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{
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return val + 1;
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}
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final ubyte decrement(ubyte val)
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{
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return val - 1;
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}
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static string SimpleOpcode(string name, string opcode, string action)
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{
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string code = "peek(programCounter);\n";
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version(CumulativeCycles) code ~= "ticks(totalCycles);\n";
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code ~= (action == "") ? "" : (action ~ ";");
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return "override void opcode" ~ opcode ~ "()\n{\n" ~ code ~ "\n}\n";
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}
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static string UpdateNZ(string action)
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{
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return "flag.zero_ = flag.negative_ = (" ~ action ~ ");" ~ "\n";
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}
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static string RegisterOpcode(string name, string opcode, string action)
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{
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string code = "peek(programCounter);\n";
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version(CumulativeCycles) code ~= "ticks(totalCycles);\n";
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return "override void opcode" ~ opcode ~ "()\n{\n" ~
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code ~ UpdateNZ(action) ~ "}\n";
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}
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static string BranchOpcode(string name, string opcode, string action)
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{
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string code = "readByteOperand();\n" ~
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"if (" ~ action ~ ") addrRelative(cast(byte)operand1);\n";
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version(CumulativeCycles) code ~= "ticks(totalCycles);\n";
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return "override void opcode" ~ opcode ~ "()\n{\n" ~ code ~ "}\n";
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}
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static string Type1Address(string name, string rw, int[] opcodes)
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{
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string type = (rw == "Write") ? "true" : "false";
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string modes = "[[\"" ~ name ~ "\", \"" ~ rw ~ "\"], \n";
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for (int op = 0; op < opcodes.length; ++op)
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{
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int opcode = opcodes[op];
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modes ~= "[\"" ~ hexByte(opcode) ~ "\", \"";
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switch ((opcode & 0b00011100) >> 2)
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{
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case 0:
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modes ~= "IndirectX()";
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break;
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case 1:
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modes ~= "Zeropage()";
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break;
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case 2:
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modes ~= "Immediate";
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break;
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case 3:
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modes ~= "Absolute()";
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break;
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case 4:
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modes ~= "IndirectY("~ type ~ ")";
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break;
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case 5:
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modes ~= "ZeropageX()";
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break;
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case 6:
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modes ~= "AbsoluteY(" ~ type ~ ")";
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break;
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case 7:
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modes ~= "AbsoluteX(" ~ type ~ ")";
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break;
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}
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modes ~= "\"]";
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if (op != (opcodes.length - 1)) modes ~= ", ";
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modes ~= "\n";
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}
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return modes ~ "]\n";
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}
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static string Type2Address(string name, string rw, int[] opcodes)
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{
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string type = (rw == "Write") ? "true" : "false";
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string index = (name[2] == 'X') ? "Y" : "X";
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string modes = "[[\"" ~ name ~ "\", \"" ~ rw ~ "\"], \n";
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for (int op = 0; op < opcodes.length; ++op)
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{
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int opcode = opcodes[op];
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modes ~= "[\"" ~ hexByte(opcode) ~ "\", \"";
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switch ((opcode & 0b00011100) >> 2)
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{
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case 0:
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modes ~= "Immediate";
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break;
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case 1:
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modes ~= "Zeropage()";
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break;
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case 3:
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modes ~= "Absolute()";
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break;
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case 5:
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modes ~= "Zeropage" ~ index ~ "()";
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break;
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case 7:
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modes ~= "Absolute" ~ index ~ "(" ~ type ~ ")";
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break;
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}
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modes ~= "\"]";
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if (op != (opcodes.length - 1)) modes ~= ", ";
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modes ~= "\n";
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}
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return modes ~ "]\n";
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}
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static string Opcode(string[][] details, string action)
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{
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string methods;
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for (int op = 1; op < details.length; ++op)
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{
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methods ~= "override void opcode" ~ details[op][0] ~ "()\n{\n";
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if (details[op][1] == "Immediate")
|
|
{
|
|
methods ~= "primaryAddress = programCounter++;\n" ~
|
|
action ~ "operand1 = readVal;\n";
|
|
}
|
|
else
|
|
{
|
|
methods ~= "addr" ~ details[op][1] ~ ";\n" ~ action;
|
|
}
|
|
methods ~= "}\n";
|
|
}
|
|
return methods;
|
|
}
|
|
|
|
static string Read(string action)
|
|
{
|
|
return UpdateNZ(action ~ " (readVal = readFinal(primaryAddress))");
|
|
}
|
|
|
|
static string Decimal(string action)
|
|
{
|
|
string code = action ~ "(readVal = readFinal(primaryAddress));\n";
|
|
return "if (flag.decimal) dec_" ~ code ~
|
|
"else hex_" ~ code;
|
|
}
|
|
|
|
static string Compare(string action)
|
|
{
|
|
return UpdateNZ("compare(" ~ action ~
|
|
", (readVal = readFinal(primaryAddress)))");
|
|
}
|
|
|
|
static string Write(string action)
|
|
{
|
|
return "writeFinal(primaryAddress, " ~ action ~ ");\n";
|
|
}
|
|
|
|
static string BitTest()
|
|
{
|
|
return "bitTest(readVal = readFinal(primaryAddress));\n";
|
|
}
|
|
|
|
mixin(SimpleOpcode("CLC", "18", "flag.carry = false"));
|
|
mixin(SimpleOpcode("SEC", "38", "flag.carry = true"));
|
|
mixin(SimpleOpcode("CLI", "58", "flag.interrupt = false"));
|
|
mixin(SimpleOpcode("SEI", "78", "flag.interrupt = true"));
|
|
mixin(SimpleOpcode("CLV", "B8", "flag.overflow = false"));
|
|
mixin(SimpleOpcode("CLD", "D8", "flag.decimal = false"));
|
|
mixin(SimpleOpcode("SED", "F8", "flag.decimal = true"));
|
|
|
|
mixin(SimpleOpcode("NOP", "EA", ""));
|
|
|
|
mixin(SimpleOpcode("PHP", "08", "push(flag.toByte())"));
|
|
mixin(SimpleOpcode("PLP", "28", "flag.fromByte(pull())"));
|
|
mixin(SimpleOpcode("PHA", "48", "push(accumulator)"));
|
|
mixin(SimpleOpcode("TXS", "9A", "stackPointer = xIndex"));
|
|
|
|
mixin(RegisterOpcode("PLA", "68", "accumulator = pull()"));
|
|
mixin(RegisterOpcode("TSX", "BA", "xIndex = stackPointer"));
|
|
|
|
mixin(RegisterOpcode("TAX", "AA", "xIndex = accumulator"));
|
|
mixin(RegisterOpcode("TXA", "8A", "accumulator = xIndex"));
|
|
mixin(RegisterOpcode("DEX", "CA", "xIndex -= 1"));
|
|
mixin(RegisterOpcode("INX", "E8", "xIndex += 1"));
|
|
mixin(RegisterOpcode("TAY", "A8", "yIndex = accumulator"));
|
|
mixin(RegisterOpcode("TYA", "98", "accumulator = yIndex"));
|
|
mixin(RegisterOpcode("DEY", "88", "yIndex -= 1"));
|
|
mixin(RegisterOpcode("INY", "C8", "yIndex += 1"));
|
|
|
|
mixin(BranchOpcode("BPL", "10", "flag.negative_ < 0x80"));
|
|
mixin(BranchOpcode("BMI", "30", "flag.negative_ > 0x7F"));
|
|
mixin(BranchOpcode("BVC", "50", "!flag.overflow"));
|
|
mixin(BranchOpcode("BVS", "70", "flag.overflow"));
|
|
mixin(BranchOpcode("BCC", "90", "!flag.carry"));
|
|
mixin(BranchOpcode("BCS", "B0", "flag.carry"));
|
|
mixin(BranchOpcode("BNE", "D0", "flag.zero_ != 0"));
|
|
mixin(BranchOpcode("BEQ", "F0", "flag.zero_ == 0"));
|
|
|
|
mixin(RegisterOpcode("ASL A", "0A",
|
|
"accumulator = shiftLeft(accumulator)"));
|
|
mixin(RegisterOpcode("ROL A", "2A",
|
|
"accumulator = rotateLeft(accumulator)"));
|
|
mixin(RegisterOpcode("LSR A", "4A",
|
|
"accumulator = shiftRight(accumulator)"));
|
|
mixin(RegisterOpcode("ROR A", "6A",
|
|
"accumulator = rotateRight(accumulator)"));
|
|
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"LDA", "Read", [0xA1, 0xA5, 0xA9, 0xAD, 0xB1, 0xB5, 0xB9, 0xBD])),
|
|
Read("accumulator =")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"ORA", "Read", [0x01, 0x05, 0x09, 0x0D, 0x11, 0x15, 0x19, 0x1D])),
|
|
Read("accumulator |=")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"AND", "Read", [0x21, 0x25, 0x29, 0x2D, 0x31, 0x35, 0x39, 0x3D])),
|
|
Read("accumulator &=")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"EOR", "Read", [0x41, 0x45, 0x49, 0x4D, 0x51, 0x55, 0x59, 0x5D])),
|
|
Read("accumulator ^=")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"ADC", "Read", [0x61, 0x65, 0x69, 0x6D, 0x71, 0x75, 0x79, 0x7D])),
|
|
Decimal("addWithCarry")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"SBC", "Read", [0xE1, 0xE5, 0xE9, 0xED, 0xF1, 0xF5, 0xF9, 0xFD])),
|
|
Decimal("subWithCarry")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"CMP", "Read", [0xC1, 0xC5, 0xC9, 0xCD, 0xD1, 0xD5, 0xD9, 0xDD])),
|
|
Compare("accumulator")));
|
|
mixin(Opcode(mixin(Type1Address(
|
|
"STA", "Write", [0x81, 0x85, 0x8D, 0x91, 0x95, 0x99, 0x9D])),
|
|
Write("accumulator")));
|
|
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"LDX", "Read", [0xA2, 0xA6, 0xAE, 0xB6, 0xBE])),
|
|
Read("xIndex =")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"LDY", "Read", [0xA0, 0xA4, 0xAC, 0xB4, 0xBC])),
|
|
Read("yIndex =")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"CPX", "Read", [0xE0, 0xE4, 0xEC])),
|
|
Compare("xIndex")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"CPY", "Read", [0xC0, 0xC4, 0xCC])),
|
|
Compare("yIndex")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"STX", "Write", [0x86, 0x8E, 0x96])),
|
|
Write("xIndex")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"STY", "Write", [0x84, 0x8C, 0x94])),
|
|
Write("yIndex")));
|
|
mixin(Opcode(mixin(Type2Address(
|
|
"BIT", "Read", [0x24, 0x2C])),
|
|
BitTest()));
|
|
|
|
/* BRK */
|
|
final override void opcode00()
|
|
{
|
|
peek(programCounter);
|
|
++programCounter;
|
|
doInterrupt(IRQ_VECTOR, flag.toByte());
|
|
}
|
|
|
|
/* JSR */
|
|
final override void opcode20()
|
|
{
|
|
ushort finalAddress = (operand1 = read(programCounter++));
|
|
|
|
peek(STACK_BASE + stackPointer);
|
|
pushWord(programCounter);
|
|
|
|
finalAddress |= ((operand2 = read(programCounter)) << 8);
|
|
version(CumulativeCycles) ticks(totalCycles);
|
|
programCounter = finalAddress;
|
|
}
|
|
|
|
/* RTI */
|
|
final override void opcode40()
|
|
{
|
|
peek(programCounter);
|
|
flag.fromByte(pull());
|
|
programCounter = pullWord();
|
|
version(CumulativeCycles) ticks(totalCycles);
|
|
}
|
|
|
|
/* JMP $$$$ */
|
|
final override void opcode4C()
|
|
{
|
|
programCounter = readWordOperand();
|
|
version(CumulativeCycles) ticks(totalCycles);
|
|
}
|
|
|
|
/* RTS */
|
|
final override void opcode60()
|
|
{
|
|
peek(programCounter);
|
|
programCounter = pullWord();
|
|
peek(programCounter);
|
|
version(CumulativeCycles) ticks(totalCycles);
|
|
++programCounter;
|
|
}
|
|
}
|