1310 lines
29 KiB
D
1310 lines
29 KiB
D
module cpu.ctfe_d6502;
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import cpu.data_d6502;
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version(Strict)
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private enum strict = true;
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else
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private enum strict = false;
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version(Cumulative)
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private enum cumulative = true;
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else
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private enum cumulative = false;
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// The following versions are mutually exclusive.
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// OpDelegates: each opcode is a method of the Cpu class.
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version(OpDelegates)
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{
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enum versionCheck = 1;
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enum opArray = true;
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}
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// OpSwitch: each opcode is inlined in a 256-case switch.
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version(OpSwitch)
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{
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enum versionCheck = 2;
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enum opArray = false;
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}
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/*
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* OpNestedSwitch: each opcode is inlined in a nested switch.
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*
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* (The outer one switches on the high byte, with each case switching
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* on the low byte.)
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*/
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version(OpNestedSwitch)
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{
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enum versionCheck = 3;
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enum opArray = false;
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}
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// At least one of the previous versions must be specified.
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static if (!__traits(compiles, { bool b = opArray; })) enum opArray = 0;
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static assert (versionCheck);
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string OpArrayDef()
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{
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version(OpDelegates)
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return q{void delegate()[256] opcodes;};
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else
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return "";
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}
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string OpArrayInit()
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{
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string ret;
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foreach (op; 0..256)
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{
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ret ~= Fmt("opcodes[0x#] = &opcode_#;\n",
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Hex2(op), Hex2(op));
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}
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return ret;
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}
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string OpMethods(string chip)
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{
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string ret;
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foreach (op; 0..256)
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{
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ret ~= "final void opcode_" ~ Hex2(op) ~ "()\n{\n" ~
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// If!(cumulative)("int cycles = 1;\n") ~
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OpBody(op, chip) ~ "}\n";
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}
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return ret;
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}
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string OpExecute(string chip)
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{
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version(OpDelegates)
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return q{opcodes[opcode]();};
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version(OpSwitch)
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return Switch256(chip);
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version(OpNestedSwitch)
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return Switch16x16(chip);
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}
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string Switch256(string chip)
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{
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string ret = "final switch (opcode)\n{\n";
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foreach (op; 0..256)
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ret ~= "case 0x" ~ Hex2(op) ~ ":\n" ~
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OpBody(op, chip) ~ "break;\n";
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return ret ~ "}\n";
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}
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string Switch16x16(string chip)
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{
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string ret = "final switch (opcode & 0xF0)\n{\n";
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foreach (opHi; 0..16)
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{
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ret ~= "case 0x" ~ Hex1(opHi) ~ "0:\n" ~
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"final switch(opcode & 0x0F)\n{\n";
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foreach (opLo; 0..16)
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{
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int op = opLo | (opHi << 4);
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ret ~= "case 0x0" ~ Hex1(opLo) ~ ":\n" ~
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OpBody(op, chip) ~
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"break;\n";
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}
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ret ~= "}\nbreak;\n";
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}
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return ret ~ "}\n";
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}
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enum _PC = Attr("PC");
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enum _A = Attr("A");
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enum _X = Attr("X");
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enum _Y = Attr("Y");
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enum _N = Attr("N");
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enum _V = Attr("V");
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enum _D = Attr("D");
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enum _I = Attr("I");
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enum _Z = Attr("Z");
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enum _C = Attr("C");
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enum _S = Attr("S");
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enum STACK = "0x0100 + " ~ _S;
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string OpBody(int op, string chip)
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{
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auto mode = opMode(op, chip);
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auto exCyc = opExCyc(op, chip);
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string ret = ((op == 0x20) ? "" : Address(mode, exCyc, chip));
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final switch (opName(op, chip))
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{
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case "BRK":
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ret ~= Break(chip);
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break;
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case "RTI":
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ret ~= RetInt();
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break;
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case "JSR":
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ret ~= JumpSub();
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break;
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case "RTS":
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ret ~= RetSub();
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break;
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case "JMP":
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ret ~= Jump(op, chip);
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break;
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case "KIL":
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ret ~= _PC ~ "--;\n";
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break;
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case "BPL":
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ret ~= Branch("!(" ~ _N ~ " & 0x80)", chip);
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break;
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case "BMI":
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ret ~= Branch("(" ~ _N ~ " & 0x80)", chip);
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break;
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case "BVC":
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ret ~= Branch("!" ~ _V, chip);
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break;
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case "BVS":
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ret ~= Branch(_V, chip);
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break;
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case "BRA":
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ret ~= Branch("true", chip);
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break;
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case "BCC":
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ret ~= Branch("!" ~ _C, chip);
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break;
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case "BCS":
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ret ~= Branch(_C, chip);
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break;
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case "BNE":
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ret ~= Branch(_Z, chip);
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break;
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case "BEQ":
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ret ~= Branch("!" ~ _Z, chip);
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break;
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case "CLC":
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ret ~= ClearFlag(_C);
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break;
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case "SEC":
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ret ~= SetFlag(_C);
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break;
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case "CLI":
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ret ~= ClearInt(chip);
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break;
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case "SEI":
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ret ~= SetFlag(_I);
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break;
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case "CLV":
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ret ~= ClearFlag(_V);
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break;
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case "CLD":
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ret ~= ClearFlag(_D);
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break;
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case "SED":
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ret ~= SetFlag(_D);
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break;
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case "NOP":
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ret ~= Nop(mode);
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break;
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case "TAX":
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ret ~= Transfer(_A, _X);
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break;
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case "TXA":
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ret ~= Transfer(_X, _A);
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break;
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case "TAY":
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ret ~= Transfer(_A, _Y);
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break;
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case "TYA":
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ret ~= Transfer(_Y, _A);
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break;
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case "TSX":
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ret ~= Transfer(_S, _X);
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break;
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case "TXS":
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ret ~= Transfer(_X, _S, false);
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break;
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case "DEX":
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ret ~= Dec(_X);
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break;
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case "DEY":
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ret ~= Dec(_Y);
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break;
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case "INX":
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ret ~= Inc(_X);
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break;
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case "INY":
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ret ~= Inc(_Y);
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break;
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case "PHP":
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ret ~= Push("statusToByte()");
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break;
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case "PLP":
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ret ~= PullSReg(chip);
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break;
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case "PLA":
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ret ~= PullReg(_A);
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break;
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case "PLX":
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ret ~= PullReg(_X);
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break;
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case "PLY":
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ret ~= PullReg(_Y);
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break;
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case "PHA":
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ret ~= PushReg(_A);
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break;
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case "PHX":
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ret ~= PushReg(_X);
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break;
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case "PHY":
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ret ~= PushReg(_Y);
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break;
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case "LDA":
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ret ~= Load(_A);
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break;
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case "LDX":
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ret ~= Load(_X);
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break;
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case "LDY":
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ret ~= Load(_Y);
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break;
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case "STA":
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ret ~= Store(_A);
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break;
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case "STX":
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ret ~= Store(_X);
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break;
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case "STY":
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ret ~= Store(_Y);
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break;
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case "STZ":
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ret ~= Store("0");
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break;
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case "CMP":
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ret ~= Compare(_A);
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break;
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case "CPX":
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ret ~= Compare(_X);
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break;
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case "CPY":
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ret ~= Compare(_Y);
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break;
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case "BIT":
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ret ~= Bit(mode);
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break;
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case "ORA":
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ret ~= Logic("|=");
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break;
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case "AND":
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ret ~= Logic("&=");
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break;
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case "EOR":
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ret ~= Logic("^=");
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break;
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case "ADC":
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ret ~= Add(chip);
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break;
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case "SBC":
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ret ~= Sub(chip);
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break;
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case "INC":
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if (op == 0x1a)
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ret ~= Inc(_A);
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else
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ret ~= RMW(Inc("data"), chip);
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break;
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case "DEC":
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if (op == 0x3a)
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ret ~= Dec(_A);
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else
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ret ~= RMW(Dec("data"), chip);
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break;
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case "ASL":
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if (op == 0x0a)
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ret ~= ShiftLeft(_A);
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else
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ret ~= RMW(ShiftLeft("data"), chip);
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break;
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case "ROL":
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if (op == 0x2a)
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ret ~= RotateLeft(_A);
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else
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ret ~= RMW(RotateLeft("data"), chip);
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break;
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case "LSR":
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if (op == 0x4a)
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ret ~= ShiftRight(_A);
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else
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ret ~= RMW(ShiftRight("data"), chip);
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break;
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case "ROR":
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if (op == 0x6a)
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ret ~= RotateRight(_A);
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else
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ret ~= RMW(RotateRight("data"), chip);
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break;
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case "TRB":
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ret ~= RMW(TestReset(), chip);
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break;
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case "TSB":
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ret ~= RMW(TestSet(), chip);
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break;
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case "LAS":
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ret ~= LAS_Undoc();
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break;
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case "LAX":
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if (op != 0xAB)
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ret ~= Load(_A ~ " = " ~ _X);
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else
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ret ~= LAX_IMM_Undoc();
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break;
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case "SAX":
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ret ~= Store(_A ~ " & " ~ _X);
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break;
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case "ANC":
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ret ~= ANC_Undoc();
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break;
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case "ALR":
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ret ~= ALR_Undoc();
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break;
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case "ARR":
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ret ~= ARR_Undoc();
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break;
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case "AXS":
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ret ~= AXS_Undoc();
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break;
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case "AHX":
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ret ~= Strange_Undoc(_A ~ " &" ~ _X);
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break;
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case "SHY":
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ret ~= Strange_Undoc(_Y);
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break;
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case "SHX":
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ret ~= Strange_Undoc(_X);
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break;
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case "TAS":
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ret ~= Strange_Undoc(_S ~ " = " ~ _A ~ " & " ~ _X);
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break;
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case "XAA":
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ret ~= XAA_Undoc();
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break;
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case "SLO":
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ret ~= RMW_Undoc(ShiftLeft("data"),
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SetNZ(_A ~ " |= data"));
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break;
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case "RLA":
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ret ~= RMW_Undoc(RotateLeft("data"),
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SetNZ(_A ~ " &= data"));
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break;
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case "SRE":
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ret ~= RMW_Undoc(ShiftRight("data"),
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SetNZ(_A ~ " ^= data"));
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break;
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case "RRA":
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ret ~= RMW_Undoc(RotateRight("data"), AddBase(chip));
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break;
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case "DCP":
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ret ~= RMW_Undoc(Dec("data"), CompareBase(_A));
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break;
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case "ISC":
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ret ~= RMW_Undoc(Inc("data"), SubBase(chip));
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break;
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}
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return ret ~ Done();
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}
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string Break(string chip)
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{
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bool nmos = (chip == "6502");
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bool cmos = !nmos;
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return IncPC() ~
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PushPC() ~
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Push("statusToByte()") ~
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SetFlag(_I) ~
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If!(cmos)(ClearFlag(_D)) ~
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"ushort ivec = IRQ_VECTOR;\n" ~
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If!(nmos)(
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"if (signals.nmiLow)\n{\n" ~
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"signals.nmiLow = false;\n" ~
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"signals.updateSignals();\n" ~
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"ivec = NMI_VECTOR;\n" ~
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"}\n") ~
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ReadWord(_PC, "ivec");
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}
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string JumpSub()
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{
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return ReadOp(Local("ushort", "address")) ~
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Peek(STACK) ~
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PushPC() ~
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LoadHiByte("address", _PC ~ "++") ~
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_PC ~ " = address;\n";
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}
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string RetSub()
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{
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return Peek(STACK) ~
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PullPC() ~
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Peek(_PC) ~
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IncPC();
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}
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string RetInt()
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{
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return PullStatus() ~
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PullPC();
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}
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string Jump(int op, string chip)
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{
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bool nmos = (chip == "6502");
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bool cmos = !nmos;
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if (op == 0x4c)
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return _PC ~ " = address;\n";
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else if (op == 0x6c)
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return ReadWordOp("ushort", "base") ~
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If!(cmos)(
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Peek(_PC)) ~
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ReadWordBasic(_PC, "base",
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If!(nmos)(
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"(base & 0xFF00) | cast(ubyte)(base + 1)",
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"cast(ushort)(base + 1)"));
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else if (op == 0x7c)
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return ReadWordOp("ushort", "base") ~
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Peek(_PC) ~
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ReadWord(_PC, "cast(ushort)(base + " ~ _X ~ ")");
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return "";
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}
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string Branch(string check, string chip)
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{
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return ReadOp(Local("ushort", "base")) ~
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"if (" ~ check ~ ")\n{\n" ~
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Peek(_PC) ~
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Local("ushort", "address") ~
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" = cast(ushort)(" ~ _PC ~ " + cast(byte)base);\n" ~
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CheckShortcut(_PC, "address", chip, 0) ~
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_PC ~ " = address;\n" ~
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"}\n";
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}
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string Nop(int mode)
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{
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if (mode == IMP || mode == NP1 || mode == NP8)
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return "";
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else
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return Tick() ~
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ReadRaw("address") ~ ";\n";
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}
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string Transfer(string source, string dest, bool setNZ = true)
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{
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return dest ~ " = " ~ source ~ ";\n" ~
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(setNZ ? SetNZ(dest) : "");
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}
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string PullReg(string reg)
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{
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return Peek(STACK) ~
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PullInto(reg) ~
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SetNZ(reg);
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}
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string PushReg(string reg)
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{
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return Push(reg);
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}
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string Load(string reg)
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{
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return ReadInto(reg, "address") ~
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SetNZ(reg);
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}
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string Store(string reg,)
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{
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return Write("address", reg);
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}
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string Compare(string reg)
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{
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return ReadInto(Local("ubyte", "data"), "address") ~
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CompareBase(reg);
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}
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string CompareBase(string reg)
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{
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return UpdateFlag(_C, reg ~ " >= data") ~
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SetNZ("cast(ubyte)(" ~ reg ~ " - data)");
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}
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string Bit(int mode)
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{
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bool notImm = (mode != IMM);
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return ReadInto(Local("ubyte", "data"), "address") ~
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If!(notImm)(
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_N ~ " = data;\n" ~
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_V ~ " = ((data & 0x40) != 0);\n") ~
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_Z ~ " = (" ~ _A ~ " & data);\n";
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}
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string Logic(string action)
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{
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return ReadInto(_A, action, "address") ~
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SetNZ(_A);
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}
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string Add(string chip)
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{
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return ReadInto(Local("ubyte", "data"), "address") ~
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AddBase(chip);
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}
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string AddBase(string chip)
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{
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return "if (" ~ _D ~ ")\n{\n" ~
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DecAdd(chip) ~
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"}\nelse\n{\n" ~
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HexAdd() ~
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"}\n";
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}
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string HexAdd()
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{
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return "uint sum = " ~ _A ~ " + data + " ~ _C ~ ";\n" ~
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_V ~
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" = (!((" ~ _A ~ " ^ data) & 0x80)) && ((data ^ sum) & 0x80);\n" ~
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_C ~ " = (sum > 0xFF);\n" ~
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SetNZ(_A ~ " = cast(ubyte)sum");
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}
|
|
|
|
string DecAdd(string chip)
|
|
{
|
|
bool cmos = (chip != "6502");
|
|
|
|
return "int a = " ~ _A ~ ";\n" ~
|
|
"int al = (a & 0x0F) + (data & 0x0F) + " ~ _C ~ ";\n" ~
|
|
"if (al >= 0x0A)\n" ~
|
|
"al = ((al + 0x06) & 0x0F) + 0x10;\n" ~
|
|
"a = (a & 0xF0) + (data & 0xF0) + al;\n" ~
|
|
If!(cmos)("",
|
|
_N ~ " = cast(ubyte)a;\n" ~
|
|
_Z ~ " = cast(ubyte)(" ~ _A ~ " + data + " ~ _C ~ ");\n") ~
|
|
_V ~
|
|
" = (!((" ~ _A ~ " ^ data) & 0x80)) && ((data ^ a) & 0x80);\n" ~
|
|
"if (a >= 0xA0)\n" ~
|
|
"a = a + 0x60;\n" ~
|
|
_C ~ " = (a >= 0x100);\n" ~
|
|
If!(cmos)(
|
|
SetNZ(_A ~ " = cast(ubyte)a") ~ Peek(_PC),
|
|
_A ~ " = cast(ubyte)a;\n");
|
|
}
|
|
|
|
|
|
string Sub(string chip)
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
SubBase(chip);
|
|
}
|
|
|
|
string SubBase(string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return "if (" ~ _D ~ ")\n{\n" ~
|
|
If!(nmos)(DecSubNMOS(), DecSubCMOS()) ~
|
|
"}\nelse\n{\n" ~
|
|
HexSub() ~
|
|
"}\n";
|
|
}
|
|
|
|
string HexSub()
|
|
{
|
|
return "uint diff = " ~ _A ~ " - data - !" ~ _C ~ ";\n" ~
|
|
_V ~
|
|
" = ((" ~ _A ~ " ^ diff) & 0x80) && ((" ~
|
|
_A ~ " ^ data) & 0x80);\n" ~
|
|
_C ~ " = (diff < 0x100);\n" ~
|
|
SetNZ(_A ~ " = cast(ubyte)diff");
|
|
}
|
|
|
|
string DecSubNMOS()
|
|
{
|
|
return "int a = " ~ _A ~ ";\n" ~
|
|
"int al = (a & 0x0F) - (data & 0x0F) - !" ~ _C ~ ";\n" ~
|
|
"if (al < 0)\n" ~
|
|
"al = ((al - 0x06) & 0x0F) - 0x10;\n" ~
|
|
"a = (a & 0xF0) - (data & 0xF0) + al;\n" ~
|
|
"if (a < 0)\n" ~
|
|
"a = a - 0x60;\n" ~
|
|
"uint diff = " ~ _A ~ " - data - !" ~ _C ~ ";\n" ~
|
|
_V ~
|
|
" = ((" ~ _A ~ " ^ diff) & 0x80) && ((" ~
|
|
_A ~ " ^ data) & 0x80);\n" ~
|
|
_C ~ " = (diff < 0x100);\n" ~
|
|
SetNZ("cast(ubyte)diff") ~
|
|
_A ~ " = cast(ubyte)a;\n";
|
|
}
|
|
|
|
string DecSubCMOS()
|
|
{
|
|
return "int a = " ~ _A ~ ";\n" ~
|
|
"int al = (a & 0x0F) - (data & 0x0F) - !" ~ _C ~ ";\n" ~
|
|
"a = a - data - !" ~ _C ~ ";\n" ~
|
|
"if (a < 0) a = a - 0x60;\n" ~
|
|
"if (al < 0) a = a - 0x06;\n" ~
|
|
"uint diff = " ~ _A ~ " - data - !" ~ _C ~ ";\n" ~
|
|
_V ~
|
|
" = ((" ~ _A ~ " ^ diff) & 0x80) && ((" ~
|
|
_A ~ " ^ data) & 0x80);\n" ~
|
|
_C ~ " = (diff < 0x100);\n" ~
|
|
Peek(_PC) ~
|
|
SetNZ(_A ~ " = cast(ubyte)a");
|
|
}
|
|
|
|
|
|
string Inc(string val)
|
|
{
|
|
return val ~ "++;\n" ~
|
|
SetNZ(val);
|
|
}
|
|
|
|
|
|
string Dec(string val)
|
|
{
|
|
return val ~ "--;\n" ~
|
|
SetNZ(val);
|
|
}
|
|
|
|
|
|
string ShiftLeft(string val)
|
|
{
|
|
return _C ~ " = (" ~ val ~ " > 0x7F);\n" ~
|
|
SetNZ(val ~ " = cast(ubyte)(" ~ val ~ " << 1)");
|
|
}
|
|
|
|
|
|
string RotateLeft(string val)
|
|
{
|
|
return "auto oldC = " ~ _C ~ ";\n" ~
|
|
_C ~ " = (" ~ val ~ " > 0x7f);\n" ~
|
|
SetNZ(val ~ " = cast(ubyte)(" ~ val ~ " << 1 | (oldC ? 1 : 0))");
|
|
}
|
|
|
|
|
|
string ShiftRight(string val)
|
|
{
|
|
return _C ~ " = ((" ~ val ~ " & 0x01) != 0);\n" ~
|
|
SetNZ(val ~ " = " ~ val ~ " >> 1");
|
|
}
|
|
|
|
|
|
string RotateRight(string val)
|
|
{
|
|
return "auto oldC = " ~ _C ~ ";\n" ~
|
|
_C ~ " = ((" ~ val ~ " & 0x01) != 0);\n" ~
|
|
SetNZ(val ~ " = (" ~ val ~ " >> 1 | (oldC ? 0x80 : 0))");
|
|
}
|
|
|
|
|
|
string TestReset()
|
|
{
|
|
return _Z ~ " = data & " ~ _A ~ ";\n" ~
|
|
"data &= (~" ~ _A ~ ");\n";
|
|
}
|
|
|
|
|
|
string TestSet()
|
|
{
|
|
return _Z ~ " = data & " ~ _A ~ ";\n" ~
|
|
"data |= " ~ _A ~ ";\n";
|
|
}
|
|
|
|
|
|
string RMW(string action, string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
If!(nmos)(Poke("address", "data"),
|
|
Peek("address")) ~
|
|
action ~
|
|
Write("address", "data");
|
|
}
|
|
|
|
|
|
string RMW_Undoc(string action1, string action2)
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
Poke("address", "data") ~
|
|
action1 ~
|
|
Write("address", "data") ~
|
|
action2;
|
|
}
|
|
|
|
|
|
string LAS_Undoc()
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
SetNZ(_X ~ " = " ~ _A ~ " = (" ~ _S ~ " & data)");
|
|
}
|
|
|
|
|
|
string ARR_Undoc()
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
"ubyte tmp1 = data & " ~ _A ~ ";\n" ~
|
|
"if (" ~ _D ~ ")\n{\n" ~
|
|
"ubyte tmp2 = cast(ubyte)((tmp1 >> 1) + (" ~
|
|
_C ~ " ? 0x80 : 0));\n" ~
|
|
_N ~ " = " ~ _Z ~ " = tmp2;\n" ~
|
|
_V ~ " = (((tmp2 ^ tmp1) & 0x40) != 0);\n" ~
|
|
"if ((data & 0x0F) + (tmp1 & 0x01) > 5)\n" ~
|
|
"tmp2 = (tmp2 & 0xF0) + ((tmp2 + 0x6) & 0x0F);\n" ~
|
|
"if (tmp1 + (tmp1 & 0x10) >= 0x60)\n{\n" ~
|
|
"tmp2 += 0x60;\n" ~
|
|
SetFlag(_C) ~
|
|
"}\nelse\n" ~
|
|
ClearFlag(_C) ~
|
|
_A ~ " = tmp2;\n" ~
|
|
"}\nelse{\n" ~
|
|
_A ~ " = cast(ubyte)((tmp1 >> 1) + (" ~
|
|
_C ~ " ? 0x80 : 0));\n" ~
|
|
_N ~ " = " ~ _Z ~ " = " ~_A ~ ";\n" ~
|
|
"tmp1 >>= 7;\n" ~
|
|
_C ~ " = (tmp1 != 0);\n" ~
|
|
_V ~ " = ((tmp1 ^ ((" ~ _A ~ " >> 5) & 1)) != 0);\n}";
|
|
}
|
|
|
|
|
|
string ANC_Undoc()
|
|
{
|
|
return ReadInto(_A, "address") ~
|
|
SetNZ(_A) ~
|
|
_C ~ " = (" ~ _A ~ " > 0x7f);\n";
|
|
}
|
|
|
|
|
|
string ALR_Undoc()
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
_A ~ " &= data;\n" ~
|
|
ShiftRight(_A);
|
|
}
|
|
|
|
|
|
string AXS_Undoc()
|
|
{
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
_X ~ " &= " ~ _A ~ ";\n" ~
|
|
CompareBase(_X);
|
|
}
|
|
|
|
|
|
/*
|
|
* This opcode is unstable on certain machines; see
|
|
* http://visual6502.org/wiki/index.php?title=6502_Opcode_8B_(XAA,ANE)
|
|
*/
|
|
string XAA_Undoc()
|
|
{
|
|
/*
|
|
* As far as I can tell, the only programs in the wild that depend
|
|
* on this opcode are certain C64 Mastertronic tape loaders; this
|
|
* magic value is used in the VICE emulator to make them work.
|
|
*/
|
|
string MAGIC = "0xff";
|
|
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
_A ~ " = ((" ~ _A ~ " | " ~ MAGIC ~ ") & " ~ _X ~ " & data);\n" ~
|
|
SetNZ(_A);
|
|
}
|
|
|
|
|
|
/*
|
|
* This opcode is unstable on certain machines.
|
|
*/
|
|
string LAX_IMM_Undoc()
|
|
{
|
|
// From the VICE emulator.
|
|
string MAGIC = "0xee";
|
|
|
|
return ReadInto(Local("ubyte", "data"), "address") ~
|
|
_A ~ " = ((" ~ _A ~ " | " ~ MAGIC ~ ") & " ~ _X ~ " & data);\n" ~
|
|
SetNZ(_A);
|
|
}
|
|
|
|
|
|
// TODO: these are affected by DMA on the C64.
|
|
string Strange_Undoc(string val)
|
|
{
|
|
return "ubyte addrHi = cast(ubyte)((address >> 8) + 1);\n" ~
|
|
Local("ubyte", "data") ~ " = " ~ val ~ " & addrHi;\n" ~
|
|
"address = (guess == address) ? address : " ~
|
|
"((data << 8) | (address & 0xff));\n" ~
|
|
Write("address", "data");
|
|
}
|
|
|
|
|
|
string Local(string type)
|
|
{
|
|
return "";
|
|
}
|
|
|
|
string Local(string type, string var)
|
|
{
|
|
return var;
|
|
}
|
|
|
|
string Attr(string var)
|
|
{
|
|
return var;
|
|
}
|
|
|
|
|
|
string Address(int mode, int exCyc, string chip)
|
|
{
|
|
final switch (mode)
|
|
{
|
|
case IMP:
|
|
return AddrIMP();
|
|
case IMM:
|
|
return AddrIMM();
|
|
case ZP:
|
|
return AddrZP();
|
|
case ZPX:
|
|
return AddrZPXY(_X, chip);
|
|
case ZPY:
|
|
return AddrZPXY(_Y, chip);
|
|
case IZX:
|
|
return AddrIZX(chip);
|
|
case IZY:
|
|
return AddrIZY(chip, exCyc);
|
|
case ABS:
|
|
return AddrABS();
|
|
case ABX:
|
|
return AddrABXY(_X, chip, exCyc);
|
|
case ABY:
|
|
return AddrABXY(_Y, chip, exCyc);
|
|
case IND:
|
|
// handled by Jump()
|
|
return "";
|
|
case REL:
|
|
// handled by Branch()
|
|
return "";
|
|
case ZPI:
|
|
return AddrZPI();
|
|
case ABI:
|
|
// handled in Jump()
|
|
return "";
|
|
case NP1:
|
|
// handled implicitly (the 1 cycle is the opcode fetch)
|
|
return "";
|
|
case NP8:
|
|
return AddrNP8();
|
|
case KIL:
|
|
// handled by case KIL in OpBody()
|
|
return "";
|
|
}
|
|
return "";
|
|
}
|
|
|
|
|
|
string AddrIMM()
|
|
{
|
|
return Local("ushort") ~ "address = " ~ _PC ~ "++;\n";
|
|
}
|
|
|
|
string AddrIMP()
|
|
{
|
|
return Peek(_PC);
|
|
}
|
|
|
|
string AddrZP()
|
|
{
|
|
return ReadOp(Local("ushort", "address"));
|
|
}
|
|
|
|
string AddrZPXY(string reg, string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return ReadOp(Local("ushort", "base")) ~
|
|
If!(nmos)(
|
|
Peek("base"),
|
|
Peek(_PC)) ~
|
|
Local("ushort") ~
|
|
"address = cast(ubyte)(base + " ~ reg ~ ");\n";
|
|
}
|
|
|
|
string AddrIZX(string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return ReadOp(Local("ushort", "base")) ~
|
|
If!(nmos)(
|
|
Peek("base"),
|
|
Peek(_PC)) ~
|
|
ReadWordZP("ushort", "address", "base + " ~ _X);
|
|
}
|
|
|
|
string AddrIZY(string chip, int exCyc)
|
|
{
|
|
return ReadOp("ubyte vector") ~
|
|
ReadWordZP("ushort", "base", "vector") ~
|
|
Local("ushort") ~
|
|
"address = cast(ushort)(base + " ~ _Y ~ ");\n" ~
|
|
CheckShortcut("base", "address", chip, exCyc);
|
|
}
|
|
|
|
string AddrABS()
|
|
{
|
|
return ReadWordOp("ushort", "address");
|
|
}
|
|
|
|
string AddrABXY(string reg, string chip, int exCyc)
|
|
{
|
|
return ReadWordOp("ushort", "base") ~
|
|
Local("ushort") ~ "address = cast(ushort)(base + " ~ reg ~ ");\n" ~
|
|
CheckShortcut("base", "address", chip, exCyc);
|
|
}
|
|
|
|
string AddrZPI()
|
|
{
|
|
return ReadOp(Local("ushort", "base")) ~
|
|
ReadWordZP("ushort", "address", "base");
|
|
}
|
|
|
|
string AddrNP8()
|
|
{
|
|
return ReadOp(Local("ushort", "base")) ~
|
|
Peek(_PC) ~
|
|
IncPC() ~
|
|
Peek("0xff00 | base") ~
|
|
Peek("0xffff") ~
|
|
Peek("0xffff") ~
|
|
Peek("0xffff") ~
|
|
Peek("0xffff");
|
|
}
|
|
|
|
string CheckShortcut(string base, string addr, string chip, int exCyc)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return "ushort guess = (" ~ base ~ " & 0xFF00) | cast(ubyte)" ~ addr ~ ";\n" ~
|
|
"if (guess != " ~ addr ~ ")\n{\n" ~
|
|
If!(nmos)(Peek("guess"),
|
|
Peek(_PC)) ~
|
|
"}\n" ~
|
|
If!(exCyc)("else\n{\n" ~ Peek("address") ~ "}\n");
|
|
}
|
|
|
|
string CheckBranchShortcut(string base, string addr, string chip, int exCyc)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return "ushort guess = (" ~ base ~ " & 0xFF00) | cast(ubyte)" ~ addr ~ ";\n" ~
|
|
"if (guess != " ~ addr ~ ")\n{\n" ~
|
|
If!(nmos)(Peek("guess"),
|
|
Peek(_PC)) ~
|
|
"}\nelse\n{\n" ~
|
|
If!(nmos)("idelay = ndelay = true;\n") ~
|
|
"}\n";
|
|
}
|
|
|
|
|
|
string ReadInto(string var, string action, string addr)
|
|
{
|
|
return Tick() ~
|
|
var ~ " " ~ action ~ " " ~ ReadRaw("(" ~ addr ~ ")") ~ ";\n";
|
|
}
|
|
|
|
string ReadInto(string var, string addr)
|
|
{
|
|
return ReadInto(var, "=", addr);
|
|
}
|
|
|
|
string ReadOp(string var)
|
|
{
|
|
return ReadInto(var, _PC ~ "++");
|
|
}
|
|
|
|
string ReadRaw(string addr)
|
|
{
|
|
return Attr("memory") ~ "[" ~ addr ~"]";
|
|
}
|
|
|
|
string ReadWordBasic(string type, string var, string addr1, string addr2)
|
|
{
|
|
return LoadLoByte(type, var, addr1) ~
|
|
LoadHiByte(var, addr2);
|
|
}
|
|
|
|
string ReadWordBasic(string var, string addr1, string addr2)
|
|
{
|
|
return ReadWordBasic("", var, addr1, addr2);
|
|
}
|
|
|
|
string ReadWord(string type, string var, string addr)
|
|
{
|
|
return ReadWordBasic(type, var, addr, "cast(ushort)(" ~ addr ~ " + 1)");
|
|
}
|
|
|
|
string ReadWord(string var, string addr)
|
|
{
|
|
return ReadWord("", var, addr);
|
|
}
|
|
|
|
string ReadWordZP(string type, string var, string addr)
|
|
{
|
|
return ReadWordBasic(type, var, "cast(ubyte)( " ~ addr ~ ")",
|
|
"cast(ubyte)(" ~ addr ~ " + 1)");
|
|
}
|
|
|
|
string ReadWordZP(string var, string addr)
|
|
{
|
|
return ReadWordZP("", var, addr);
|
|
}
|
|
|
|
string ReadWordOp(string type, string var)
|
|
{
|
|
return ReadWordBasic(type, var, _PC ~ "++", _PC ~ "++");
|
|
}
|
|
|
|
string ReadWordOp(string var)
|
|
{
|
|
return ReadWordOp("", var);
|
|
}
|
|
|
|
string Tick()
|
|
{
|
|
return If!(cumulative)("++cycles;\n", Attr("clock") ~ ".tick();\n");
|
|
}
|
|
|
|
string Peek(string addr)
|
|
{
|
|
return Tick() ~
|
|
If!(strict)(Attr("memory") ~ "[" ~ addr ~ "];\n");
|
|
}
|
|
|
|
string Poke(string addr, string val)
|
|
{
|
|
return Tick() ~
|
|
If!(strict)(
|
|
Attr("memory") ~ "[" ~ addr ~ "] = " ~ val ~ ";\n");
|
|
}
|
|
|
|
string Write(string addr, string val)
|
|
{
|
|
return Tick() ~
|
|
Attr("memory") ~ "[" ~ addr ~ "] = " ~ val ~ ";\n";
|
|
}
|
|
|
|
string IncPC()
|
|
{
|
|
return "++" ~ _PC ~ ";\n";
|
|
}
|
|
|
|
|
|
string IncSP()
|
|
{
|
|
return "++" ~ _S ~ ";\n";
|
|
}
|
|
|
|
string DecSP()
|
|
{
|
|
return "--" ~ _S ~ ";\n";
|
|
}
|
|
|
|
string PullSReg(string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return If!(nmos)("idelay = " ~ _I ~ ";\n") ~
|
|
PullStatus() ~
|
|
If!(nmos)("idelay = idelay & !" ~ _I ~ ";\n");
|
|
}
|
|
|
|
string PullStatus()
|
|
{
|
|
return Peek(STACK) ~
|
|
IncSP() ~
|
|
Tick() ~
|
|
"statusFromByte(" ~ ReadRaw(STACK) ~ ");\n";
|
|
}
|
|
|
|
string PullInto(string var)
|
|
{
|
|
return IncSP() ~
|
|
ReadInto(var, STACK);
|
|
}
|
|
|
|
string Push(string val)
|
|
{
|
|
return Write(STACK, val) ~
|
|
DecSP();
|
|
}
|
|
|
|
string PushPC()
|
|
{
|
|
return Push(HiByte(_PC)) ~
|
|
Push(LoByte(_PC));
|
|
}
|
|
|
|
|
|
string PullPC()
|
|
{
|
|
return PullInto(_PC) ~
|
|
IncSP() ~
|
|
LoadHiByte(_PC, STACK);
|
|
}
|
|
|
|
string LoadLoByte(string type, string var, string addr)
|
|
{
|
|
return Tick() ~
|
|
Local(type, var) ~ " = " ~ ReadRaw(addr) ~ ";\n";
|
|
}
|
|
|
|
string LoadHiByte(string var, string addr)
|
|
{
|
|
return Tick() ~
|
|
var ~ " |= (" ~ ReadRaw(addr) ~ " << 8);\n";
|
|
}
|
|
|
|
string SetFlag(string flag)
|
|
{
|
|
return flag ~ " = true;\n";
|
|
}
|
|
|
|
string ClearFlag(string flag)
|
|
{
|
|
return flag ~ " = false;\n";
|
|
}
|
|
|
|
string ClearInt(string chip)
|
|
{
|
|
bool nmos = (chip == "6502");
|
|
|
|
return If!(nmos)("idelay = " ~ _I ~ ";\n") ~
|
|
_I ~ " = false;\n";
|
|
}
|
|
|
|
string UpdateFlag(string flag, string val)
|
|
{
|
|
return flag ~ " = (" ~ val ~ ");\n";
|
|
}
|
|
|
|
string SetNZ(string var)
|
|
{
|
|
return _N ~ " = " ~ _Z ~ " = (" ~ var ~ ");\n";
|
|
}
|
|
|
|
string Done()
|
|
{
|
|
return If!(cumulative)(Attr("clock") ~ ".tick(cycles);\n");
|
|
}
|
|
|
|
|
|
string HiByte(string var)
|
|
{
|
|
return var ~ " >> 8";
|
|
}
|
|
|
|
string LoByte(string var)
|
|
{
|
|
return var ~ " & 0xff";
|
|
}
|
|
|
|
|
|
string If(alias cond)(string yes, string no = "")
|
|
{
|
|
if (cond)
|
|
return yes;
|
|
else
|
|
return no;
|
|
}
|
|
|
|
|
|
string opName(int op, string chip)
|
|
{
|
|
if (chip == "6502")
|
|
return OP_NAMES_6502[op];
|
|
else
|
|
return OP_NAMES_65C02[op];
|
|
}
|
|
|
|
int opMode(int op, string chip)
|
|
{
|
|
if (chip == "6502")
|
|
return ADDR_MODES_6502[op];
|
|
else
|
|
return ADDR_MODES_65C02[op];
|
|
}
|
|
|
|
int opExCyc(int op, string chip)
|
|
{
|
|
if (chip == "6502")
|
|
return EXTRA_CYCLES_6502[op];
|
|
else
|
|
return EXTRA_CYCLES_65C02[op];
|
|
}
|
|
|
|
|
|
// Custom string formatting.
|
|
|
|
enum HEX_DIGITS = "0123456789abcdef";
|
|
|
|
string Hex1(int dec)
|
|
{
|
|
return HEX_DIGITS[dec..dec+1];
|
|
}
|
|
|
|
string Hex2(int dec)
|
|
{
|
|
int highNybble = (dec & 0xF0) >> 4;
|
|
int lowNybble = dec & 0x0F;
|
|
|
|
return HEX_DIGITS[highNybble..highNybble+1] ~
|
|
HEX_DIGITS[lowNybble..lowNybble+1];
|
|
}
|
|
|
|
string Fmt(string f, string[] p ...)
|
|
{
|
|
if (!p.length) return "ERROR";
|
|
string ret;
|
|
size_t last;
|
|
size_t other;
|
|
for (size_t i = 0; i < f.length; i++)
|
|
{
|
|
if (f[i] == '#')
|
|
{
|
|
if (other == p.length) return "ERROR";
|
|
ret ~= f[last..i] ~ p[other++];
|
|
last = i + 1;
|
|
}
|
|
}
|
|
return ret ~ f[last..$];
|
|
}
|