2017-06-30 01:51:36 +00:00
|
|
|
* Right-rotate 32-bit value in &loc (DP or 16-bit address) by &n positions
|
|
|
|
macro
|
|
|
|
ROTR4 &loc,&n
|
|
|
|
aif &n>16,.dorotl
|
|
|
|
lda &loc+2
|
|
|
|
lcla &i
|
|
|
|
&i seta &n
|
|
|
|
.rotrloop
|
|
|
|
lsr a ;to set carry
|
|
|
|
ror &loc
|
|
|
|
ror &loc+2
|
|
|
|
&i seta &i-1
|
|
|
|
aif &i>0,.rotrloop
|
|
|
|
ago .end
|
|
|
|
.dorotl
|
|
|
|
ROTL4 &loc,32-&n
|
|
|
|
.end
|
|
|
|
mend
|
|
|
|
|
|
|
|
* Left-rotate 32-bit value in &loc (DP or 16-bit address) by &n positions
|
|
|
|
macro
|
|
|
|
ROTL4 &loc,&n
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &n>16,.dorotr2
|
2017-06-30 01:51:36 +00:00
|
|
|
lda &loc
|
|
|
|
lcla &i
|
|
|
|
&i seta &n
|
2017-06-30 05:15:47 +00:00
|
|
|
.rotlloop2
|
2017-06-30 01:51:36 +00:00
|
|
|
asl a ;to set carry
|
|
|
|
rol &loc+2
|
|
|
|
rol &loc
|
|
|
|
&i seta &i-1
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &i>0,.rotlloop2
|
|
|
|
ago .end2
|
|
|
|
.dorotr2
|
2017-06-30 01:51:36 +00:00
|
|
|
ROTR4 &loc,32-&n
|
2017-06-30 05:15:47 +00:00
|
|
|
.end2
|
2017-06-30 01:51:36 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
* &to := &from ROTR4 &n
|
|
|
|
macro
|
|
|
|
ROTR4MOVE &to,&from,&n
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &n>16,.dorotl3
|
2017-06-30 01:51:36 +00:00
|
|
|
lda &from
|
|
|
|
sta &to
|
|
|
|
lda &from+2
|
|
|
|
sta &to+2
|
|
|
|
lcla &i
|
|
|
|
&i seta &n
|
2017-06-30 05:15:47 +00:00
|
|
|
.rotrloop3
|
2017-06-30 01:51:36 +00:00
|
|
|
lsr a ;to set carry
|
|
|
|
ror &to
|
|
|
|
ror &to+2
|
|
|
|
&i seta &i-1
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &i>0,.rotrloop3
|
|
|
|
ago .end3
|
|
|
|
dorotl3
|
2017-06-30 01:51:36 +00:00
|
|
|
ROTL4MOVE &to,&from,32-&n
|
2017-06-30 05:15:47 +00:00
|
|
|
.end3
|
2017-06-30 01:51:36 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
* &to := &from ROTL4 &n
|
|
|
|
macro
|
|
|
|
ROTL4MOVE &to,&from,&n
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &n>16,.dorotr4
|
2017-06-30 01:51:36 +00:00
|
|
|
lda &from+2
|
|
|
|
sta &to+2
|
|
|
|
lda &from
|
|
|
|
sta &to
|
|
|
|
lcla &i
|
|
|
|
&i seta &n
|
2017-06-30 05:15:47 +00:00
|
|
|
.rotlloop4
|
2017-06-30 01:51:36 +00:00
|
|
|
asl a ;to set carry
|
|
|
|
rol &to+2
|
|
|
|
rol &to
|
|
|
|
&i seta &i-1
|
2017-06-30 05:15:47 +00:00
|
|
|
aif &i>0,.rotlloop4
|
|
|
|
ago .end4
|
|
|
|
.dorotr4
|
2017-06-30 01:51:36 +00:00
|
|
|
ROTR4MOVE &to,&from,32-&n
|
2017-06-30 05:15:47 +00:00
|
|
|
.end4
|
2017-06-30 01:51:36 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
|
2017-06-29 21:54:49 +00:00
|
|
|
* This makes a function wrapper that is callable from C,
|
|
|
|
* taking a pointer to the context structure as its argument.
|
|
|
|
macro
|
|
|
|
CFunction &fn
|
|
|
|
phb
|
|
|
|
plx
|
|
|
|
ply
|
|
|
|
tdc
|
|
|
|
pld
|
|
|
|
plb
|
|
|
|
plb
|
|
|
|
phy
|
|
|
|
phx
|
|
|
|
plb
|
|
|
|
pha
|
|
|
|
jsl &fn
|
|
|
|
pld
|
|
|
|
rtl
|
|
|
|
mend
|
|
|
|
|
|
|
|
|
|
|
|
* Macros to operate on elements of the message schedule (W)
|
|
|
|
macro
|
|
|
|
&lab lda_w &i,&inc
|
2017-06-30 03:22:06 +00:00
|
|
|
lcla &j
|
|
|
|
&j seta &i
|
|
|
|
.modloop1
|
|
|
|
aif &j<20,.goodidx1
|
|
|
|
&j seta &j-20
|
|
|
|
ago .modloop1
|
|
|
|
.goodidx1
|
2017-06-29 21:54:49 +00:00
|
|
|
aif C:&inc<>0,.haveinc
|
|
|
|
lcla &inc
|
|
|
|
.haveinc
|
2017-06-30 03:22:06 +00:00
|
|
|
&lab lda w+(&j)*4+&inc
|
2017-06-29 21:54:49 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
macro
|
|
|
|
&lab eor_w &i,&inc
|
2017-06-30 03:22:06 +00:00
|
|
|
lcla &j
|
|
|
|
&j seta &i
|
|
|
|
.modloop2
|
|
|
|
aif &j<20,.goodidx2
|
|
|
|
&j seta &j-20
|
|
|
|
ago .modloop2
|
|
|
|
.goodidx2
|
2017-06-29 21:54:49 +00:00
|
|
|
aif C:&inc<>0,.haveinc
|
|
|
|
lcla &inc
|
|
|
|
.haveinc
|
2017-06-30 03:22:06 +00:00
|
|
|
&lab eor w+(&j)*4+&inc
|
2017-06-29 21:54:49 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
macro
|
|
|
|
&lab sta_w &i,&inc
|
2017-06-30 03:22:06 +00:00
|
|
|
lcla &j
|
|
|
|
&j seta &i
|
|
|
|
.modloop3
|
|
|
|
aif &j<20,.goodidx3
|
|
|
|
&j seta &j-20
|
|
|
|
ago .modloop3
|
|
|
|
.goodidx3
|
2017-06-29 21:54:49 +00:00
|
|
|
aif C:&inc<>0,.haveinc
|
|
|
|
lcla &inc
|
|
|
|
.haveinc
|
2017-06-30 03:22:06 +00:00
|
|
|
&lab sta w+(&j)*4+&inc
|
2017-06-29 21:54:49 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
macro
|
|
|
|
&lab rol_w &i,&inc
|
2017-06-30 03:22:06 +00:00
|
|
|
lcla &j
|
|
|
|
&j seta &i
|
|
|
|
.modloop4
|
|
|
|
aif &j<20,.goodidx4
|
|
|
|
&j seta &j-20
|
|
|
|
ago .modloop4
|
|
|
|
.goodidx4
|
2017-06-29 21:54:49 +00:00
|
|
|
aif C:&inc<>0,.haveinc
|
|
|
|
lcla &inc
|
|
|
|
.haveinc
|
2017-06-30 03:22:06 +00:00
|
|
|
&lab rol w+(&j)*4+&inc
|
2017-06-29 21:54:49 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
|
2017-06-30 03:22:06 +00:00
|
|
|
* Compute one part of the message schedule (20 elements)
|
2017-06-29 21:54:49 +00:00
|
|
|
macro
|
2017-06-30 03:22:06 +00:00
|
|
|
ComputeSchedule &part
|
2017-06-29 21:54:49 +00:00
|
|
|
lcla &i
|
|
|
|
|
|
|
|
; Flip the endianness of W_0 to W_15 (the current chunk of the message)
|
2017-06-30 03:22:06 +00:00
|
|
|
aif &part<>1,.skippart1
|
2017-06-29 21:54:49 +00:00
|
|
|
.loop1
|
|
|
|
lda w+&i*4
|
|
|
|
xba
|
|
|
|
ldx w+&i*4+2
|
|
|
|
sta w+&i*4+2
|
|
|
|
txa
|
|
|
|
xba
|
|
|
|
sta w+&i*4
|
|
|
|
&i seta &i+1
|
|
|
|
aif &i<16,.loop1
|
2017-06-30 03:22:06 +00:00
|
|
|
.skippart1
|
2017-06-29 21:54:49 +00:00
|
|
|
|
|
|
|
; compute the rest of the message schedule (W_16 to W_79)
|
2017-06-30 03:22:06 +00:00
|
|
|
aif &part=1,.loop2
|
|
|
|
&i seta (&part-1)*20
|
2017-06-29 21:54:49 +00:00
|
|
|
.loop2
|
|
|
|
lda_w &i-3
|
|
|
|
eor_w &i-8
|
|
|
|
eor_w &i-14
|
|
|
|
eor_w &i-16
|
|
|
|
sta_w &i
|
|
|
|
asl a ; to set carry
|
|
|
|
|
|
|
|
lda_w &i-3,2
|
|
|
|
eor_w &i-8,2
|
|
|
|
eor_w &i-14,2
|
|
|
|
eor_w &i-16,2
|
|
|
|
rol a
|
|
|
|
sta_w &i,2
|
|
|
|
|
|
|
|
rol_w &i
|
|
|
|
|
|
|
|
&i seta &i+1
|
2017-06-30 03:22:06 +00:00
|
|
|
aif &i<&part*20,.loop2
|
2017-06-29 21:54:49 +00:00
|
|
|
mend
|
|
|
|
|
2017-06-30 01:51:36 +00:00
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
|
|
|
|
* One iteration of the loop for processing blocks.
|
|
|
|
* The a,b,c,d,e variables are given as parameters so we can aviod cycling them.
|
2017-06-30 01:51:36 +00:00
|
|
|
macro
|
2017-06-30 05:34:09 +00:00
|
|
|
BlockLoopIter &a,&b,&c,&d,&e,&iter
|
2017-06-30 01:51:36 +00:00
|
|
|
|
|
|
|
* f_0 to f_19
|
|
|
|
aif &part<>1,.skip1
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c
|
|
|
|
eor &d
|
|
|
|
and &b
|
|
|
|
eor &d
|
2017-06-30 01:51:36 +00:00
|
|
|
clc
|
|
|
|
adc #$7999
|
|
|
|
sta f_plus_k
|
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c+2
|
|
|
|
eor &d+2
|
|
|
|
and &b+2
|
|
|
|
eor &d+2
|
2017-06-30 01:51:36 +00:00
|
|
|
adc #$5A82
|
|
|
|
sta f_plus_k+2
|
|
|
|
.skip1
|
|
|
|
|
|
|
|
* f_20 to f_39
|
|
|
|
aif &part<>2,.skip2
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &b
|
|
|
|
eor &c
|
|
|
|
eor &d
|
2017-06-30 01:51:36 +00:00
|
|
|
clc
|
|
|
|
adc #$EBA1
|
|
|
|
sta f_plus_k
|
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &b+2
|
|
|
|
eor &c+2
|
|
|
|
eor &d+2
|
2017-06-30 01:51:36 +00:00
|
|
|
adc #$6ED9
|
|
|
|
sta f_plus_k+2
|
|
|
|
.skip2
|
|
|
|
|
|
|
|
* f_40 to f_59
|
|
|
|
aif &part<>3,.skip3
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c
|
|
|
|
ora &d
|
|
|
|
and &b
|
2017-06-30 01:51:36 +00:00
|
|
|
sta f40temp
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c
|
|
|
|
and &d
|
2017-06-30 01:51:36 +00:00
|
|
|
ora f40temp
|
|
|
|
clc
|
|
|
|
adc #$BCDC
|
|
|
|
sta f_plus_k
|
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c+2
|
|
|
|
ora &d+2
|
|
|
|
and &b+2
|
2017-06-30 01:51:36 +00:00
|
|
|
sta f40temp
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &c+2
|
|
|
|
and &d+2
|
2017-06-30 01:51:36 +00:00
|
|
|
ora f40temp
|
|
|
|
adc #$8F1B
|
|
|
|
sta f_plus_k+2
|
|
|
|
.skip3
|
|
|
|
|
|
|
|
* f_60 to f_79
|
|
|
|
aif &part<>4,.skip4
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &b
|
|
|
|
eor &c
|
|
|
|
eor &d
|
2017-06-30 01:51:36 +00:00
|
|
|
clc
|
|
|
|
adc #$C1D6
|
|
|
|
sta f_plus_k
|
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
lda &b+2
|
|
|
|
eor &c+2
|
|
|
|
eor &d+2
|
2017-06-30 01:51:36 +00:00
|
|
|
adc #$CA62
|
|
|
|
sta f_plus_k+2
|
|
|
|
.skip4
|
|
|
|
|
2017-06-30 05:34:09 +00:00
|
|
|
ROTL4MOVE temp,&a,5
|
2017-06-30 01:51:36 +00:00
|
|
|
ldx idx
|
|
|
|
clc
|
2017-06-30 05:34:09 +00:00
|
|
|
lda w+&iter*4,x
|
2017-06-30 01:51:36 +00:00
|
|
|
adc temp
|
|
|
|
tay
|
2017-06-30 05:34:09 +00:00
|
|
|
lda w+&iter*4+2,x
|
2017-06-30 01:51:36 +00:00
|
|
|
adc temp+2
|
|
|
|
tax
|
|
|
|
clc
|
|
|
|
tya
|
2017-06-30 05:15:47 +00:00
|
|
|
adc &e
|
2017-06-30 01:51:36 +00:00
|
|
|
tay
|
|
|
|
txa
|
2017-06-30 05:15:47 +00:00
|
|
|
adc &e+2
|
2017-06-30 01:51:36 +00:00
|
|
|
tax
|
|
|
|
clc
|
|
|
|
tya
|
|
|
|
adc f_plus_k
|
2017-06-30 05:15:47 +00:00
|
|
|
sta &e
|
2017-06-30 01:51:36 +00:00
|
|
|
txa
|
|
|
|
adc f_plus_k+2
|
2017-06-30 05:15:47 +00:00
|
|
|
sta &e+2
|
2017-06-30 01:51:36 +00:00
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
ROTL4 &b,30
|
2017-06-30 01:51:36 +00:00
|
|
|
|
2017-06-30 05:15:47 +00:00
|
|
|
mend
|
|
|
|
|
|
|
|
|
|
|
|
* One part of the loop for processing blocks (20 iterations)
|
|
|
|
macro
|
|
|
|
BlockLoopPart &part
|
2017-06-30 05:34:09 +00:00
|
|
|
|
|
|
|
lda #0
|
2017-06-30 05:15:47 +00:00
|
|
|
loop&part anop
|
2017-06-30 05:34:09 +00:00
|
|
|
sta idx
|
2017-06-30 05:15:47 +00:00
|
|
|
|
2017-06-30 05:34:09 +00:00
|
|
|
BlockLoopIter a_,b,c,d,e,0
|
|
|
|
BlockLoopIter e,a_,b,c,d,1
|
|
|
|
BlockLoopIter d,e,a_,b,c,2
|
|
|
|
BlockLoopIter c,d,e,a_,b,3
|
|
|
|
BlockLoopIter b,c,d,e,a_,4
|
2017-06-30 05:15:47 +00:00
|
|
|
|
2017-06-30 05:34:09 +00:00
|
|
|
clc
|
|
|
|
lda idx
|
|
|
|
adc #4*5
|
|
|
|
cmp #20*4
|
2017-06-30 01:51:36 +00:00
|
|
|
bge endloop&part
|
|
|
|
jmp loop&part
|
|
|
|
endloop&part anop
|
|
|
|
mend
|
|
|
|
|