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https://github.com/digarok/MiniMemoryTester.git
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fix RAM detection code and SCB text colorizer
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parent
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commit
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33
src/misc.s
33
src/misc.s
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@ -61,40 +61,51 @@ MiniWait nop
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mx %11
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mx %11
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ColorizeMenu
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ColorizeMenu
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lda #6
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lda #6
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ldx #$A0 ; green
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ldx #$A0 ; lt gray
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jsr WaitScanline
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jsr WaitScanline
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lda #7
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lda #7
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ldx #$c0 ; green
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ldx #$A0 ; lt gray
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jsr WaitScanline
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lda #8
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ldx #$C0 ; green
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jsr WaitScanline
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jsr WaitScanline
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lda #9
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lda #9
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ldx #$d0 ; yello
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ldx #$C0 ; green
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jsr WaitScanline
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jsr WaitScanline
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lda #10
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lda #10
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ldx #$90 ; orange
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ldx #$C0 ; green
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jsr WaitScanline
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jsr WaitScanline
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lda #11
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lda #11
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ldx #$10 ; red
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ldx #$d0 ; yello
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jsr WaitScanline
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jsr WaitScanline
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lda #12
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lda #12
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ldx #$90 ; orange
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jsr WaitScanline
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lda #13
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ldx #$10 ; red
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jsr WaitScanline
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lda #14
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ldx #$30 ; purple
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ldx #$30 ; purple
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jsr WaitScanline
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jsr WaitScanline
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lda #13
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lda #15
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ldx #$70 ; bblue
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ldx #$70 ; bblue
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jsr WaitScanline
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jsr WaitScanline
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lda #16
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lda #15
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ldx #$50 ; grey
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ldx #$50 ; grey
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jsr WaitScanline
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jsr WaitScanline
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lda #16
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lda #17
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ldx #$f0 ; white
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ldx #$f0 ; white
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jsr WaitScanline
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jsr WaitScanline
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rts
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rts
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@ -103,9 +114,9 @@ ColorizeMenu
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WaitScanline ;jmp WaitSCB
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WaitScanline ;jmp WaitSCB
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sta :val+1
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sta :val+1
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:waitloop lda $c02f
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:waitloop ldal $e0c02f
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asl
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asl
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lda $c02e
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ldal $e0c02e
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rol
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rol
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:val cmp #$00
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:val cmp #$00
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bne :waitloop
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bne :waitloop
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31
src/mmt.s
31
src/mmt.s
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@ -1786,7 +1786,6 @@ DetectRam
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lda #BankROMUsed
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lda #BankROMUsed
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sta BankMap+$FE ;bank FE
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sta BankMap+$FE ;bank FE
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sta BankMap+$FF ;bank FF
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sta BankMap+$FF ;bank FF
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lda GSROM
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lda GSROM
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cmp #3 ;check for ROM3 IIgs
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cmp #3 ;check for ROM3 IIgs
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bne :rom0or1
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bne :rom0or1
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@ -1799,15 +1798,15 @@ DetectRam
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lda #BankROMUsed ;ROM 3 is 256KB, so 4 banks (2 additional)
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lda #BankROMUsed ;ROM 3 is 256KB, so 4 banks (2 additional)
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sta BankMap+$FC ;
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sta BankMap+$FC ;
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sta BankMap+$FD ;
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sta BankMap+$FD ;
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ldx #$10 ;ROM3 starts scan at bank 10
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ldx #$FB ;ROM3 starts scan at bank FC
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txy
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txy
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bra :writeloop
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bra :writeloop
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:rom0or1 ;no additional mappings
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:rom0or1 ;no additional mappings
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lda #$FE ;ROM1 end bank FE
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lda #$02 ;ROM1 end bank FE
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sta :endbankscan+1 ;but change our max scan bank
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sta :endbankscan+1 ;but change our min scan bank
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sta :endbankscan2+1 ;but change our max scan bank
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sta :endbankscan2+1 ;but change our min scan bank
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ldx #$02 ;ROM0/1 starts scan at bank 02
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ldx #$FE ;ROM0/1 starts scan at bank FE
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txy
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txy
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@ -1816,12 +1815,12 @@ DetectRam
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eor #$FF ;INVERT
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eor #$FF ;INVERT
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:writer stal $000000 ;should overwrite first byte
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:writer stal $000000 ;should overwrite first byte
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inx
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dex
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cpx #$E0
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cpx #$EF
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bne :endbankscan
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bne :endbankscan
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ldx #$F0 ;skip to bank F0 (skip banks E0-EF)
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ldx #$DF ;skip to bank DF (skip banks E0-EF)
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:endbankscan cpx #$FC ;ROM3 end bank (default)
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:endbankscan cpx #$10 ;ROM3 end bank (default)
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bcc :writeloop ;blt
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bcs :writeloop ;blt
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tyx ;restore start bank
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tyx ;restore start bank
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@ -1835,13 +1834,13 @@ DetectRam
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inc BankExpansionRam ;TotalMB++
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inc BankExpansionRam ;TotalMB++
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lda #BankRAMFastExpansion ;store mapping
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lda #BankRAMFastExpansion ;store mapping
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sta BankMap,x
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sta BankMap,x
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:continue inx
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:continue dex
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cpx #$E0
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cpx #$EF
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bne :endbankscan2
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bne :endbankscan2
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ldx #$F0 ;skip to bank F0 (skip banks E0-EF)
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ldx #$DF ;skip to bank F0 (skip banks E0-EF)
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:endbankscan2 cpx #$FC ;ROM3 end bank (default)
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:endbankscan2 cpx #$10 ;ROM3 end bank (default)
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bcc :detectloopread ;blt
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bcs :detectloopread ;blt
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