mirror of
https://github.com/byteworksinc/ORCA-C.git
synced 2025-02-15 19:30:44 +00:00
Implement support for doing quad ops without loading operands on stack.
This works when both operands are simple loads, such that they can be broken up into operations on their subwords in a standard format. Currently, this is implemented for bitwise binary ops, but it can also be expanded to arithmetic, etc.
This commit is contained in:
Stephen Heumann
parent
4020098dd6
commit
043124db93
6
CGI.pas
6
CGI.pas
@ -49,10 +49,12 @@ const
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m_adc_dir = $65;
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m_adc_imm = $69;
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m_adc_s = $63;
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m_adc_indl = $67;
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m_and_abs = $2D;
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m_and_dir = $25;
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m_and_imm = $29;
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m_and_s = $23;
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m_and_indl = $27;
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m_asl_a = $0A;
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m_bcc = $90;
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m_bcs = $B0;
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@ -71,6 +73,7 @@ const
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m_cmp_imm = $C9;
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m_cmp_long = $CF;
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m_cmp_s = $C3;
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m_cmp_indl = $C7;
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m_cop = $02;
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m_cpx_abs = 236;
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m_cpx_dir = 228;
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@ -86,6 +89,7 @@ const
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m_eor_dir = 69;
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m_eor_imm = 73;
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m_eor_s = 67;
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m_eor_indl = $47;
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m_ina = 26;
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m_inc_abs = 238;
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m_inc_absX = $FE;
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@ -122,6 +126,7 @@ const
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m_ora_long = 15;
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m_ora_longX = 31;
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m_ora_s = 3;
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m_ora_indl = $07;
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m_pea = 244;
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m_pei_dir = 212;
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m_pha = 72;
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@ -143,6 +148,7 @@ const
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m_sbc_dir = 229;
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m_sbc_imm = 233;
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m_sbc_s = 227;
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m_sbc_indl = $E7;
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m_sec = 56;
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m_sep = 226;
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m_sta_abs = 141;
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291
Gen.pas
291
Gen.pas
@ -238,6 +238,126 @@ else {if icode^.opcode in [pc_ldo, pc_sro] then}
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end; {DoOp}
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procedure OpOnWordOfQuad (mop: integer; op: icptr; offset: integer);
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{ Do an operation that has addr modes equivalent to LDA on the }
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{ subword at specified offset of the location specified by op. }
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{ }
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{ The generated code may modify X, and may set Y to offset. }
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{ }
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{ parameters: }
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{ mop - machine opcode }
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{ op - node to generate the leaf for }
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{ offset - offset of the word to access (0, 2, 4, or 6) }
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var
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loc: integer; {stack frame position}
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val: integer; {immediate value}
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begin {OpOnWordOfQuad}
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case op^.opcode of
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pc_ldo: begin
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case mop of
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m_lda_imm: mop := m_lda_abs;
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m_cmp_imm: mop := m_cmp_abs;
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m_adc_imm: mop := m_adc_abs;
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m_and_imm: mop := m_and_abs;
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m_ora_imm: mop := m_ora_abs;
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m_sbc_imm: mop := m_sbc_abs;
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m_eor_imm: mop := m_eor_abs;
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otherwise: Error(cge1);
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end; {case}
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if smallMemoryModel then
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GenNative(mop, absolute, op^.q+offset, op^.lab, 0)
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else
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GenNative(mop+2, longAbs, op^.q+offset, op^.lab, 0);
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end; {case pc_ldo}
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pc_lod: begin
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case mop of
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m_lda_imm: mop := m_lda_dir;
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m_cmp_imm: mop := m_cmp_dir;
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m_adc_imm: mop := m_adc_dir;
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m_and_imm: mop := m_and_dir;
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m_ora_imm: mop := m_ora_dir;
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m_sbc_imm: mop := m_sbc_dir;
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m_eor_imm: mop := m_eor_dir;
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otherwise: Error(cge1);
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end; {case}
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loc := LabelToDisp(op^.r) + op^.q + offset;
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if loc < 256 then
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GenNative(mop, direct, loc, nil, 0)
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else begin
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GenNative(m_ldx_imm, immediate, loc, nil, 0);
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GenNative(mop+$10, direct, 0, nil, 0);
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end; {else}
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end; {case pc_lod}
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pc_ldc: begin
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case offset of
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0: val := long(op^.qval.lo).lsw;
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2: val := long(op^.qval.lo).msw;
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4: val := long(op^.qval.hi).lsw;
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6: val := long(op^.qval.hi).msw;
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otherwise: Error(cge1);
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end; {case}
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GenNative(mop, immediate, val, nil, 0);
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end; {case pc_ldc}
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pc_ind: begin
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case mop of
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m_lda_imm: mop := m_lda_indl;
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m_cmp_imm: mop := m_cmp_indl;
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m_adc_imm: mop := m_adc_indl;
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m_and_imm: mop := m_and_indl;
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m_ora_imm: mop := m_ora_indl;
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m_sbc_imm: mop := m_sbc_indl;
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m_eor_imm: mop := m_eor_indl;
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otherwise: Error(cge1);
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end; {case}
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if op^.left^.opcode = pc_lod then
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loc := LabelToDisp(op^.left^.r) + op^.left^.q;
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if (op^.left^.opcode <> pc_lod) or (loc > 255) then
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Error(cge1);
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if offset = 0 then
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GenNative(mop, direct, loc, nil, 0)
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else begin
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GenNative(m_ldy_imm, immediate, offset, nil, 0);
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GenNative(mop+$10, direct, loc, nil, 0);
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end; {else}
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end; {case pc_ind}
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otherwise:
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Error(cge1);
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end; {case}
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end; {OpOnWordOfQuad}
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function SimpleQuadLoad(op: icptr): boolean;
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{ Is op a simple load operation on a cg(U)Quad, which can be }
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{ broken up into word operations handled by OpOnWordOfQuad? }
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{ }
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{ parameters: }
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{ op - node to check }
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begin {SimpleQuadLoad}
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case op^.opcode of
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pc_ldo,pc_lod,pc_ldc:
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SimpleQuadLoad := true;
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pc_ind:
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SimpleQuadLoad :=
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(op^.left^.opcode = pc_lod)
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and (LabelToDisp(op^.left^.r) + op^.left^.q < 256);
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otherwise:
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SimpleQuadLoad := false;
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end; {case}
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end; {SimpleQuadLoad}
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procedure StoreWordOfQuad(offset: integer);
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{ Store one word of a quad value to the location specified by }
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@ -4896,91 +5016,126 @@ procedure GenTree {op: icptr};
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{ generate one of: pc_bqr, pc_bqx, pc_baq, pc_mpq, pc_umq, }
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{ pc_dvq, pc_udq, pc_mdq, pc_uqm }
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procedure GenOp (ops: integer);
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procedure GenBitwiseOp;
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{ generate a 64-bit binary bitwise operation }
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{ }
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{ parameters: }
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{ ops - stack version of operation }
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begin {GenOp}
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GenImplied(m_pla);
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GenNative(ops, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(ops, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(ops, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(ops, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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end; {GenOp}
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var
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mop: integer; {machine opcode}
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begin {GenBitwiseOp}
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if SimpleQuadLoad(op^.left) and SimpleQuadLoad(op^.right) then begin
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case op^.opcode of
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pc_bqr: mop := m_ora_imm;
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pc_bqx: mop := m_eor_imm;
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pc_baq: mop := m_and_imm;
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end; {case}
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OpOnWordOfQuad(m_lda_imm, op^.left, 6);
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OpOnWordOfQuad(mop, op^.right, 6);
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StoreWordOfQuad(6);
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OpOnWordOfQuad(m_lda_imm, op^.left, 4);
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OpOnWordOfQuad(mop, op^.right, 4);
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StoreWordOfQuad(4);
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OpOnWordOfQuad(m_lda_imm, op^.left, 2);
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OpOnWordOfQuad(mop, op^.right, 2);
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StoreWordOfQuad(2);
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OpOnWordOfQuad(m_lda_imm, op^.left, 0);
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OpOnWordOfQuad(mop, op^.right, 0);
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StoreWordOfQuad(0);
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gQuad.where := gQuad.preference;
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end {if}
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else begin
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case op^.opcode of
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pc_bqr: mop := m_ora_s;
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pc_bqx: mop := m_eor_s;
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pc_baq: mop := m_and_s;
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end; {case}
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gQuad.preference := onStack;
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GenTree(op^.left);
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gQuad.preference := onStack;
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GenTree(op^.right);
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GenImplied(m_pla);
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GenNative(mop, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(mop, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(mop, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(mop, direct, 7, nil, 0);
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GenNative(m_sta_s, direct, 7, nil, 0);
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gQuad.where := onStack;
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end; {else}
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end; {GenBitwiseOp}
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begin {GenBinQuad}
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gQuad.preference := onStack;
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GenTree(op^.left);
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gQuad.preference := onStack;
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GenTree(op^.right);
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case op^.opcode of
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pc_bqr: GenOp(m_ora_s);
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pc_bqx: GenOp(m_eor_s);
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pc_baq: GenOp(m_and_s);
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if op^.opcode in [pc_bqr,pc_bqx,pc_baq] then
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GenBitwiseOp
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else begin
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gQuad.preference := onStack;
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GenTree(op^.left);
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gQuad.preference := onStack;
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GenTree(op^.right);
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case op^.opcode of
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pc_mpq: GenCall(79);
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pc_mpq: GenCall(79);
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pc_umq: GenCall(80);
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pc_umq: GenCall(80);
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pc_dvq: begin
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GenCall(81); {do division}
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GenImplied(m_pla); {get quotient, discarding remainder}
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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end;
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pc_dvq: begin
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GenCall(81); {do division}
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GenImplied(m_pla); {get quotient, discarding remainder}
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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end;
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pc_udq: begin
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GenCall(82); {do division}
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GenImplied(m_pla); {get quotient, discarding remainder}
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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end;
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pc_udq: begin
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GenCall(82); {do division}
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GenImplied(m_pla); {get quotient, discarding remainder}
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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GenImplied(m_pla);
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GenNative(m_sta_s, direct, 7, nil, 0);
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end;
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pc_mdq: begin
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GenCall(81); {do division}
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GenImplied(m_tsc); {discard quotient, leaving remainder}
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GenImplied(m_clc);
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GenNative(m_adc_imm, immediate, 8, nil, 0);
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GenImplied(m_tcs);
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end;
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pc_mdq: begin
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GenCall(81); {do division}
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GenImplied(m_tsc); {discard quotient, leaving remainder}
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GenImplied(m_clc);
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GenNative(m_adc_imm, immediate, 8, nil, 0);
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GenImplied(m_tcs);
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end;
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pc_uqm: begin
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GenCall(82); {do division}
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GenImplied(m_tsc); {discard quotient, leaving remainder}
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GenImplied(m_clc);
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GenNative(m_adc_imm, immediate, 8, nil, 0);
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GenImplied(m_tcs);
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end;
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pc_uqm: begin
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GenCall(82); {do division}
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GenImplied(m_tsc); {discard quotient, leaving remainder}
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GenImplied(m_clc);
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GenNative(m_adc_imm, immediate, 8, nil, 0);
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GenImplied(m_tcs);
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end;
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pc_slq: GenCall(85);
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pc_slq: GenCall(85);
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pc_sqr: GenCall(86);
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pc_sqr: GenCall(86);
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pc_wsr: GenCall(87);
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pc_wsr: GenCall(87);
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otherwise: Error(cge1);
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end; {case}
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gQuad.where := onStack;
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otherwise: Error(cge1);
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end; {case}
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gQuad.where := onStack;
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end; {else}
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end; {GenBinQuad}
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