mirror of
https://github.com/sheumann/hush.git
synced 2024-11-18 17:10:36 +00:00
7537406edd
For certain cross build scenarios the LD variable is overridden
to use the gcc executive to ensure all the target tuning parameters
are used. In these cases, the executive errors out as shown below
but since this step is only linking to a .o file the standard libs
are not needed.
$ make LD=gcc applets/built-in.o
LD applets/built-in.o
/usr/bin/ld: cannot find -lgcc_s
/usr/bin/ld: cannot find -lgcc_s
collect2: ld returned 1 exit status
make[1]: *** [applets/built-in.o] Error 1
make: *** [applets_dir] Error 2
Signed-off-by: Drew Moseley <drew_moseley@mentor.com>
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
345 lines
10 KiB
Makefile
345 lines
10 KiB
Makefile
# ==========================================================================
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# Building
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# ==========================================================================
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src := $(obj)
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PHONY := __build
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__build:
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# Read .config if it exist, otherwise ignore
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-include .config
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include scripts/Kbuild.include
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# The filename Kbuild has precedence over Makefile
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# bbox: we also try to include Kbuild file in obj tree first
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kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
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include $(if $(wildcard $(src)/Kbuild), $(src)/Kbuild, \
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$(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, \
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$(kbuild-dir)/Makefile \
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) \
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)
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include scripts/Makefile.lib
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ifdef host-progs
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ifneq ($(hostprogs-y),$(host-progs))
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$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
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hostprogs-y += $(host-progs)
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endif
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endif
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# Do not include host rules unles needed
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ifneq ($(hostprogs-y)$(hostprogs-m),)
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include scripts/Makefile.host
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endif
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ifneq ($(KBUILD_SRC),)
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# Create output directory if not already present
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_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
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# Create directories for object files if directory does not exist
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# Needed when obj-y := dir/file.o syntax is used
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_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
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endif
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ifdef EXTRA_TARGETS
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$(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
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endif
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ifdef build-targets
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$(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
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endif
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ifdef export-objs
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$(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
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endif
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ifdef O_TARGET
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$(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
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endif
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ifdef L_TARGET
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$(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
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endif
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ifdef list-multi
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$(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
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endif
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ifndef obj
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$(warning kbuild: Makefile.build is included improperly)
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endif
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# ===========================================================================
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ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
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lib-target := $(obj)/lib.a
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endif
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ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
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builtin-target := $(obj)/built-in.o
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endif
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# We keep a list of all modules in $(MODVERDIR)
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__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
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$(if $(KBUILD_MODULES),$(obj-m)) \
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$(subdir-ym) $(always)
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@:
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# Linus' kernel sanity checking tool
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ifneq ($(KBUILD_CHECKSRC),0)
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ifeq ($(KBUILD_CHECKSRC),2)
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quiet_cmd_force_checksrc = CHECK $<
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cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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else
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quiet_cmd_checksrc = CHECK $<
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cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
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endif
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endif
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# Compile C sources (.c)
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# ---------------------------------------------------------------------------
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# Default is built-in, unless we know otherwise
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modkern_cflags := $(CFLAGS_KERNEL)
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quiet_modtag := $(empty) $(empty)
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$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
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$(real-objs-m) : quiet_modtag := [M]
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$(real-objs-m:.o=.i) : quiet_modtag := [M]
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$(real-objs-m:.o=.s) : quiet_modtag := [M]
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$(real-objs-m:.o=.lst): quiet_modtag := [M]
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$(obj-m) : quiet_modtag := [M]
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# Default for not multi-part modules
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modname = $(*F)
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$(multi-objs-m) : modname = $(modname-multi)
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$(multi-objs-m:.o=.i) : modname = $(modname-multi)
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$(multi-objs-m:.o=.s) : modname = $(modname-multi)
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$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
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$(multi-objs-y) : modname = $(modname-multi)
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$(multi-objs-y:.o=.i) : modname = $(modname-multi)
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$(multi-objs-y:.o=.s) : modname = $(modname-multi)
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$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
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quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
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cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
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%.s: %.c FORCE
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$(call if_changed_dep,cc_s_c)
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quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
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cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
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%.i: %.c FORCE
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$(call if_changed_dep,cc_i_c)
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# C (.c) files
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# The C file is compiled and updated dependency information is generated.
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# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
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quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
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ifndef CONFIG_MODVERSIONS
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
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else
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# When module versioning is enabled the following steps are executed:
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# o compile a .tmp_<file>.o from <file>.c
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# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
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# not export symbols, we just rename .tmp_<file>.o to <file>.o and
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# are done.
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# o otherwise, we calculate symbol versions using the good old
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# genksyms on the preprocessed source and postprocess them in a way
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# that they are usable as a linker script
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# o generate <file>.o from .tmp_<file>.o using the linker to
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# replace the unresolved symbols __crc_exported_symbol with
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# the actual value of the checksum generated by genksyms
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cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
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cmd_modversions = \
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if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
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$(CPP) -D__GENKSYMS__ $(c_flags) $< \
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| $(GENKSYMS) -a $(ARCH) \
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> $(@D)/.tmp_$(@F:.o=.ver); \
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\
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$(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
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-T $(@D)/.tmp_$(@F:.o=.ver); \
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rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
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else \
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mv -f $(@D)/.tmp_$(@F) $@; \
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fi;
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endif
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define rule_cc_o_c
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$(call echo-cmd,checksrc) $(cmd_checksrc) \
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$(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
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$(cmd_modversions) \
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scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > $(@D)/.$(@F).tmp; \
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rm -f $(depfile); \
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mv -f $(@D)/.$(@F).tmp $(@D)/.$(@F).cmd
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endef
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# Built-in and composite module parts
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%.o: %.c FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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# Single-part modules are special since we need to mark them in $(MODVERDIR)
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$(single-used-m): %.o: %.c FORCE
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$(call cmd,force_checksrc)
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$(call if_changed_rule,cc_o_c)
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@{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
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quiet_cmd_cc_lst_c = MKLST $@
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cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
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$(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
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System.map $(OBJDUMP) > $@
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%.lst: %.c FORCE
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$(call if_changed_dep,cc_lst_c)
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# Compile assembler sources (.S)
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# ---------------------------------------------------------------------------
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modkern_aflags := $(AFLAGS_KERNEL)
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$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
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$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
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quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
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cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
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%.s: %.S FORCE
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$(call if_changed_dep,as_s_S)
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quiet_cmd_as_o_S = AS $(quiet_modtag) $@
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cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
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%.o: %.S FORCE
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$(call if_changed_dep,as_o_S)
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targets += $(real-objs-y) $(real-objs-m) $(lib-y)
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targets += $(extra-y) $(MAKECMDGOALS) $(always)
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# Linker scripts preprocessor (.lds.S -> .lds)
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# ---------------------------------------------------------------------------
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quiet_cmd_cpp_lds_S = LDS $@
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cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
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%.lds: %.lds.S FORCE
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$(call if_changed_dep,cpp_lds_S)
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# Build the compiled-in targets
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# ---------------------------------------------------------------------------
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# To build objects in subdirs, we need to descend into the directories
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$(sort $(subdir-obj-y)): $(subdir-ym) ;
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#
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# Rule to compile a set of .o files into one .o file
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#
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ifdef builtin-target
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quiet_cmd_link_o_target = LD $@
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# If the list of objects to link is empty, just create an empty built-in.o
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# -nostdlib is added to make "make LD=gcc ..." work (some people use that)
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cmd_link_o_target = $(if $(strip $(obj-y)),\
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$(LD) -nostdlib $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
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rm -f $@; $(AR) rcs $@)
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$(builtin-target): $(obj-y) FORCE
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$(call if_changed,link_o_target)
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targets += $(builtin-target)
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endif # builtin-target
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#
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# Rule to compile a set of .o files into one .a file
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#
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ifdef lib-target
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quiet_cmd_link_l_target = AR $@
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cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
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$(lib-target): $(lib-y) FORCE
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$(call if_changed,link_l_target)
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targets += $(lib-target)
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endif
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#
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# Rule to link composite objects
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#
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# Composite objects are specified in kbuild makefile as follows:
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# <composite-object>-objs := <list of .o files>
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# or
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# <composite-object>-y := <list of .o files>
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link_multi_deps = \
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$(filter $(addprefix $(obj)/, \
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$($(subst $(obj)/,,$(@:.o=-objs))) \
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$($(subst $(obj)/,,$(@:.o=-y)))), $^)
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quiet_cmd_link_multi-y = LD $@
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cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
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quiet_cmd_link_multi-m = LD [M] $@
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cmd_link_multi-m = $(LD) $(ld_flags) $(LDFLAGS_MODULE) -o $@ $(link_multi_deps)
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# We would rather have a list of rules like
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# foo.o: $(foo-objs)
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# but that's not so easy, so we rather make all composite objects depend
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# on the set of all their parts
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$(multi-used-y) : %.o: $(multi-objs-y) FORCE
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$(call if_changed,link_multi-y)
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$(multi-used-m) : %.o: $(multi-objs-m) FORCE
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$(call if_changed,link_multi-m)
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@{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
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targets += $(multi-used-y) $(multi-used-m)
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# Descending
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# ---------------------------------------------------------------------------
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PHONY += $(subdir-ym)
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$(subdir-ym):
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$(Q)$(MAKE) $(build)=$@
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# Add FORCE to the prequisites of a target to force it to be always rebuilt.
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# ---------------------------------------------------------------------------
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PHONY += FORCE
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FORCE:
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# Read all saved command lines and dependencies for the $(targets) we
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# may be building above, using $(if_changed{,_dep}). As an
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# optimization, we don't need to read them if the target does not
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# exist, we will rebuild anyway in that case.
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targets := $(wildcard $(sort $(targets)))
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cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
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ifneq ($(cmd_files),)
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include $(cmd_files)
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endif
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# Declare the contents of the .PHONY variable as phony. We keep that
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# information in a variable se we can use it in if_changed and friends.
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.PHONY: $(PHONY)
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