2021-08-25 14:38:02 +00:00
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; Global addresses and engine values
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SHADOW_REG equ $E0C035
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STATE_REG equ $E0C068
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NEW_VIDEO_REG equ $E0C029
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BORDER_REG equ $E0C034 ; 0-3 = border, 4-7 Text color
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VBL_VERT_REG equ $E0C02E
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VBL_HORZ_REG equ $E0C02F
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KBD_REG equ $E0C000
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KBD_STROBE_REG equ $E0C010
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VBL_STATE_REG equ $E0C019
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MOD_REG equ $E0C025
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COMMAND_KEY_REG equ $E0C061
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OPTION_KEY_REG equ $E0C062
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SHADOW_SCREEN equ $012000
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2021-11-14 01:45:27 +00:00
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SHADOW_SCREEN_SCB equ $019D00
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SHADOW_SCREEN_PALETTES equ $019E00
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2021-08-25 14:38:02 +00:00
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SHR_SCREEN equ $E12000
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SHR_SCB equ $E19D00
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SHR_PALETTES equ $E19E00
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2020-11-30 12:38:20 +00:00
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; Direct page locations used by the engine
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2021-08-10 12:59:14 +00:00
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ScreenHeight equ 0 ; Height of the playfield in scan lines
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ScreenWidth equ 2 ; Width of the playfield in bytes
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ScreenY0 equ 4 ; First vertical line on the physical screen of the playfield
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ScreenY1 equ 6 ; End of playfield on the physical screen. If the height is 20 and Y0 is
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ScreenX0 equ 8 ; 100, then ScreenY1 = 120.
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ScreenX1 equ 10
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ScreenTileHeight equ 12 ; Height of the playfield in 8x8 blocks
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ScreenTileWidth equ 14 ; Width of the playfield in 8x8 blocks
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StartX equ 16 ; Which code buffer byte is the left edge of the screen. Range = 0 to 167
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StartY equ 18 ; Which code buffer line is the top of the screen. Range = 0 to 207
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EngineMode equ 20 ; Defined the mode/capabilities that are enabled
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; bit 0: 0 = Single Background, 1 = Parallax
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DirtyBits equ 22 ; Identify values that have changed between frames
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BG1DataBank equ 24 ; Data bank that holds BG1 layer data
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BG1AltBank equ 26 ; Alternate BG1 bank
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BlitterDP equ 28 ; Direct page address the holder blitter data
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OldStartX equ 30
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OldStartY equ 32
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LastPatchOffset equ 34 ; Offset into code field that was patched with BRA instructions
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StartXMod164 equ 36
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StartYMod208 equ 38
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BG1StartX equ 40 ; Logical offset of the second background
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BG1StartXMod164 equ 42
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BG1StartY equ 44
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BG1StartYMod208 equ 46
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OldBG1StartX equ 48
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OldBG1StartY equ 50
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BG1OffsetIndex equ 52
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BG0TileOriginX equ 54 ; Coordinate in the tile map that corresponds to the top-left corner
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BG0TileOriginY equ 56
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OldBG0TileOriginX equ 58
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OldBG0TileOriginY equ 60
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BG1TileOriginX equ 62 ; Coordinate in the tile map that corresponds to the top-left corner
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BG1TileOriginY equ 64
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OldBG1TileOriginX equ 66
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OldBG1TileOriginY equ 68
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TileMapWidth equ 70
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TileMapHeight equ 72
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TileMapPtr equ 74
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2021-08-31 03:14:04 +00:00
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FringeMapPtr equ 78
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2021-08-10 12:59:14 +00:00
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2021-08-31 03:14:04 +00:00
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BG1TileMapWidth equ 82
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BG1TileMapHeight equ 84
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BG1TileMapPtr equ 86
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2021-08-15 01:58:37 +00:00
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2022-02-02 16:21:31 +00:00
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SCBArrayPtr equ 90 ; Used for palette binding
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SpriteBanks equ 94 ; Bank bytes for the sprite data and sprite mask
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2022-02-04 05:44:46 +00:00
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LastRender equ 96 ; Record which reder function was last executed
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2022-02-22 08:35:21 +00:00
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; gap
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2022-02-07 07:19:31 +00:00
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SpriteMap equ 100 ; Bitmap of open sprite slots.
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2022-02-18 18:12:32 +00:00
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ActiveSpriteCount equ 102
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2022-02-21 16:31:35 +00:00
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BankLoad equ 104
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2022-02-22 08:35:21 +00:00
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TileStoreBankAndBank01 equ 106
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TileStoreBankAndTileDataBank equ 108
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2022-04-20 12:43:16 +00:00
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TileStoreBankDoubled equ 110
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Next equ 112
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2021-08-10 12:59:14 +00:00
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2022-02-21 16:31:35 +00:00
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activeSpriteList equ 128 ; 32 bytes for the active sprite list (can persist across frames)
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2022-04-20 12:43:16 +00:00
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; tiletmp equ 178 ; 16 bytes of temp storage for the tile renderers
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2021-08-25 14:38:02 +00:00
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blttmp equ 192 ; 32 bytes of local cache/scratch space for blitter
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2021-08-10 12:59:14 +00:00
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2021-08-25 14:38:02 +00:00
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tmp8 equ 224 ; another 16 bytes of temporary space to be used as scratch
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2021-08-10 12:59:14 +00:00
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tmp9 equ 226
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tmp10 equ 228
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tmp11 equ 230
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tmp12 equ 232
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tmp13 equ 234
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tmp14 equ 236
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tmp15 equ 238
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tmp0 equ 240 ; 16 bytes of temporary space to be used as scratch
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tmp1 equ 242
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tmp2 equ 244
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tmp3 equ 246
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tmp4 equ 248
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tmp5 equ 250
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tmp6 equ 252
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tmp7 equ 254
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2022-04-20 12:43:16 +00:00
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; Defines for the second direct page (used in the tile blitters)
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sprite_ptr0 equ 0 ; Each tile can render up to 4 sprite blocks. The sprite
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sprite_ptr1 equ 4 ; data and mask values live in different banks, but have a
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sprite_ptr2 equ 8 ; parallel structure. The high word of each point is set to
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sprite_ptr3 equ 12 ; the mask bank. With the Bank register set, both data and mask
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; ; can be accessed through the same pointer, e.g. lda (sprite_ptr0)
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; ; and [sprite_ptr0]
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tmp_sprite_data equ 16 ; 32 byte temporary buffer to build up sprite data values
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tmp_sprite_mask equ 48 ; 32 byte temporary buffer to build up sprite mask values
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tmp_tile_data equ 80 ; 32 byte temporary buffer to build up tile data values
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tmp_tile_mask equ 112 ; 32 byte temporary buffer to build up tile mask values
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; Temporary direct page locations used by some of the complex tile renderers
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_X_REG equ 144
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_Y_REG equ 146
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_T_PTR equ 148 ; Copy of the tile address pointer
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_BASE_ADDR equ 150 ; Copy of BTableLow for this tile
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_SPR_X_REG equ 152 ; Cache address of sprite plane source for a tile
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_JTBL_CACHE equ 154 ; Cache the offset to the exception handler for a column
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_OP_CACHE equ 156 ; Cache of a relevant operand / oeprator
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_TILE_ID equ 158 ; Copy of the tile descriptor
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; Define free space the the application to use
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FREE_SPACE_DP2 equ 160
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; End direct page values
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2021-08-10 12:59:14 +00:00
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DIRTY_BIT_BG0_X equ $0001
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DIRTY_BIT_BG0_Y equ $0002
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DIRTY_BIT_BG1_X equ $0004
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DIRTY_BIT_BG1_Y equ $0008
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DIRTY_BIT_BG0_REFRESH equ $0010
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DIRTY_BIT_BG1_REFRESH equ $0020
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2022-02-07 07:19:31 +00:00
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DIRTY_BIT_SPRITE_ARRAY equ $0040
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2021-10-06 12:10:09 +00:00
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; Script definition
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YIELD equ $8000
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JUMP equ $4000
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SET_PALETTE_ENTRY equ $0002
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SWAP_PALETTE_ENTRY equ $0004
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SET_DYN_TILE equ $0006
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CALLBACK equ $0010
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2021-11-12 17:27:43 +00:00
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; ReadControl return value bits
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PAD_BUTTON_B equ $01
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PAD_BUTTON_A equ $02
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PAD_KEY_DOWN equ $04
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2021-10-29 02:41:01 +00:00
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; Tile constants
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TILE_ID_MASK equ $01FF
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TILE_SPRITE_BIT equ $8000 ; Set if this tile intersects an active sprite
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TILE_PRIORITY_BIT equ $4000 ; Put tile on top of sprite
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TILE_FRINGE_BIT equ $2000
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TILE_MASK_BIT equ $1000
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TILE_DYN_BIT equ $0800
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TILE_VFLIP_BIT equ $0400
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TILE_HFLIP_BIT equ $0200
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2021-11-20 18:00:21 +00:00
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; Sprite constants
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2022-02-07 07:19:31 +00:00
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SPRITE_HIDE equ $2000
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2021-11-20 18:00:21 +00:00
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SPRITE_16X16 equ $1800
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SPRITE_16X8 equ $1000
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SPRITE_8X16 equ $0800
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SPRITE_8X8 equ $0000
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SPRITE_VFLIP equ $0400
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SPRITE_HFLIP equ $0200
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2022-04-20 12:43:16 +00:00
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; Stamp storage parameters
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VBUFF_STRIDE_BYTES equ 12*4 ; Each line has 4 slots of 16 pixels + 8 buffer pixels
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VBUFF_TILE_ROW_BYTES equ 8*VBUFF_STRIDE_BYTES ; Each row is comprised of 8 lines
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VBUFF_SPRITE_STEP equ VBUFF_TILE_ROW_BYTES*3 ; Allocate space fo 16 rows + 8 rows of buffer
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VBUFF_SPRITE_START equ {8*VBUFF_TILE_ROW_BYTES}+4 ; Start at an offset so $0000 can be used as an empty value
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VBUFF_SLOT_COUNT equ 48 ; Have space for this many stamps
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; Tile storage parameters
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TILE_STORE_WIDTH equ 41
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TILE_STORE_HEIGHT equ 26
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MAX_TILES equ {26*41} ; Number of tiles in the code field (41 columns * 26 rows)
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TILE_STORE_SIZE equ {MAX_TILES*2} ; The tile store contains a tile descriptor in each slot
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2021-10-29 02:41:01 +00:00
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2022-02-18 18:12:32 +00:00
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TS_TILE_ID equ TILE_STORE_SIZE*0 ; tile descriptor for this location
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2022-02-22 08:35:21 +00:00
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TS_DIRTY equ TILE_STORE_SIZE*1 ; Flag. Used to prevent a tile from being queued multiple times per frame
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2022-02-18 18:12:32 +00:00
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TS_SPRITE_FLAG equ TILE_STORE_SIZE*2 ; Bitfield of all sprites that intersect this tile. 0 if no sprites.
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TS_TILE_ADDR equ TILE_STORE_SIZE*3 ; cached value, the address of the tiledata for this tile
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TS_CODE_ADDR_LOW equ TILE_STORE_SIZE*4 ; const value, address of this tile in the code fields
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2022-04-20 12:43:16 +00:00
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TS_CODE_ADDR_HIGH equ TILE_STORE_SIZE*5
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2022-02-18 18:12:32 +00:00
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TS_WORD_OFFSET equ TILE_STORE_SIZE*6 ; const value, word offset value for this tile if LDA (dp),y instructions re used
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TS_BASE_ADDR equ TILE_STORE_SIZE*7 ; const value, because there are two rows of tiles per bank, this is set to $0000 ot $8000.
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TS_SCREEN_ADDR equ TILE_STORE_SIZE*8 ; cached value of on-screen location of tile. Used for DirtyRender.
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TS_VBUFF_ARRAY_ADDR equ TILE_STORE_SIZE*9 ; const value to an aligned 32-byte array starting at $8000 in TileStore bank
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2022-04-20 12:43:16 +00:00
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TS_BASE_TILE_DISP equ TILE_STORE_SIZE*10 ; derived from TS_TILE_ID to optimize base (non-sprite) tile dispatch in the Render function
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TS_DIRTY_TILE_DISP equ TILE_STORE_SIZE*11 ; derived from TS_TILE_ID to optimize dirty tile dispatch in the Render function
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; 16 consecutive entries to provide directly addressable space for holding the VBUFF address for the
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; sprites that may be rendered at a given tile. Given a tile store offset, X, the way to address the
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; address for the Y'th sprite is
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;
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; lda TileStore+TS_VBUFF_0+{Y*TILE_STORE_SIZE},x
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;
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; Moving to the next tile can be done with a constant.
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;
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; lda TileStore+TS_VBUFF_0+{Y*TILE_STORE_SIZE}+{41*row}+{2*col},x
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TS_VBUFF_0 equ TILE_STORE_SIZE*12
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TS_VBUFF_1 equ TILE_STORE_SIZE*13
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TS_VBUFF_2 equ TILE_STORE_SIZE*14
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TS_VBUFF_3 equ TILE_STORE_SIZE*15
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TS_VBUFF_4 equ TILE_STORE_SIZE*16
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TS_VBUFF_5 equ TILE_STORE_SIZE*17
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TS_VBUFF_6 equ TILE_STORE_SIZE*18
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TS_VBUFF_7 equ TILE_STORE_SIZE*19
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TS_VBUFF_8 equ TILE_STORE_SIZE*20
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TS_VBUFF_9 equ TILE_STORE_SIZE*21
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TS_VBUFF_10 equ TILE_STORE_SIZE*22
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TS_VBUFF_11 equ TILE_STORE_SIZE*23
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TS_VBUFF_12 equ TILE_STORE_SIZE*22
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TS_VBUFF_13 equ TILE_STORE_SIZE*23
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TS_VBUFF_14 equ TILE_STORE_SIZE*24
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TS_VBUFF_15 equ TILE_STORE_SIZE*25
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