NuBusFPGA/nubus-to-ztex-gateware/NuBusFPGAPrimaryInit.a

1 line
749 B
Plaintext
Raw Normal View History

2022-04-17 09:25:48 +00:00
DC.B sExec2 ; code revision DC.B sCPU68020 ; CPU type is 68020 DC.W 0 ; reserved DC.L Begin1stInit-* ; offset to code WITH seBlock,spBlock Begin1stInit MOVE.W #1,seStatus(A0) ; assume a good return MOVE.L #$F0000000,D1 ; Dl <- F0000000 MOVE.B seSlot(A0),D0 ; get slot number BFINS D0,D1{4:4} ; Dl <- Fs000000 MOVE.L D1,A1 ; copy to address reg ;;; INITIALIZE SOME STUFF HERE SUBA #spBlockSize,SP ; make an spB10ck MOVE.L SP,A0 ; get pointer to parms MOVE.B D0,spSlot(A0) ; identify the slot CLR.B SpExtDev(A0) ; external device = 0 RTS ENDWITH