mirror of
https://github.com/rdolbeau/NuBusFPGA.git
synced 2025-01-10 11:29:48 +00:00
accel in 16/32 ; includes adding MUL to Vex & fixing a FIFO overrun in NuBus in 32 bits mode
This commit is contained in:
Romain Dolbeau
parent
9a50f36153
commit
76c29d5b69
1
.gitignore
vendored
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1
.gitignore
vendored
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@ -0,0 +1 @@
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**~
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@ -6,4 +6,6 @@ The goal of this repository is to be able to interface a modern (2021 era) [FPGA
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## Current status
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First prototype is working in a Quadra 650. It implements a basic single-resolution, depth-switchable (1/2/4/8/16/32 bits) unaccellerated framebuffer over HDMI. The framebuffer can be used as secondary/primary/only framebuffer in the machine running OS8.1. QEmu tests indicate this should work with 7.1 & 7.5/7.6 as well.
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First prototype is working in a Quadra 650. It implements a basic single-resolution, depth-switchable (1/2/4/8/16/32 bits) framebuffer over HDMI. The framebuffer can be used as secondary/primary/only framebuffer in the machine running OS8.1. QEmu tests indicate this should work with 7.1 & 7.5/7.6 as well.
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Some basic acceleration now exists for 8/16/32 bits, doing rectangle screen-to-screen blits and solid rectangle fills.
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13
nubus-to-ztex-gateware/.gitignore
vendored
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13
nubus-to-ztex-gateware/.gitignore
vendored
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@ -0,0 +1,13 @@
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*.log
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*.orig
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*.rej
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*.BAK
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*.jou
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csr.csv
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csr.json
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blit
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blit.o
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blit.raw
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blit.s
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*.patch
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OLD
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@ -28,38 +28,6 @@ void* fb_base;
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void* bt_base;
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void* accel_base;
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#if 0
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pascal void myStdBits(BitMap *srcBits, Rect *srcRect, Rect *dstRect, short mode, RgnHandle maskRgn){
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long oldA4;
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volatile unsigned long * const debug_ptr = (unsigned long*)0xFC90001c;
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*debug_ptr = 0xC0FFEE00;
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oldA4 = SetCurrentA4();
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RememberA4();
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oldStdBits(srcBits, srcRect, dstRect, mode, maskRgn);
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SetA4(oldA4);
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}
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pascal void myBitBltX(BitMap *srcBits, BitMap *maskBits, BitMap *dstBits, Rect *srcRect, Rect *maskRect, Rect *dstRect, short mode, Pattern *pat, RgnHandle rgnA, RgnHandle rgnB, RgnHandle rgnC, short multColor){
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register BitBltProc loldBitBlt;
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register long oldA4;
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volatile unsigned long * const debug_ptr = (unsigned long*)0xFC90001c;
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*debug_ptr = 0xC0FFEE00;
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oldA4 = SetCurrentA4();
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RememberA4();
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//oldBitBlt(srcBits, maskBits, dstBits, srcRect, maskRect, dstRect, mode, pat, rgnA, rgnB, rgnC, multColor);
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loldBitBlt = oldBitBlt;
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SetA4(oldA4);
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loldBitBlt(srcBits, maskBits, dstBits, srcRect, maskRect, dstRect, mode, pat, rgnA, rgnB, rgnC, multColor);
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}
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#endif
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static inline unsigned long brev(const unsigned long r) {
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return (((r&0xFF000000)>>24) | ((r&0xFF0000)>>8) | ((r&0xFF00)<<8) | ((r&0xFF)<<24));
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}
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@ -442,6 +410,7 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte
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#endif
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return 0;
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}
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if (srcpix->baseAddr != p_fb_base) { // we're not source
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#ifdef QEMU
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bt->debug = -5L;
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@ -450,14 +419,6 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte
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return 0;
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}
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#if 0
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if ((qdstack->MINRECT.top == 0x0) & (qdstack->MINRECT.bottom == 0x14) &
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(qdstack->MINRECT.left == 0x5c9) & (qdstack->MINRECT.right == 0x5f6)) { // ignore that one until later
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//*debug_ptr = -5L;
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return 0;
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}
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#endif
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{
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Rect realrect, srcv, dstv;
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short width = qdstack->MINRECT.right - qdstack->MINRECT.left;
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@ -525,13 +486,13 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte
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#else
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WAIT_FOR_HW_LE(accel_le);
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accel_le->reg_width = (width);
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accel_le->reg_width = (width << dstshift); // bytes
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accel_le->reg_height = (height);
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accel_le->reg_bitblt_dst_x = (dstv.left << dstshift);
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accel_le->reg_bitblt_dst_x = (dstv.left << dstshift); // bytes
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accel_le->reg_bitblt_dst_y = (dstv.top);
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if (mode == 0) {
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accel_le->reg_bitblt_src_x = (srcv.left << dstshift);
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accel_le->reg_bitblt_src_x = (srcv.left << dstshift); // bytes
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accel_le->reg_bitblt_src_y = (srcv.top);
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accel_le->reg_cmd = (1<<DO_BLIT_BIT);
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} else if (mode == 8) {
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@ -597,18 +558,11 @@ pascal asm void myBitBlt(BitMap *srcBits, BitMap *maskBits, BitMap *dstBits, Rec
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finish:
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rts
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}
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//616 610
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#if 0
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CQDProcs customCProcs;
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#endif
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void main(void)
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{
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long oldA4;
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#if 0
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GrafPtr currPort;
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#endif
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Handle h;
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struct goblin_bt_regs* bt;
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@ -635,24 +589,6 @@ void main(void)
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DebugStr("\pargh");
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}
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#if 0
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GetPort(&currPort);
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if (currPort->portBits.rowBytes < 0) /* color port */ {
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SetStdCProcs(&customCProcs);
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customCProcs.bitsProc = myStdBits;
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currPort->grafProcs = (QDProcs*)&customCProcs;
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*debug_ptr = 0;
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} else {
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*debug_ptr = 0xF00FF00F;
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}
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#endif
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#if 0
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oldStdBits = (StdBitsProc)GetToolTrapAddress(_StdBits);
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*debug_ptr = (unsigned long)oldStdBits;
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SetToolTrapAddress((UniversalProcPtr)myStdBits, _StdBits);
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#endif
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oldBitBlt = (BitBltProc)GetToolTrapAddress(_BitBlt);
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//*debug_ptr = (unsigned long)oldBitBlt;
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SetToolTrapAddress((UniversalProcPtr)myBitBlt, _BitBlt);
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File diff suppressed because it is too large
Load Diff
@ -22,9 +22,10 @@
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#define BASE_RAM 0xF0902000 // FIXME : should be generated : 4-64 KiB of Wishbone SRAM ? ; also in _start
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#define BASE_RAM_SIZE 0x00001000 // FIXME : should be generated : 4-64 KiB of Wishbone SRAM ? ; also in _start
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#define BASE_BT_REGS 0xF0900000
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#define BASE_ACCEL_REGS 0xF0901000
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#define mul_HRES(a) ((a) * HRES)
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#define mul_sHRES(a) ((a) * sHRES)
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//typedef void (*boot_t)(void);
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//typedef void (*start_t)(unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short);
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@ -49,6 +50,26 @@ struct control_blitter {
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#define FUN_TEST (1<<FUN_TEST_BIT)
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#define FUN_DONE (1<<FUN_DONE_BIT)
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struct goblin_bt_regs {
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u_int32_t mode;
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u_int32_t vbl_mask;
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u_int32_t videoctrl;
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u_int32_t intr_clear;
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u_int32_t reset;
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u_int32_t lut_addr;
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u_int32_t lut;
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u_int32_t debug;
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};
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enum goblin_bt_mode {
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mode_1bit = 0x00,
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mode_2bit = 0x01,
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mode_4bit = 0x02,
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mode_8bit = 0x03,
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mode_32bit = 0x10,
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mode_16bit = 0x11
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};
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struct goblin_accel_regs {
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u_int32_t reg_status; // 0
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u_int32_t reg_cmd;
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@ -80,32 +101,37 @@ static void rectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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);
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static void rectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm
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const unsigned char pm,
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const unsigned_param_type sHRES
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);
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static void xorrectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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);
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static void xorrectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm
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const unsigned char pm,
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const unsigned_param_type sHRES
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);
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static void invert(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re
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const unsigned_param_type re,
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const unsigned_param_type sHRES
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);
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static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type ys,
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@ -114,7 +140,8 @@ static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned char pm,
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const unsigned char gxop
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const unsigned char gxop,
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const unsigned_param_type sHRES
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);
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static void print_hexword(unsigned int v, unsigned int bx, unsigned int by);
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@ -160,20 +187,32 @@ asm(".global _start\n"
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/* also need to figure out the non-coherent caches ... */
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void from_reset(void) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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struct goblin_bt_regs* fbt = (struct goblin_bt_regs*)BASE_BT_REGS;
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unsigned int cmd = fbc->reg_r5_cmd;
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unsigned_param_type sHRES;
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switch ((fbt->mode>>24) & 0xFF) { // mode is 8 bits wrong-endian (all fbt is wrong-endian)
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case mode_32bit:
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sHRES = HRES * 4;
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break;
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case mode_16bit:
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sHRES = HRES * 2;
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break;
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default:
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sHRES = HRES;
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break;
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}
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// fixme; switching to & 0xFFFF will use zext.h, which isn't included in our Vex ATM
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switch (cmd & 0xF) {
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case FUN_BLIT: {
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bitblit(fbc->reg_bitblt_src_x, fbc->reg_bitblt_src_y,
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fbc->reg_width, fbc->reg_height,
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fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y,
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0xFF, 0x3); // GXcopy
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0xFF, 0x3, sHRES); // GXcopy
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} break;
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case FUN_FILL: {
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rectfill(fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y,
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fbc->reg_width, fbc->reg_height,
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fbc->reg_fgcolor);
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fbc->reg_fgcolor, sHRES);
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} break;
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#if 1
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case FUN_TEST: {
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@ -212,7 +251,8 @@ void from_reset(void) {
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const unsigned_param_type re, \
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const unsigned_param_type xd, \
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const unsigned_param_type yd, \
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const unsigned char pm \
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const unsigned char pm, \
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const unsigned_param_type sHRES \
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)
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#define bitblit_proto(suf) \
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bitblit_proto_int(_fwd, _fwd, suf); \
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@ -227,8 +267,8 @@ bitblit_proto(_xor_pm);
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#define ROUTE_BITBLIT_PM(pm, bb) \
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if (pm == 0xFF) bb(xs, ys, wi, re, xd, yd, pm); \
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else bb##_pm(xs, ys, wi, re, xd, yd, pm)
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if (pm == 0xFF) bb(xs, ys, wi, re, xd, yd, pm, sHRES); \
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else bb##_pm(xs, ys, wi, re, xd, yd, pm, sHRES)
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static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type ys,
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@ -237,7 +277,8 @@ static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned char pm,
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const unsigned char gxop
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const unsigned char gxop,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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@ -284,7 +325,7 @@ static void bitblit(const unsigned_param_type xs,
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/* don't bother */
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break;
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case 0x6: // GXxor
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rectfill_pm(xd, yd, wi, re, 0, pm);
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rectfill_pm(xd, yd, wi, re, 0, pm, sHRES);
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break;
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}
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}
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@ -296,11 +337,12 @@ static void rectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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unsigned int i, j;
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color & 0xFF;
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@ -322,7 +364,7 @@ static void rectfill(const unsigned_param_type xd,
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*dptr_elt = u8color;
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dptr_elt ++;
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}
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dptr_line += HRES;
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dptr_line += sHRES;
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}
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}
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@ -331,11 +373,12 @@ static void rectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
|
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const unsigned char pm
|
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const unsigned char pm,
|
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const unsigned_param_type sHRES
|
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) {
|
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
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unsigned int i, j;
|
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color;
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@ -358,7 +401,7 @@ static void rectfill_pm(const unsigned_param_type xd,
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*dptr_elt = (u8color & pm) | (*dptr_elt & ~pm);
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dptr_elt ++;
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}
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dptr_line += HRES;
|
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dptr_line += sHRES;
|
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}
|
||||
}
|
||||
|
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@ -367,11 +410,12 @@ static void xorrectfill(const unsigned_param_type xd,
|
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const unsigned_param_type yd,
|
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const unsigned_param_type wi,
|
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const unsigned_param_type re,
|
||||
const unsigned_param_type color
|
||||
const unsigned_param_type color,
|
||||
const unsigned_param_type sHRES
|
||||
) {
|
||||
struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
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unsigned int i, j;
|
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
|
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
|
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color & 0xFF;
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|
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@ -393,7 +437,7 @@ static void xorrectfill(const unsigned_param_type xd,
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*dptr_elt ^= u8color;
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dptr_elt ++;
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}
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||||
dptr_line += HRES;
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dptr_line += sHRES;
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}
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}
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static void xorrectfill_pm(const unsigned_param_type xd,
|
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@ -401,11 +445,12 @@ static void xorrectfill_pm(const unsigned_param_type xd,
|
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const unsigned_param_type wi,
|
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const unsigned_param_type re,
|
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const unsigned_param_type color,
|
||||
const unsigned char pm
|
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const unsigned char pm,
|
||||
const unsigned_param_type sHRES
|
||||
) {
|
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
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unsigned int i, j;
|
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
|
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
|
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color;
|
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|
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@ -428,18 +473,19 @@ static void xorrectfill_pm(const unsigned_param_type xd,
|
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*dptr_elt ^= (u8color & pm);
|
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dptr_elt ++;
|
||||
}
|
||||
dptr_line += HRES;
|
||||
dptr_line += sHRES;
|
||||
}
|
||||
}
|
||||
|
||||
static void invert(const unsigned_param_type xd,
|
||||
const unsigned_param_type yd,
|
||||
const unsigned_param_type wi,
|
||||
const unsigned_param_type re
|
||||
const unsigned_param_type re,
|
||||
const unsigned_param_type sHRES
|
||||
) {
|
||||
struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
||||
unsigned int i, j;
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
|
||||
unsigned char *dptr_line = dptr;
|
||||
|
||||
for (j = 0 ; j < re ; j++) {
|
||||
@ -459,7 +505,7 @@ static void invert(const unsigned_param_type xd,
|
||||
*dptr_elt = ~(*dptr_elt);
|
||||
dptr_elt ++;
|
||||
}
|
||||
dptr_line += HRES;
|
||||
dptr_line += sHRES;
|
||||
}
|
||||
}
|
||||
|
||||
@ -479,10 +525,11 @@ static void invert(const unsigned_param_type xd,
|
||||
const unsigned_param_type re, \
|
||||
const unsigned_param_type xd, \
|
||||
const unsigned_param_type yd, \
|
||||
const unsigned char pm) { \
|
||||
const unsigned char pm, \
|
||||
const unsigned_param_type sHRES) { \
|
||||
unsigned int i, j; \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_HRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd); \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
||||
unsigned char *sptr_line = sptr; \
|
||||
unsigned char *dptr_line = dptr; \
|
||||
/*const unsigned char npm = ~pm;*/ \
|
||||
@ -537,8 +584,8 @@ static void invert(const unsigned_param_type xd,
|
||||
dptr_elt ++; \
|
||||
sptr_elt ++; \
|
||||
} \
|
||||
sptr_line += HRES; \
|
||||
dptr_line += HRES; \
|
||||
sptr_line += sHRES; \
|
||||
dptr_line += sHRES; \
|
||||
} \
|
||||
}
|
||||
|
||||
@ -549,10 +596,11 @@ static void invert(const unsigned_param_type xd,
|
||||
const unsigned_param_type re, \
|
||||
const unsigned_param_type xd, \
|
||||
const unsigned_param_type yd, \
|
||||
const unsigned char pm) { \
|
||||
const unsigned char pm, \
|
||||
const unsigned_param_type sHRES) { \
|
||||
unsigned int i, j; \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_HRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd); \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
||||
unsigned char *sptr_line = sptr + wi - 1; \
|
||||
unsigned char *dptr_line = dptr + wi - 1; \
|
||||
const unsigned char npm = ~pm; \
|
||||
@ -565,8 +613,8 @@ static void invert(const unsigned_param_type xd,
|
||||
dptr_elt --; \
|
||||
sptr_elt --; \
|
||||
} \
|
||||
sptr_line += HRES; \
|
||||
dptr_line += HRES; \
|
||||
sptr_line += sHRES; \
|
||||
dptr_line += sHRES; \
|
||||
} \
|
||||
}
|
||||
|
||||
@ -577,12 +625,13 @@ static void invert(const unsigned_param_type xd,
|
||||
const unsigned_param_type re, \
|
||||
const unsigned_param_type xd, \
|
||||
const unsigned_param_type yd, \
|
||||
const unsigned char pm) { \
|
||||
const unsigned char pm, \
|
||||
const unsigned_param_type sHRES) { \
|
||||
unsigned int i, j; \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_HRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd); \
|
||||
unsigned char *sptr_line = sptr + mul_HRES(re-1); \
|
||||
unsigned char *dptr_line = dptr + mul_HRES(re-1); \
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
||||
unsigned char *sptr_line = sptr + mul_sHRES(re-1); \
|
||||
unsigned char *dptr_line = dptr + mul_sHRES(re-1); \
|
||||
const unsigned char npm = ~pm; \
|
||||
\
|
||||
for (j = 0 ; j < re ; j++) { \
|
||||
@ -639,8 +688,8 @@ static void invert(const unsigned_param_type xd,
|
||||
dptr_elt ++; \
|
||||
sptr_elt ++; \
|
||||
} \
|
||||
sptr_line -= HRES; \
|
||||
dptr_line -= HRES; \
|
||||
sptr_line -= sHRES; \
|
||||
dptr_line -= sHRES; \
|
||||
} \
|
||||
}
|
||||
|
||||
@ -656,68 +705,3 @@ BLIT_ALLDIR(xor, XOR)
|
||||
BLIT_ALLDIR(copy_pm, COPY_PM)
|
||||
BLIT_ALLDIR(xor_pm, XOR_PM)
|
||||
|
||||
#if 0
|
||||
else if ((xd & 0xf) == 0) {
|
||||
unsigned int fsr_cst = xs & 0x3;
|
||||
unsigned char* sptr_elt_al = sptr_elt - fsr_cst;
|
||||
unsigned int src0 = ((unsigned int*)sptr_elt_al)[0];
|
||||
for ( ; i < (wi&(~0xf)) ; i+= 16) {
|
||||
unsigned int src1, val;
|
||||
|
||||
src1 = ((unsigned int*)sptr_elt_al)[1];
|
||||
val = _rv32_fsr(src0, src1, fsr_cst);
|
||||
((unsigned int*)dptr_elt)[0] = val;
|
||||
src0 = src1;
|
||||
|
||||
src1 = ((unsigned int*)sptr_elt_al)[2];
|
||||
val = _rv32_fsr(src0, src1, fsr_cst);
|
||||
((unsigned int*)dptr_elt)[1] = val;
|
||||
src0 = src1;
|
||||
|
||||
src1 = ((unsigned int*)sptr_elt_al)[3];
|
||||
val = _rv32_fsr(src0, src1, fsr_cst);
|
||||
((unsigned int*)dptr_elt)[2] = val;
|
||||
src0 = src1;
|
||||
|
||||
src1 = ((unsigned int*)sptr_elt_al)[4];
|
||||
val = _rv32_fsr(src0, src1, fsr_cst);
|
||||
((unsigned int*)dptr_elt)[3] = val;
|
||||
src0 = src1;
|
||||
|
||||
dptr_elt += 16;
|
||||
sptr_elt_al += 16;
|
||||
}
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
static void bitblit_bwd_bwd_copy(const unsigned_param_type xs,
|
||||
const unsigned_param_type ys,
|
||||
const unsigned_param_type wi,
|
||||
const unsigned_param_type re,
|
||||
const unsigned_param_type xd,
|
||||
const unsigned_param_type yd,
|
||||
const unsigned char pm
|
||||
) {
|
||||
unsigned int i, j;
|
||||
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_HRES(ys) + xs);
|
||||
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_HRES(yd) + xd);
|
||||
unsigned char *sptr_line = sptr + mul_HRES(re-1);
|
||||
unsigned char *dptr_line = dptr + mul_HRES(re-1);
|
||||
|
||||
// flush_cache(); // handled in boot()
|
||||
|
||||
for (j = 0 ; j < re ; j++) {
|
||||
unsigned char *sptr_elt = sptr_line + wi - 1;
|
||||
unsigned char *dptr_elt = dptr_line + wi - 1;
|
||||
for (i = 0 ; i < wi ; i++) {
|
||||
*dptr_elt = *sptr_elt;
|
||||
dptr_elt --;
|
||||
sptr_elt --;
|
||||
}
|
||||
sptr_line -= HRES;
|
||||
dptr_line -= HRES;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
@ -18,7 +18,7 @@ GCC=${GCCDIR}/bin/${GCCPFX}gcc
|
||||
OBJCOPY=${GCCDIR}/bin/${GCCPFX}objcopy
|
||||
|
||||
OPT=-Os #-fno-inline
|
||||
ARCH=rv32i_zba_zbb_zbt
|
||||
ARCH=rv32im_zba_zbb_zbt
|
||||
|
||||
PARAM="-DHRES=${HRES} -DVRES=${VRES} -DBASE_FB=${BASE_FB}"
|
||||
|
||||
|
||||
@ -12,7 +12,7 @@ class GoblinAccel(Module): # AutoCSR ?
|
||||
# reg access
|
||||
self.bus = bus = wishbone.Interface()
|
||||
|
||||
self.COORD_BITS = COORD_BITS = 12 #
|
||||
self.COORD_BITS = COORD_BITS = 16 # need enough bytes for 32-bits wat widest resolution
|
||||
|
||||
reg_status = Signal(32) # 0
|
||||
reg_cmd = Signal(32) # 1
|
||||
|
||||
@ -94,7 +94,7 @@ class NuBus(Module):
|
||||
("data", 32),
|
||||
("sel", 4),
|
||||
]
|
||||
self.submodules.write_fifo = write_fifo = ClockDomainsRenamer({"read": "sys", "write": "nubus"})(AsyncFIFOBuffered(width=layout_len(write_fifo_layout), depth=8))
|
||||
self.submodules.write_fifo = write_fifo = ClockDomainsRenamer({"read": "sys", "write": "nubus"})(AsyncFIFOBuffered(width=layout_len(write_fifo_layout), depth=16))
|
||||
write_fifo_dout = Record(write_fifo_layout)
|
||||
self.comb += write_fifo_dout.raw_bits().eq(write_fifo.dout)
|
||||
write_fifo_din = Record(write_fifo_layout)
|
||||
@ -201,13 +201,18 @@ class NuBus(Module):
|
||||
# )
|
||||
#)
|
||||
slave_fsm.act("NubusWriteDataToFIFO",
|
||||
write_fifo.we.eq(1),
|
||||
tmo_oe.eq(1),
|
||||
tm0_o_n.eq(1),
|
||||
tm1_o_n.eq(1),
|
||||
ack_o_n.eq(1),
|
||||
If(write_fifo.writable,
|
||||
write_fifo.we.eq(1),
|
||||
tm0_o_n.eq(0),
|
||||
tm1_o_n.eq(0),
|
||||
ack_o_n.eq(0),
|
||||
NextState("Idle"),
|
||||
)
|
||||
)
|
||||
|
||||
# connect the write FIFO inputs
|
||||
self.comb += [ write_fifo_din.adr.eq(current_adr), # recorded
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user