From 85c62fb3314000a01991c432003876c4a54b55e2 Mon Sep 17 00:00:00 2001 From: Romain Dolbeau Date: Sat, 4 Jun 2022 17:25:58 +0200 Subject: [PATCH] new interface --- .../NuBusFPGAInit/NuBusFPGAInit.c | 50 ++++- .../NuBusFPGAInit/NuBusFPGA_HW.h | 6 +- nubus-to-ztex-gateware/blit.c | 172 ++++++++++-------- nubus-to-ztex-gateware/blit.sh | 6 +- nubus-to-ztex-gateware/goblin_accel.py | 20 +- 5 files changed, 156 insertions(+), 98 deletions(-) diff --git a/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGAInit.c b/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGAInit.c index 0b7aaf2..cf3c69e 100644 --- a/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGAInit.c +++ b/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGAInit.c @@ -10,7 +10,7 @@ #define _BitBlt 0xAB00 -//#define QEMU +// #define QEMU //extern pascal void CopyBits(const BitMap *srcBits, const BitMap *dstBits, const Rect *srcRect, const Rect *dstRect, short mode, RgnHandle maskRgn) ONEWORDINLINE(0xA8EC); @@ -353,6 +353,7 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte struct qdstuff* qdstack = (struct qdstuff*)(stack - sizeof(struct qdstuff)); short height = qdstack->MINRECT.bottom - qdstack->MINRECT.top; short dstshift = qdstack->DSTSHIFT; + short srcshift = qdstack->SRCSHIFT; if ((mode != 0) && (mode != 8)) { // only copy handled for now #ifdef QEMU @@ -374,6 +375,7 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte #endif return 0; } + if (mode == 8) { register int i; register unsigned long expat0 = qdstack->EXPAT[0]; @@ -388,9 +390,13 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte for (i = 1 ; i < 16 ; i++) if (expat0 != qdstack->EXPAT[i]) { bt->debug = -7L; + bt->debug = i; + bt->debug = expat0; + bt->debug = qdstack->EXPAT[i]; return 0; } } + if (dstshift < 3) { // only 8/16/32 bits for now #ifdef QEMU bt->debug = -3L; @@ -399,6 +405,24 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte return 0; } dstshift -= 3; + + if (srcshift < 3) { // only 8/16/32 bits for now +#ifdef QEMU + bt->debug = -8L; + bt->debug = srcshift; +#endif + return 0; + } + srcshift -= 3; + + if (srcshift != dstshift) { + bt->debug = -9L; + bt->debug = srcshift; + bt->debug = dstshift; + return 0; + } + + if (height < 0) { // no height return 0; } @@ -411,7 +435,9 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte return 0; } - if (srcpix->baseAddr != p_fb_base) { // we're not source + if ((srcpix->baseAddr != p_fb_base) + // && ((unsigned long)srcpix->baseAddr >= 0x40000000) // and neither is main memory + ){ #ifdef QEMU bt->debug = -5L; bt->debug = (unsigned long)srcpix->baseAddr; @@ -470,6 +496,10 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte } #endif bt->debug = -1L; + + bt->debug = srcpix->rowBytes; + bt->debug = dstpix->rowBytes; + bt->debug = srcv.top; bt->debug = srcv.left; @@ -486,14 +516,24 @@ int hwblit(char* stack, char* p_fb_base, /* short dstshift, */ short mode, Patte #else WAIT_FOR_HW_LE(accel_le); - accel_le->reg_width = (width << dstshift); // bytes + accel_le->reg_width = (width); // pixels accel_le->reg_height = (height); - accel_le->reg_bitblt_dst_x = (dstv.left << dstshift); // bytes + accel_le->reg_bitblt_dst_x = (dstv.left); // pixels accel_le->reg_bitblt_dst_y = (dstv.top); + if (dstpix->baseAddr != p_fb_base) + accel_le->reg_dst_ptr = (unsigned long)(dstpix->baseAddr); + else + accel_le->reg_dst_ptr = 0; // let the HW pick its internal address + accel_le->reg_dst_stride = (dstpix->rowBytes); // bytes // we should strip the high-order bit, but the HW ignore that for us anyway if (mode == 0) { - accel_le->reg_bitblt_src_x = (srcv.left << dstshift); // bytes + accel_le->reg_bitblt_src_x = (srcv.left); // pixels accel_le->reg_bitblt_src_y = (srcv.top); + if (srcpix->baseAddr != p_fb_base) + accel_le->reg_src_ptr = (unsigned long)(srcpix->baseAddr); + else + accel_le->reg_src_ptr = 0; // let the HW pick its internal address + accel_le->reg_src_stride = (srcpix->rowBytes); // bytes // we should strip the high-order bit, but the HW ignore that for us anyway accel_le->reg_cmd = (1<reg_fgcolor = (qdstack->EXPAT[0]); diff --git a/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGA_HW.h b/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGA_HW.h index e247724..0e97ac1 100644 --- a/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGA_HW.h +++ b/nubus-to-ztex-gateware/NuBusFPGAInit/NuBusFPGA_HW.h @@ -44,8 +44,10 @@ struct goblin_accel_regs { u_int32_t reg_bitblt_src_y; u_int32_t reg_bitblt_dst_x; u_int32_t reg_bitblt_dst_y; - u_int32_t reg_chk_adr; // 12 - u_int32_t reg_chk_val; + u_int32_t reg_src_stride; // 12 + u_int32_t reg_dst_stride; + u_int32_t reg_src_ptr; // 12 + u_int32_t reg_dst_ptr; }; diff --git a/nubus-to-ztex-gateware/blit.c b/nubus-to-ztex-gateware/blit.c index a1fff6c..56695d8 100644 --- a/nubus-to-ztex-gateware/blit.c +++ b/nubus-to-ztex-gateware/blit.c @@ -4,14 +4,6 @@ ~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-objcopy -O binary -j .text blit blit.raw */ -#ifndef HRES -#define HRES 1920 -#warning "Using default HRES" -#endif -#ifndef VRES -#define VRES 1080 -#warning "Using default VRES" -#endif #ifndef BASE_FB #define BASE_FB 0x8F800000 // FIXME : should be generated ; 2+ MiB of SDRAM as framebuffer #warning "Using default BASE_FB" @@ -25,8 +17,6 @@ #define BASE_BT_REGS 0xF0900000 #define BASE_ACCEL_REGS 0xF0901000 -#define mul_sHRES(a) ((a) * sHRES) - //typedef void (*boot_t)(void); //typedef void (*start_t)(unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short); @@ -83,8 +73,10 @@ struct goblin_accel_regs { u_int32_t reg_bitblt_src_y; u_int32_t reg_bitblt_dst_x; u_int32_t reg_bitblt_dst_y; - u_int32_t reg_chk_adr; // 12 - u_int32_t reg_chk_val; // 13 + u_int32_t reg_src_stride; // 12 + u_int32_t reg_dst_stride; // 13 + u_int32_t reg_src_ptr; // 14 + u_int32_t reg_dst_ptr; // 15 }; //#include "./rvintrin.h" @@ -102,7 +94,8 @@ static void rectfill(const unsigned_param_type xd, const unsigned_param_type wi, const unsigned_param_type re, const unsigned_param_type color, - const unsigned_param_type sHRES + unsigned char *dst_ptr, + const unsigned_param_type dst_stride ); static void rectfill_pm(const unsigned_param_type xd, const unsigned_param_type yd, @@ -110,14 +103,16 @@ static void rectfill_pm(const unsigned_param_type xd, const unsigned_param_type re, const unsigned_param_type color, const unsigned char pm, - const unsigned_param_type sHRES + unsigned char *dst_ptr, + const unsigned_param_type dst_stride ); static void xorrectfill(const unsigned_param_type xd, const unsigned_param_type yd, const unsigned_param_type wi, const unsigned_param_type re, const unsigned_param_type color, - const unsigned_param_type sHRES + unsigned char *dst_ptr, + const unsigned_param_type dst_stride ); static void xorrectfill_pm(const unsigned_param_type xd, const unsigned_param_type yd, @@ -125,13 +120,15 @@ static void xorrectfill_pm(const unsigned_param_type xd, const unsigned_param_type re, const unsigned_param_type color, const unsigned char pm, - const unsigned_param_type sHRES + unsigned char *dst_ptr, + const unsigned_param_type dst_stride ); static void invert(const unsigned_param_type xd, const unsigned_param_type yd, const unsigned_param_type wi, const unsigned_param_type re, - const unsigned_param_type sHRES + unsigned char *dst_ptr, + const unsigned_param_type dst_stride ); static void bitblit(const unsigned_param_type xs, const unsigned_param_type ys, @@ -141,7 +138,10 @@ static void bitblit(const unsigned_param_type xs, const unsigned_param_type yd, const unsigned char pm, const unsigned char gxop, - const unsigned_param_type sHRES + unsigned char *src_ptr, + unsigned char *dst_ptr, + const unsigned_param_type src_stride, + const unsigned_param_type dst_stride ); static void print_hexword(unsigned int v, unsigned int bx, unsigned int by); @@ -189,45 +189,37 @@ void from_reset(void) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; struct goblin_bt_regs* fbt = (struct goblin_bt_regs*)BASE_BT_REGS; unsigned int cmd = fbc->reg_r5_cmd; - unsigned_param_type sHRES; + unsigned char scale; switch ((fbt->mode>>24) & 0xFF) { // mode is 8 bits wrong-endian (all fbt is wrong-endian) case mode_32bit: - sHRES = HRES * 4; + scale = 2; break; case mode_16bit: - sHRES = HRES * 2; + scale = 1; break; default: - sHRES = HRES; + scale = 0; break; } switch (cmd & 0xF) { case FUN_BLIT: { - bitblit(fbc->reg_bitblt_src_x, fbc->reg_bitblt_src_y, - fbc->reg_width, fbc->reg_height, - fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y, - 0xFF, 0x3, sHRES); // GXcopy + bitblit(fbc->reg_bitblt_src_x << scale, fbc->reg_bitblt_src_y, + fbc->reg_width << scale, fbc->reg_height, + fbc->reg_bitblt_dst_x << scale, fbc->reg_bitblt_dst_y, + 0xFF, 0x3, // GXcopy + fbc->reg_src_ptr ? (unsigned char*)fbc->reg_src_ptr : (unsigned char*)BASE_FB, + fbc->reg_dst_ptr ? (unsigned char*)fbc->reg_dst_ptr : (unsigned char*)BASE_FB, + fbc->reg_src_stride, + fbc->reg_dst_stride); // assumed to be scaled already } break; case FUN_FILL: { - rectfill(fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y, - fbc->reg_width, fbc->reg_height, - fbc->reg_fgcolor, sHRES); + rectfill(fbc->reg_bitblt_dst_x << scale, fbc->reg_bitblt_dst_y, + fbc->reg_width << scale, fbc->reg_height, + fbc->reg_fgcolor, + fbc->reg_dst_ptr ? (unsigned char*)fbc->reg_dst_ptr : (unsigned char*)BASE_FB, + fbc->reg_dst_stride); // assumed to be scaled already } break; -#if 1 - case FUN_TEST: { - u_int32_t val = fbc->reg_chk_val; - u_int32_t* ptr = (u_int32_t*)fbc->reg_chk_adr; - u_int32_t pval = (*ptr); - fbc->reg_chk_val = (val ^ pval); - if (pval == 0x01234567) - fbc->reg_chk_adr = 1; - else if (pval == 0x67452301) - fbc->reg_chk_adr = 0; - else - fbc->reg_chk_adr = -1; - } break; -#endif default: break; } @@ -252,7 +244,10 @@ void from_reset(void) { const unsigned_param_type xd, \ const unsigned_param_type yd, \ const unsigned char pm, \ - const unsigned_param_type sHRES \ + unsigned char *src_ptr, \ + unsigned char *dst_ptr, \ + const unsigned_param_type src_stride , \ + const unsigned_param_type dst_stride \ ) #define bitblit_proto(suf) \ bitblit_proto_int(_fwd, _fwd, suf); \ @@ -267,8 +262,8 @@ bitblit_proto(_xor_pm); #define ROUTE_BITBLIT_PM(pm, bb) \ - if (pm == 0xFF) bb(xs, ys, wi, re, xd, yd, pm, sHRES); \ - else bb##_pm(xs, ys, wi, re, xd, yd, pm, sHRES) + if (pm == 0xFF) bb(xs, ys, wi, re, xd, yd, pm, src_ptr, dst_ptr, src_stride, dst_stride); \ + else bb##_pm(xs, ys, wi, re, xd, yd, pm, src_ptr, dst_ptr, src_stride, dst_stride) static void bitblit(const unsigned_param_type xs, const unsigned_param_type ys, @@ -278,7 +273,10 @@ static void bitblit(const unsigned_param_type xs, const unsigned_param_type yd, const unsigned char pm, const unsigned char gxop, - const unsigned_param_type sHRES + unsigned char *src_ptr, + unsigned char *dst_ptr, + const unsigned_param_type src_stride, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; @@ -325,7 +323,7 @@ static void bitblit(const unsigned_param_type xs, /* don't bother */ break; case 0x6: // GXxor - rectfill_pm(xd, yd, wi, re, 0, pm, sHRES); + rectfill_pm(xd, yd, wi, re, 0, pm, dst_ptr, dst_stride); break; } } @@ -338,11 +336,12 @@ static void rectfill(const unsigned_param_type xd, const unsigned_param_type wi, const unsigned_param_type re, const unsigned_param_type color, - const unsigned_param_type sHRES + unsigned char* dst_ptr, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; unsigned int i, j; - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); unsigned char *dptr_line = dptr; unsigned char u8color = color & 0xFF; @@ -364,7 +363,7 @@ static void rectfill(const unsigned_param_type xd, *dptr_elt = u8color; dptr_elt ++; } - dptr_line += sHRES; + dptr_line += dst_stride; } } @@ -374,11 +373,12 @@ static void rectfill_pm(const unsigned_param_type xd, const unsigned_param_type re, const unsigned_param_type color, const unsigned char pm, - const unsigned_param_type sHRES + unsigned char* dst_ptr, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; unsigned int i, j; - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); unsigned char *dptr_line = dptr; unsigned char u8color = color; @@ -401,7 +401,7 @@ static void rectfill_pm(const unsigned_param_type xd, *dptr_elt = (u8color & pm) | (*dptr_elt & ~pm); dptr_elt ++; } - dptr_line += sHRES; + dptr_line += dst_stride; } } @@ -411,11 +411,12 @@ static void xorrectfill(const unsigned_param_type xd, const unsigned_param_type wi, const unsigned_param_type re, const unsigned_param_type color, - const unsigned_param_type sHRES + unsigned char* dst_ptr, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; unsigned int i, j; - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); unsigned char *dptr_line = dptr; unsigned char u8color = color & 0xFF; @@ -437,7 +438,7 @@ static void xorrectfill(const unsigned_param_type xd, *dptr_elt ^= u8color; dptr_elt ++; } - dptr_line += sHRES; + dptr_line += dst_stride; } } static void xorrectfill_pm(const unsigned_param_type xd, @@ -446,11 +447,12 @@ static void xorrectfill_pm(const unsigned_param_type xd, const unsigned_param_type re, const unsigned_param_type color, const unsigned char pm, - const unsigned_param_type sHRES + unsigned char* dst_ptr, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; unsigned int i, j; - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); unsigned char *dptr_line = dptr; unsigned char u8color = color; @@ -473,7 +475,7 @@ static void xorrectfill_pm(const unsigned_param_type xd, *dptr_elt ^= (u8color & pm); dptr_elt ++; } - dptr_line += sHRES; + dptr_line += dst_stride; } } @@ -481,11 +483,12 @@ static void invert(const unsigned_param_type xd, const unsigned_param_type yd, const unsigned_param_type wi, const unsigned_param_type re, - const unsigned_param_type sHRES + unsigned char* dst_ptr, + const unsigned_param_type dst_stride ) { struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS; unsigned int i, j; - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); unsigned char *dptr_line = dptr; for (j = 0 ; j < re ; j++) { @@ -505,7 +508,7 @@ static void invert(const unsigned_param_type xd, *dptr_elt = ~(*dptr_elt); dptr_elt ++; } - dptr_line += sHRES; + dptr_line += dst_stride; } } @@ -526,10 +529,13 @@ static void invert(const unsigned_param_type xd, const unsigned_param_type xd, \ const unsigned_param_type yd, \ const unsigned char pm, \ - const unsigned_param_type sHRES) { \ + unsigned char* src_ptr, \ + unsigned char* dst_ptr, \ + const unsigned_param_type src_stride, \ + const unsigned_param_type dst_stride) { \ unsigned int i, j; \ - unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \ - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \ + unsigned char *sptr = (src_ptr + (ys * src_stride) + xs); \ + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); \ unsigned char *sptr_line = sptr; \ unsigned char *dptr_line = dptr; \ /*const unsigned char npm = ~pm;*/ \ @@ -584,8 +590,8 @@ static void invert(const unsigned_param_type xd, dptr_elt ++; \ sptr_elt ++; \ } \ - sptr_line += sHRES; \ - dptr_line += sHRES; \ + sptr_line += src_stride; \ + dptr_line += dst_stride; \ } \ } @@ -597,10 +603,13 @@ static void invert(const unsigned_param_type xd, const unsigned_param_type xd, \ const unsigned_param_type yd, \ const unsigned char pm, \ - const unsigned_param_type sHRES) { \ + unsigned char* src_ptr, \ + unsigned char* dst_ptr, \ + const unsigned_param_type src_stride, \ + const unsigned_param_type dst_stride) { \ unsigned int i, j; \ - unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \ - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \ + unsigned char *sptr = (src_ptr + (ys * src_stride) + xs); \ + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); \ unsigned char *sptr_line = sptr + wi - 1; \ unsigned char *dptr_line = dptr + wi - 1; \ const unsigned char npm = ~pm; \ @@ -613,8 +622,8 @@ static void invert(const unsigned_param_type xd, dptr_elt --; \ sptr_elt --; \ } \ - sptr_line += sHRES; \ - dptr_line += sHRES; \ + sptr_line += src_stride; \ + dptr_line += dst_stride; \ } \ } @@ -626,12 +635,15 @@ static void invert(const unsigned_param_type xd, const unsigned_param_type xd, \ const unsigned_param_type yd, \ const unsigned char pm, \ - const unsigned_param_type sHRES) { \ + unsigned char* src_ptr, \ + unsigned char* dst_ptr, \ + const unsigned_param_type src_stride, \ + const unsigned_param_type dst_stride) { \ unsigned int i, j; \ - unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \ - unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \ - unsigned char *sptr_line = sptr + mul_sHRES(re-1); \ - unsigned char *dptr_line = dptr + mul_sHRES(re-1); \ + unsigned char *sptr = (src_ptr + (ys * src_stride) + xs); \ + unsigned char *dptr = (dst_ptr + (yd * dst_stride) + xd); \ + unsigned char *sptr_line = sptr + ((re-1) * src_stride); \ + unsigned char *dptr_line = dptr + ((re-1) * dst_stride); \ const unsigned char npm = ~pm; \ \ for (j = 0 ; j < re ; j++) { \ @@ -688,8 +700,8 @@ static void invert(const unsigned_param_type xd, dptr_elt ++; \ sptr_elt ++; \ } \ - sptr_line -= sHRES; \ - dptr_line -= sHRES; \ + sptr_line -= src_stride; \ + dptr_line -= dst_stride; \ } \ } diff --git a/nubus-to-ztex-gateware/blit.sh b/nubus-to-ztex-gateware/blit.sh index 633073b..faa6aa5 100755 --- a/nubus-to-ztex-gateware/blit.sh +++ b/nubus-to-ztex-gateware/blit.sh @@ -1,8 +1,6 @@ #!/bin/bash -x -HRES=${1:-1920} -VRES=${2:-1080} -BASE_FB=${3:-0x8F800000} +BASE_FB=${1:-0x8F800000} GCCDIR=~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14 GCCPFX=riscv64-unknown-elf- @@ -20,7 +18,7 @@ OBJCOPY=${GCCDIR}/bin/${GCCPFX}objcopy OPT=-Os #-fno-inline ARCH=rv32im_zba_zbb_zbt -PARAM="-DHRES=${HRES} -DVRES=${VRES} -DBASE_FB=${BASE_FB}" +PARAM="-DBASE_FB=${BASE_FB}" if test "x$1" != "xASM"; then $GCC $OPT -S -o blit.s $PARAM -march=$ARCH -mabi=ilp32 -mstrict-align -fno-builtin-memset -nostdlib -ffreestanding -nostartfiles blit.c diff --git a/nubus-to-ztex-gateware/goblin_accel.py b/nubus-to-ztex-gateware/goblin_accel.py index 3f7ff29..1e3180f 100644 --- a/nubus-to-ztex-gateware/goblin_accel.py +++ b/nubus-to-ztex-gateware/goblin_accel.py @@ -12,7 +12,7 @@ class GoblinAccel(Module): # AutoCSR ? # reg access self.bus = bus = wishbone.Interface() - self.COORD_BITS = COORD_BITS = 16 # need enough bytes for 32-bits wat widest resolution + self.COORD_BITS = COORD_BITS = 14 # need enough bytes for 32-bits depth and widest resolution ; should be <= 15 otherwise the INIT code will need to strip the upper bit from some parameters reg_status = Signal(32) # 0 reg_cmd = Signal(32) # 1 @@ -26,8 +26,10 @@ class GoblinAccel(Module): # AutoCSR ? reg_bitblt_src_y = Signal(COORD_BITS) # 9 reg_bitblt_dst_x = Signal(COORD_BITS) # 10 reg_bitblt_dst_y = Signal(COORD_BITS) # 11 - reg_chk_adr = Signal(32) # 12 - reg_chk_val = Signal(32) # 13 + reg_src_stride = Signal(COORD_BITS) # 12 + reg_dst_stride = Signal(COORD_BITS) # 13 + reg_src_ptr = Signal(32) # 14 + reg_dst_ptr = Signal(32) # 15 # do-some-work flags do_blit = Signal() @@ -87,8 +89,10 @@ class GoblinAccel(Module): # AutoCSR ? 9: [ NextValue(reg_bitblt_src_y, bus_dat_w_endian) ], 10: [ NextValue(reg_bitblt_dst_x, bus_dat_w_endian) ], 11: [ NextValue(reg_bitblt_dst_y, bus_dat_w_endian) ], - 12: [ NextValue(reg_chk_adr, bus_dat_w_endian) ], - 13: [ NextValue(reg_chk_val, bus_dat_w_endian) ], + 12: [ NextValue(reg_src_stride, bus_dat_w_endian) ], + 13: [ NextValue(reg_dst_stride, bus_dat_w_endian) ], + 14: [ NextValue(reg_src_ptr, bus_dat_w_endian) ], + 15: [ NextValue(reg_dst_ptr, bus_dat_w_endian) ], }), NextValue(bus.ack, 1), ).Elif(bus.cyc & bus.stb & ~bus.we & ~bus.ack, #read @@ -106,8 +110,10 @@ class GoblinAccel(Module): # AutoCSR ? 9: [ NextValue(bus_dat_r_endian, reg_bitblt_src_y) ], 10: [ NextValue(bus_dat_r_endian, reg_bitblt_dst_x) ], 11: [ NextValue(bus_dat_r_endian, reg_bitblt_dst_y) ], - 12: [ NextValue(bus_dat_r_endian, reg_chk_adr) ], - 13: [ NextValue(bus_dat_r_endian, reg_chk_val) ], + 12: [ NextValue(bus_dat_r_endian, reg_src_stride) ], + 13: [ NextValue(bus_dat_r_endian, reg_dst_stride) ], + 14: [ NextValue(bus_dat_r_endian, reg_src_ptr) ], + 15: [ NextValue(bus_dat_r_endian, reg_dst_ptr) ], }), NextValue(bus.ack, 1), ).Else(