HDMI Audio

This commit is contained in:
Romain Dolbeau 2023-01-08 15:11:22 +01:00
parent 06c7d389a2
commit d0b44c8143
7 changed files with 1389 additions and 12 deletions

View File

@ -28,9 +28,11 @@ RB15s = HRES*2
RB24s = HRES*4
DrHwNuBusFPGA = 0xBEEF /* placeholder for GoboFB */
DrHwNuBusFPGADsk = 0xBEEE /* placeholder for RAM Dsk*/
DrHwNuBusFPGADsk = 0xBEEE /* placeholder for RAM Dsk */
DrHwNuBusFPGAAudio = 0xBEED /* placeholder for Audio */
typeDrive = 0x1000 /* placeholder for RAM Dsk*/
typeAudio = 0x1001 /* placeholder for Audio*/
defmBaseOffset = 0 /* beginning, placeholder */

View File

@ -269,7 +269,8 @@ int main(int argc, char **argv) {
fprintf(fd, "\tOSLstEntry\tsRsrc_GoboFB_R%hux%hu,_sRsrc_GoboFB_R%hux%hu/* video sRsrc List */\n", hres, vres, hres, vres);
}
}
fprintf(fd, "\tOSLstEntry\tsRsrc_RAMDsk,_sRsrc_RAMDsk\n");
//fprintf(fd, "\tOSLstEntry\tsRsrc_RAMDsk,_sRsrc_RAMDsk\n");
fprintf(fd, "\tOSLstEntry\tsRsrc_HDMIAudio,_sRsrc_HDMIAudio\n");
fprintf(fd, "\tDatLstEntry endOfList, 0\n");
fclose(fd);

View File

@ -9,6 +9,7 @@
sRsrc_Board = 1 /* board sResource (>0 & <128) */
.include "VidRomDef.s"
sRsrc_RAMDsk = 0x90 /* functional sResources */
sRsrc_HDMIAudio = 0xA0 /* functional sResources */
.global DeclROMDir
@ -158,6 +159,20 @@ _RAMDskDrvrDir:
/* _RAMDskEnd020Drvr: */ /* supplied by linker script */
.section .text.begin
ALIGN 2
_sRsrc_HDMIAudio:
OSLstEntry sRsrcType,_HDMIAudioType /* video type descriptor */
.long EndOfList /* end of list */
ALIGN 2
_HDMIAudioType:
.short catProto /* <Category> */
.short typeAudio /* custom */ /* <Type> */
.short drSwApple /* <DrvrSw> */
.short DrHwNuBusFPGAAudio /* <DrvrHw> */
/* Declaration ROM directory at end */
.section .romblock
ALIGN 2

File diff suppressed because it is too large Load Diff

@ -1 +1 @@
Subproject commit 59e39731defcad164ff30f395f7fa079e63a78af
Subproject commit c18819f169c556ada9fc0d6358c3965aef09ee48

@ -0,0 +1 @@
Subproject commit 01c18e4cbba4aeb5cebecc71cd9bb14ae7bf49b3

View File

@ -142,6 +142,7 @@ class _CRG(Module):
num_clk = num_clk + 1
platform.add_platform_command("create_generated_clock -name hdmi5x_clk [get_pins {{{{MMCME2_ADV_{}/CLKOUT{}}}}}]".format(num_adv, num_clk))
num_clk = num_clk + 1
self.comb += video_pll.reset.eq(~rst_nubus_n)
#platform.add_false_path_constraints(self.cd_sys.clk, self.cd_vga.clk)
platform.add_false_path_constraints(self.cd_sys.clk, video_pll.clkin)
@ -215,6 +216,7 @@ class NuBusFPGA(SoCCore):
"goblin_accel_ram" : 0xF0902000, # accel for goblin (scratch ram)
"stat" : 0xF0903000, # stat
"goblin_accel_rom" : 0xF0910000, # accel for goblin (rom)
"goblin_audio_ram" : 0xF0920000, # audio for goblin (RAM buffers)
"csr" : 0xF0A00000, # CSR
"pingmaster": 0xF0B00000,
"rom": 0xF0FF8000, # ROM at the end (32 KiB of it ATM)
@ -375,16 +377,17 @@ class NuBusFPGA(SoCCore):
self.submodules.fromsbus_fifo = ClockDomainsRenamer({"write": "nubus", "read": "sys"})(AsyncFIFOBuffered(width=layout_len(self.fromsbus_layout), depth=512//data_width))
self.submodules.fromsbus_req_fifo = ClockDomainsRenamer({"read": "nubus", "write": "sys"})(AsyncFIFOBuffered(width=layout_len(self.fromsbus_req_layout), depth=512//data_width))
irq_line = self.platform.request("nmrq_3v3_n") # active low
fb_irq = Signal() # active low
dma_irq = Signal() # active low
led0 = platform.request("user_led", 0)
led1 = platform.request("user_led", 1)
self.comb += [
led0.eq(~fb_irq),
led1.eq(~dma_irq),
]
fb_irq = Signal(reset = 1) # active low
dma_irq = Signal(reset = 1) # active low
audio_irq = Signal(reset = 1) # active low
#led0 = platform.request("user_led", 0)
#led1 = platform.request("user_led", 1)
#self.comb += [
# led0.eq(~fb_irq),
# led1.eq(~dma_irq),
#]
self.comb += irq_line.eq(fb_irq & dma_irq) # active low, enable if one is low
self.comb += irq_line.eq(fb_irq & dma_irq & audio_irq) # active low, enable if one is low
self.submodules.exchange_with_mem = ExchangeWithMem(soc=self,
platform=platform,
@ -429,6 +432,11 @@ class NuBusFPGA(SoCCore):
else:
# GoblinAlt contains its own PHY
self.submodules.goblin = GoblinAlt(soc=self, timings=goblin_res, clock_domain="hdmi", irq_line=fb_irq, endian="little", hwcursor=False, truecolor=True)
# it also has a bus master so that the audio bit can fetch data from Wishbone
self.bus.add_master(name="GoblinAudio", master=self.goblin.goblin_audio.busmaster)
self.add_ram("goblin_audio_ram", origin=self.mem_map["goblin_audio_ram"], size=2**13, mode="rw") # 8 KiB buffer, planned as 2*4KiB
self.comb += [ audio_irq.eq(self.goblin.goblin_audio.irq), ]
self.bus.add_slave("goblin_bt", self.goblin.bus, SoCRegion(origin=self.mem_map.get("goblin_bt", None), size=0x1000, cached=False))
#pad_user_led_0 = platform.request("user_led", 0)
#pad_user_led_1 = platform.request("user_led", 1)