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https://github.com/rdolbeau/NuBusFPGA.git
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HDMI Audio
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parent
06c7d389a2
commit
d0b44c8143
@ -29,8 +29,10 @@ RB24s = HRES*4
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DrHwNuBusFPGA = 0xBEEF /* placeholder for GoboFB */
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DrHwNuBusFPGADsk = 0xBEEE /* placeholder for RAM Dsk */
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DrHwNuBusFPGAAudio = 0xBEED /* placeholder for Audio */
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typeDrive = 0x1000 /* placeholder for RAM Dsk*/
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typeAudio = 0x1001 /* placeholder for Audio*/
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defmBaseOffset = 0 /* beginning, placeholder */
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@ -269,7 +269,8 @@ int main(int argc, char **argv) {
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fprintf(fd, "\tOSLstEntry\tsRsrc_GoboFB_R%hux%hu,_sRsrc_GoboFB_R%hux%hu/* video sRsrc List */\n", hres, vres, hres, vres);
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}
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}
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fprintf(fd, "\tOSLstEntry\tsRsrc_RAMDsk,_sRsrc_RAMDsk\n");
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//fprintf(fd, "\tOSLstEntry\tsRsrc_RAMDsk,_sRsrc_RAMDsk\n");
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fprintf(fd, "\tOSLstEntry\tsRsrc_HDMIAudio,_sRsrc_HDMIAudio\n");
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fprintf(fd, "\tDatLstEntry endOfList, 0\n");
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fclose(fd);
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@ -9,6 +9,7 @@
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sRsrc_Board = 1 /* board sResource (>0 & <128) */
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.include "VidRomDef.s"
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sRsrc_RAMDsk = 0x90 /* functional sResources */
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sRsrc_HDMIAudio = 0xA0 /* functional sResources */
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.global DeclROMDir
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@ -158,6 +159,20 @@ _RAMDskDrvrDir:
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/* _RAMDskEnd020Drvr: */ /* supplied by linker script */
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.section .text.begin
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ALIGN 2
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_sRsrc_HDMIAudio:
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OSLstEntry sRsrcType,_HDMIAudioType /* video type descriptor */
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.long EndOfList /* end of list */
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ALIGN 2
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_HDMIAudioType:
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.short catProto /* <Category> */
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.short typeAudio /* custom */ /* <Type> */
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.short drSwApple /* <DrvrSw> */
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.short DrHwNuBusFPGAAudio /* <DrvrHw> */
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/* Declaration ROM directory at end */
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.section .romblock
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ALIGN 2
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1350
nubus-to-ztex-gateware/NuBusFPGAHDMIAudio/NuBusFPGAHDMIAudio.c
Normal file
1350
nubus-to-ztex-gateware/NuBusFPGAHDMIAudio/NuBusFPGAHDMIAudio.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -1 +1 @@
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Subproject commit 59e39731defcad164ff30f395f7fa079e63a78af
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Subproject commit c18819f169c556ada9fc0d6358c3965aef09ee48
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1
nubus-to-ztex-gateware/hdl-util_hdmi
Submodule
1
nubus-to-ztex-gateware/hdl-util_hdmi
Submodule
@ -0,0 +1 @@
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Subproject commit 01c18e4cbba4aeb5cebecc71cd9bb14ae7bf49b3
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@ -142,6 +142,7 @@ class _CRG(Module):
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num_clk = num_clk + 1
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platform.add_platform_command("create_generated_clock -name hdmi5x_clk [get_pins {{{{MMCME2_ADV_{}/CLKOUT{}}}}}]".format(num_adv, num_clk))
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num_clk = num_clk + 1
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self.comb += video_pll.reset.eq(~rst_nubus_n)
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#platform.add_false_path_constraints(self.cd_sys.clk, self.cd_vga.clk)
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platform.add_false_path_constraints(self.cd_sys.clk, video_pll.clkin)
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@ -215,6 +216,7 @@ class NuBusFPGA(SoCCore):
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"goblin_accel_ram" : 0xF0902000, # accel for goblin (scratch ram)
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"stat" : 0xF0903000, # stat
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"goblin_accel_rom" : 0xF0910000, # accel for goblin (rom)
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"goblin_audio_ram" : 0xF0920000, # audio for goblin (RAM buffers)
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"csr" : 0xF0A00000, # CSR
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"pingmaster": 0xF0B00000,
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"rom": 0xF0FF8000, # ROM at the end (32 KiB of it ATM)
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@ -375,16 +377,17 @@ class NuBusFPGA(SoCCore):
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self.submodules.fromsbus_fifo = ClockDomainsRenamer({"write": "nubus", "read": "sys"})(AsyncFIFOBuffered(width=layout_len(self.fromsbus_layout), depth=512//data_width))
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self.submodules.fromsbus_req_fifo = ClockDomainsRenamer({"read": "nubus", "write": "sys"})(AsyncFIFOBuffered(width=layout_len(self.fromsbus_req_layout), depth=512//data_width))
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irq_line = self.platform.request("nmrq_3v3_n") # active low
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fb_irq = Signal() # active low
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dma_irq = Signal() # active low
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led0 = platform.request("user_led", 0)
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led1 = platform.request("user_led", 1)
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self.comb += [
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led0.eq(~fb_irq),
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led1.eq(~dma_irq),
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]
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fb_irq = Signal(reset = 1) # active low
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dma_irq = Signal(reset = 1) # active low
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audio_irq = Signal(reset = 1) # active low
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#led0 = platform.request("user_led", 0)
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#led1 = platform.request("user_led", 1)
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#self.comb += [
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# led0.eq(~fb_irq),
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# led1.eq(~dma_irq),
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#]
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self.comb += irq_line.eq(fb_irq & dma_irq) # active low, enable if one is low
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self.comb += irq_line.eq(fb_irq & dma_irq & audio_irq) # active low, enable if one is low
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self.submodules.exchange_with_mem = ExchangeWithMem(soc=self,
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platform=platform,
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@ -429,6 +432,11 @@ class NuBusFPGA(SoCCore):
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else:
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# GoblinAlt contains its own PHY
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self.submodules.goblin = GoblinAlt(soc=self, timings=goblin_res, clock_domain="hdmi", irq_line=fb_irq, endian="little", hwcursor=False, truecolor=True)
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# it also has a bus master so that the audio bit can fetch data from Wishbone
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self.bus.add_master(name="GoblinAudio", master=self.goblin.goblin_audio.busmaster)
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self.add_ram("goblin_audio_ram", origin=self.mem_map["goblin_audio_ram"], size=2**13, mode="rw") # 8 KiB buffer, planned as 2*4KiB
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self.comb += [ audio_irq.eq(self.goblin.goblin_audio.irq), ]
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self.bus.add_slave("goblin_bt", self.goblin.bus, SoCRegion(origin=self.mem_map.get("goblin_bt", None), size=0x1000, cached=False))
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#pad_user_led_0 = platform.request("user_led", 0)
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#pad_user_led_1 = platform.request("user_led", 1)
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