Macintosh-HW/NuBusFPGA
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renames files to V1_2

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Romain Dolbeau 2022-11-01 15:31:34 +01:00
parent 4ab5382a2f
commit d3746505d0
3 changed files with 2 additions and 1 deletions
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nubus-to-ztex-gateware/nubus.py → nubus-to-ztex-gateware/nubus_V1_2.py
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nubus-to-ztex-gateware/nubus.v → nubus-to-ztex-gateware/nubus_V1_2.v
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nubus-to-ztex-gateware/nubus_to_fpga_soc.py
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@ -310,6 +310,7 @@ class NuBusFPGA(SoCCore):
self.bus.add_master(name="NuBusBridgeToWishbone", master=wishbone_master_sys) self.bus.add_master(name="NuBusBridgeToWishbone", master=wishbone_master_sys)
self.submodules.nubus = nubus.NuBus(platform=platform, cd_nubus="nubus") self.submodules.nubus = nubus.NuBus(platform=platform, cd_nubus="nubus")
#self.submodules.nubus2wishbone = ClockDomainsRenamer("nubus")(NuBus2Wishbone(nubus=self.nubus,wb=self.wishbone_master_nubus)) #self.submodules.nubus2wishbone = ClockDomainsRenamer("nubus")(NuBus2Wishbone(nubus=self.nubus,wb=self.wishbone_master_nubus))
if (version == "V1.2"):
self.comb += self.nubus.nubus_oe.eq(hold_reset) # improveme self.comb += self.nubus.nubus_oe.eq(hold_reset) # improveme
nubus_writemaster_sys = wishbone.Interface(data_width=self.bus.data_width) nubus_writemaster_sys = wishbone.Interface(data_width=self.bus.data_width)
self.submodules.nubus2wishbone = NuBus2WishboneFIFO(platform=self.platform,nubus=self.nubus,wb_read=self.wishbone_master_nubus,wb_write=nubus_writemaster_sys) self.submodules.nubus2wishbone = NuBus2WishboneFIFO(platform=self.platform,nubus=self.nubus,wb_read=self.wishbone_master_nubus,wb_write=nubus_writemaster_sys)