Macintosh-HW/NuBusFPGA
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Author SHA1 Message Date
Romain Dolbeau
f722c396c9 clean-ups 2022-09-21 23:38:09 +02:00
Romain Dolbeau
be8a2ec995 sampling more configurable 2022-09-21 23:06:17 +02:00
Romain Dolbeau
b935541f61 sync non-sampling with sampling code 2022-09-21 23:05:23 +02:00
Romain Dolbeau
45de956195 disable leds 2022-09-21 23:04:56 +02:00
Romain Dolbeau
7eb5f578c3 missing entries (???) 2022-09-20 23:11:59 +02:00
Romain Dolbeau
b8bd914a0b fixes suggested on #mac68k 2022-09-20 08:39:35 +02:00
Romain Dolbeau
09f456cae3 video page in WS (not yet HW), but MAcOS never uses that ??? Also add pram support. 2022-09-18 14:13:25 +02:00
Romain Dolbeau
759354fa07 update on write not change 2022-09-18 14:12:31 +02:00
Romain Dolbeau
085522bb66 upd readme 2022-09-18 09:40:57 +02:00
Romain Dolbeau
1aed1ad89b Multi (windoboxed) resolution support 2022-09-18 09:10:04 +02:00
Romain Dolbeau
9e2caed442 oups, typos for 16/32 2022-09-17 19:10:55 +02:00
Romain Dolbeau
7084f6e113 automate DeclRom more 2022-09-17 17:06:15 +02:00
Romain Dolbeau
06637bbd5d preliminary windowed resolution (640x480 for the moment) 2022-09-17 14:44:26 +02:00
Romain Dolbeau
ce88b7c264 track HW changes 2022-09-11 14:36:14 +02:00
Romain Dolbeau
b5d553801f byte-swap the FB (SBus) 2022-08-27 10:21:49 +02:00
Romain Dolbeau
87d04b187f Rounding FMA 2022-08-27 08:30:21 +02:00
Romain Dolbeau
759cfdbf4f more bugfixes for EXA 2022-08-21 15:05:23 +02:00
Romain Dolbeau
b27fdca5a2 typos... 2022-08-21 11:08:08 +02:00
Romain Dolbeau
d1f07a12be reverse byte... 2022-08-20 19:27:57 +02:00
Romain Dolbeau
6e8b0192e2 Stuff for exa/composite support in X11 (SBusFPGA only for now) 2022-08-20 18:54:30 +02:00
Romain Dolbeau
d9f964dd47 fix biblit bug 2022-08-15 17:22:11 +02:00
Romain Dolbeau
71d88bfb61 better goblin (+accel) in SBus 2022-08-15 10:20:56 +02:00
Romain Dolbeau
d7968d9c48 typo 2022-08-15 10:18:31 +02:00
Romain Dolbeau
b3ff86573c trying to re-instate SBus compatibility 2022-07-24 13:12:40 +02:00
Romain Dolbeau
d70ba3e434 rename blit to blit_goblin 2022-07-23 12:58:13 +02:00
Romain Dolbeau
abdb178089 trying to debug DMA for RAMDsk 2022-07-23 12:53:30 +02:00
Romain Dolbeau
2fa11c6839 update README 2022-07-14 18:24:06 +02:00
Romain Dolbeau
c0fbdca5d3 preliminary burst support for DMA 2022-07-14 17:17:53 +02:00
Romain Dolbeau
5e7e7d5e2c 'back'port superslot to non-sampling NuBus interface 2022-07-14 09:34:29 +02:00
Romain Dolbeau
d7a344555e dCtlDevBase might be empty, but dCtlSlot is fine... 2022-07-14 09:33:15 +02:00
Romain Dolbeau
3f3371a054 fix messed up timing... 2022-07-14 08:54:23 +02:00
Romain Dolbeau
7913f6bced upadte README 2022-06-26 13:27:33 +02:00
Romain Dolbeau
363dd56600 checking in slot 2022-06-26 13:22:12 +02:00
Romain Dolbeau
c6d6e26438 detect slot in INIT; detect slot in RAMDsk driver ; auto-mount RAMDDsk 2022-06-26 12:31:43 +02:00
Romain Dolbeau
724d4406f9 better patterns 2022-06-25 12:54:10 +02:00
Romain Dolbeau
733f446b27 HW-acceel big pattern (not sure about alignment...), add basic Icon w/ ShowInitIcon 2022-06-25 08:51:17 +02:00
Romain Dolbeau
173c87ea02 LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650 2022-06-24 23:37:18 +02:00
Romain Dolbeau
2d2cbdbafe update ioRange; it doesn't actually affect the cache, only the MMU which we don't use... 2022-06-12 13:46:58 +02:00
Romain Dolbeau
972f628e80 use some custom RLE to initiliaze the RAM disk with a valid HFS FS. Still doesn't mount at boot though. 2022-06-12 13:45:41 +02:00
Romain Dolbeau
2000161727 in _sampling, map whole SDRAm in superslot and use the first 248 Mib as a RAM disk with driver in the DeclRom 2022-06-07 23:05:08 +02:00
Romain Dolbeau
9b9f0efb6e draft non-synchronous NuBus (using sampling at sysclk to cut down on latency), minimalist support for 1/2/4 accel 2022-06-06 23:36:43 +02:00
Romain Dolbeau
9d4fbadbd4 commit current Vex config 2022-06-05 18:04:00 +02:00
Romain Dolbeau
94cd6a9411 Move Vex to a 128-bit Wishbone, and add a bypass to access a dedicated memory port with a 128-bits datapath. Speeds up scrolling quite nicely. 2022-06-05 18:03:23 +02:00
Romain Dolbeau
d9c21e7abb stat module 2022-06-04 18:56:41 +02:00
Romain Dolbeau
85c62fb331 new interface 2022-06-04 17:25:58 +02:00
Romain Dolbeau
76c29d5b69 accel in 16/32 ; includes adding MUL to Vex & fixing a FIFO overrun in NuBus in 32 bits mode 2022-06-04 14:55:40 +02:00
Romain Dolbeau
9a50f36153 add a byte-reversed access mode to accel registers, avoid the byte-reverse on the host 2022-06-04 11:11:28 +02:00
Romain Dolbeau
fbcfe3152c DMA debug with XiBus NuBus & add alternate Migen implementation of NuBus 2022-06-04 09:53:09 +02:00
Romain Dolbeau
6271ddbef8 pingmaster sort-of-work 2022-05-30 19:06:33 +02:00
Romain Dolbeau
3a52ab666f buffers (fifo) write from NuBus to Wishbone, to improve write BW 2022-05-30 13:15:20 +02:00