708 lines
23 KiB
C
708 lines
23 KiB
C
/*
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~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc -Os -S blit.c -march=rv32ib -mabi=ilp32 -mstrict-align -fno-builtin-memset -nostdlib -ffreestanding -nostartfiles
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~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc -Os -o blit -march=rv32ib -mabi=ilp32 -T blit.lds -nostartfiles blit.s
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~/LITEX/riscv64-unknown-elf-gcc-10.1.0-2020.08.2-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-objcopy -O binary -j .text blit blit.raw
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*/
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#ifndef HRES
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#define HRES 1920
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#warning "Using default HRES"
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#endif
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#ifndef VRES
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#define VRES 1080
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#warning "Using default VRES"
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#endif
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#ifndef BASE_FB
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#define BASE_FB 0x8F800000 // FIXME : should be generated ; 2+ MiB of SDRAM as framebuffer
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#warning "Using default BASE_FB"
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#endif
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#define BASE_ROM 0xF0910000 // FIXME : should be generated ; 4-64 KiB of Wishbone ROM ? ; also in the LDS file ; also in the Vex config
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#define BASE_RAM 0xF0902000 // FIXME : should be generated : 4-64 KiB of Wishbone SRAM ? ; also in _start
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#define BASE_RAM_SIZE 0x00001000 // FIXME : should be generated : 4-64 KiB of Wishbone SRAM ? ; also in _start
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#define BASE_BT_REGS 0xF0900000
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#define BASE_ACCEL_REGS 0xF0901000
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#define mul_sHRES(a) ((a) * sHRES)
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//typedef void (*boot_t)(void);
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//typedef void (*start_t)(unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short, unsigned short);
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typedef unsigned int uint32_t;
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typedef volatile unsigned int u_int32_t;
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/*
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struct control_blitter {
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volatile unsigned int fun;
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volatile unsigned int done;
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volatile unsigned short arg[8];
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};
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*/
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#define FUN_BLIT_BIT 0 // hardwired in goblin_accel.py
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#define FUN_FILL_BIT 1 // hardwired in goblin_accel.py
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#define FUN_TEST_BIT 3 // hardwired in goblin_accel.py
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#define FUN_DONE_BIT 31
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#define FUN_BLIT (1<<FUN_BLIT_BIT)
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#define FUN_FILL (1<<FUN_FILL_BIT)
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#define FUN_TEST (1<<FUN_TEST_BIT)
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#define FUN_DONE (1<<FUN_DONE_BIT)
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struct goblin_bt_regs {
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u_int32_t mode;
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u_int32_t vbl_mask;
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u_int32_t videoctrl;
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u_int32_t intr_clear;
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u_int32_t reset;
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u_int32_t lut_addr;
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u_int32_t lut;
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u_int32_t debug;
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};
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enum goblin_bt_mode {
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mode_1bit = 0x00,
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mode_2bit = 0x01,
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mode_4bit = 0x02,
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mode_8bit = 0x03,
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mode_32bit = 0x10,
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mode_16bit = 0x11
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};
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struct goblin_accel_regs {
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u_int32_t reg_status; // 0
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u_int32_t reg_cmd;
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u_int32_t reg_r5_cmd;
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u_int32_t resv0;
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u_int32_t reg_width; // 4
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u_int32_t reg_height;
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u_int32_t reg_fgcolor;
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u_int32_t resv2;
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u_int32_t reg_bitblt_src_x; // 8
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u_int32_t reg_bitblt_src_y;
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u_int32_t reg_bitblt_dst_x;
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u_int32_t reg_bitblt_dst_y;
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u_int32_t reg_chk_adr; // 12
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u_int32_t reg_chk_val; // 13
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};
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//#include "./rvintrin.h"
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void from_reset(void) __attribute__ ((noreturn)); // nothrow,
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static inline void flush_cache(void) {
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asm volatile(".word 0x0000500F\n"); // flush the Dcache so that we get updated data
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}
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typedef unsigned int unsigned_param_type;
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static void rectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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);
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static void rectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm,
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const unsigned_param_type sHRES
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);
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static void xorrectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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);
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static void xorrectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm,
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const unsigned_param_type sHRES
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);
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static void invert(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type sHRES
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);
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static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type ys,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned char pm,
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const unsigned char gxop,
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const unsigned_param_type sHRES
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);
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static void print_hexword(unsigned int v, unsigned int bx, unsigned int by);
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static void show_status_on_screen(void);
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asm(".global _start\n"
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"_start:\n"
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// ".word 0x0000500F\n" // flush cache ; should not be needed after reset
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//"addi sp,zero,66\n" // 0x0042
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//"slli sp,sp,16\n" // 0x00420000, BASE_RAM
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//"addi a0,zero,1\n" // 0x0001
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//"slli a0,a0,12\n" // 0x00001000, BASE_RAM_SIZE
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//"add sp,sp,a0\n" // SP at the end of the SRAM
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"nop\n"
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"li sp, 0xF0902ffc\n" // SP at the end of the SRAM
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//"li a0, 0x00700968\n" // @ of r5_cmd
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//"li a1, 0x00C0FFEE\n"
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//"sw a1, 0(a0)\n"
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"call from_reset\n"
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".size _start, .-_start\n"
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".align 4\n"
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".globl _start\n"
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".type _start, @function\n"
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);
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#define imax(a,b) (((a)>(b))?(a):(b))
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#define imin(a,b) (((a)<(b))?(a):(b))
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#define DEBUG
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#ifdef DEBUG
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#define SHOW_FUN(a) /* fbc->fbc_r5_status[0] = a */
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#define SHOW_PC() /* SHOW_FUN(cmd); do { u_int32_t rd; asm volatile("auipc %[rd], 0" : [rd]"=r"(rd) ) ; fbc->fbc_r5_status[1] = rd; } while (0) */
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#define SHOW_PC_2VAL(a, b) /* SHOW_PC(); fbc->fbc_r5_status[2] = a; fbc->fbc_r5_status[3] = b */
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#else
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#define SHOW_FUN(a)
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#define SHOW_PC()
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#define SHOW_PC_2VAL(a, b)
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#endif
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/* need some way to have identifiable proc# and multiple struct control_blitter for //ism */
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/* First need to set up essential C stuff like the stack */
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/* maybe pass core-id as the first parameter (in a0) to everyone */
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/* also need to figure out the non-coherent caches ... */
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void from_reset(void) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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struct goblin_bt_regs* fbt = (struct goblin_bt_regs*)BASE_BT_REGS;
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unsigned int cmd = fbc->reg_r5_cmd;
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unsigned_param_type sHRES;
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switch ((fbt->mode>>24) & 0xFF) { // mode is 8 bits wrong-endian (all fbt is wrong-endian)
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case mode_32bit:
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sHRES = HRES * 4;
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break;
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case mode_16bit:
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sHRES = HRES * 2;
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break;
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default:
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sHRES = HRES;
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break;
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}
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switch (cmd & 0xF) {
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case FUN_BLIT: {
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bitblit(fbc->reg_bitblt_src_x, fbc->reg_bitblt_src_y,
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fbc->reg_width, fbc->reg_height,
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fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y,
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0xFF, 0x3, sHRES); // GXcopy
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} break;
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case FUN_FILL: {
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rectfill(fbc->reg_bitblt_dst_x, fbc->reg_bitblt_dst_y,
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fbc->reg_width, fbc->reg_height,
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fbc->reg_fgcolor, sHRES);
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} break;
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#if 1
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case FUN_TEST: {
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u_int32_t val = fbc->reg_chk_val;
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u_int32_t* ptr = (u_int32_t*)fbc->reg_chk_adr;
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u_int32_t pval = (*ptr);
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fbc->reg_chk_val = (val ^ pval);
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if (pval == 0x01234567)
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fbc->reg_chk_adr = 1;
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else if (pval == 0x67452301)
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fbc->reg_chk_adr = 0;
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else
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fbc->reg_chk_adr = -1;
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} break;
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#endif
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default:
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break;
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}
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finish:
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// make sure we have nothing left in the cache
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flush_cache();
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fbc->reg_r5_cmd = FUN_DONE;
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done:
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/* wait for reset */
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goto done;
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}
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#define bitblit_proto_int(a, b, suf) \
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static void bitblit##a##b##suf(const unsigned_param_type xs, \
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const unsigned_param_type ys, \
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const unsigned_param_type wi, \
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const unsigned_param_type re, \
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const unsigned_param_type xd, \
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const unsigned_param_type yd, \
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const unsigned char pm, \
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const unsigned_param_type sHRES \
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)
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#define bitblit_proto(suf) \
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bitblit_proto_int(_fwd, _fwd, suf); \
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bitblit_proto_int(_bwd, _fwd, suf); \
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bitblit_proto_int(_fwd, _bwd, suf)
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// bitblit_proto_int(_bwd, _bwd, suf);
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bitblit_proto(_copy);
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bitblit_proto(_xor);
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bitblit_proto(_copy_pm);
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bitblit_proto(_xor_pm);
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#define ROUTE_BITBLIT_PM(pm, bb) \
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if (pm == 0xFF) bb(xs, ys, wi, re, xd, yd, pm, sHRES); \
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else bb##_pm(xs, ys, wi, re, xd, yd, pm, sHRES)
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static void bitblit(const unsigned_param_type xs,
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const unsigned_param_type ys,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned char pm,
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const unsigned char gxop,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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if (ys > yd) {
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switch(gxop) {
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case 0x3: // GXcopy
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_fwd_copy);
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break;
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case 0x6: // GXxor
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_fwd_xor);
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break;
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}
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} else if (ys < yd) {
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switch(gxop) {
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case 0x3: // GXcopy
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ROUTE_BITBLIT_PM(pm, bitblit_bwd_fwd_copy);
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break;
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case 0x6: // GXxor
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ROUTE_BITBLIT_PM(pm, bitblit_bwd_fwd_xor);
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break;
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}
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} else { // ys == yd
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if (xs > xd) {
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switch(gxop) {
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case 0x3: // GXcopy
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_fwd_copy);
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break;
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case 0x6: // GXxor
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_fwd_xor);
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break;
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}
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} else if (xs < xd) {
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switch(gxop) {
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case 0x3: // GXcopy
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_bwd_copy);
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break;
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case 0x6: // GXxor
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ROUTE_BITBLIT_PM(pm, bitblit_fwd_bwd_xor);
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break;
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}
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} else { // xs == xd
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switch(gxop) {
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case 0x3: // GXcopy
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/* don't bother */
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break;
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case 0x6: // GXxor
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rectfill_pm(xd, yd, wi, re, 0, pm, sHRES);
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break;
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}
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}
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}
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}
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static void rectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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unsigned int i, j;
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color & 0xFF;
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for (j = 0 ; j < re ; j++) {
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unsigned char *dptr_elt = dptr_line;
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i = 0;
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for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) {
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*dptr_elt = u8color;
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dptr_elt ++;
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}
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if (wi > 3) {
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unsigned int u32color = (unsigned int)u8color | ((unsigned int)u8color)<<8 | ((unsigned int)u8color)<<16 | ((unsigned int)u8color)<<24;
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for ( ; i < (wi-3) ; i+=4) {
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*(unsigned int*)dptr_elt = u32color;
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dptr_elt +=4;
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}
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}
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for ( ; i < wi ; i++) {
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*dptr_elt = u8color;
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dptr_elt ++;
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}
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dptr_line += sHRES;
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}
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}
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static void rectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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unsigned int i, j;
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color;
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for (j = 0 ; j < re ; j++) {
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unsigned char *dptr_elt = dptr_line;
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i = 0;
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for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) {
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*dptr_elt = (u8color & pm) | (*dptr_elt & ~pm);
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dptr_elt ++;
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}
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if (wi > 3) {
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unsigned int u32color = (unsigned int)u8color | ((unsigned int)u8color)<<8 | ((unsigned int)u8color)<<16 | ((unsigned int)u8color)<<24;
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unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24;
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for ( ; i < (wi-3) ; i+=4) {
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*(unsigned int*)dptr_elt = (u32color & u32pm) | (*(unsigned int*)dptr_elt & ~u32pm);
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dptr_elt +=4;
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}
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}
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for ( ; i < wi ; i++) {
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*dptr_elt = (u8color & pm) | (*dptr_elt & ~pm);
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dptr_elt ++;
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}
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dptr_line += sHRES;
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}
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}
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static void xorrectfill(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned_param_type sHRES
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) {
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struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
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unsigned int i, j;
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unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
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unsigned char *dptr_line = dptr;
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unsigned char u8color = color & 0xFF;
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for (j = 0 ; j < re ; j++) {
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unsigned char *dptr_elt = dptr_line;
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i = 0;
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for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) {
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*dptr_elt ^= u8color;
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dptr_elt ++;
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}
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if (wi > 3) {
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unsigned int u32color = (unsigned int)u8color | ((unsigned int)u8color)<<8 | ((unsigned int)u8color)<<16 | ((unsigned int)u8color)<<24;
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for ( ; i < (wi-3) ; i+=4) {
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*(unsigned int*)dptr_elt ^= u32color;
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dptr_elt +=4;
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}
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}
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for ( ; i < wi ; i++) {
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*dptr_elt ^= u8color;
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dptr_elt ++;
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}
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dptr_line += sHRES;
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}
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}
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static void xorrectfill_pm(const unsigned_param_type xd,
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const unsigned_param_type yd,
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const unsigned_param_type wi,
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const unsigned_param_type re,
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const unsigned_param_type color,
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const unsigned char pm,
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const unsigned_param_type sHRES
|
|
) {
|
|
struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
|
unsigned int i, j;
|
|
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
|
|
unsigned char *dptr_line = dptr;
|
|
unsigned char u8color = color;
|
|
|
|
for (j = 0 ; j < re ; j++) {
|
|
unsigned char *dptr_elt = dptr_line;
|
|
i = 0;
|
|
for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) {
|
|
*dptr_elt ^= (u8color & pm);
|
|
dptr_elt ++;
|
|
}
|
|
if (wi > 3) {
|
|
unsigned int u32color = (unsigned int)u8color | ((unsigned int)u8color)<<8 | ((unsigned int)u8color)<<16 | ((unsigned int)u8color)<<24;
|
|
unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24;
|
|
for ( ; i < (wi-3) ; i+=4) {
|
|
*(unsigned int*)dptr_elt ^= (u32color & u32pm);
|
|
dptr_elt +=4;
|
|
}
|
|
}
|
|
for ( ; i < wi ; i++) {
|
|
*dptr_elt ^= (u8color & pm);
|
|
dptr_elt ++;
|
|
}
|
|
dptr_line += sHRES;
|
|
}
|
|
}
|
|
|
|
static void invert(const unsigned_param_type xd,
|
|
const unsigned_param_type yd,
|
|
const unsigned_param_type wi,
|
|
const unsigned_param_type re,
|
|
const unsigned_param_type sHRES
|
|
) {
|
|
struct goblin_accel_regs* fbc = (struct goblin_accel_regs*)BASE_ACCEL_REGS;
|
|
unsigned int i, j;
|
|
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd);
|
|
unsigned char *dptr_line = dptr;
|
|
|
|
for (j = 0 ; j < re ; j++) {
|
|
unsigned char *dptr_elt = dptr_line;
|
|
i = 0;
|
|
for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) {
|
|
*dptr_elt = ~(*dptr_elt);
|
|
dptr_elt ++;
|
|
}
|
|
if (wi > 3) {
|
|
for ( ; i < (wi-3) ; i+=4) {
|
|
*(unsigned int*)dptr_elt = ~(*(unsigned int*)dptr_elt);
|
|
dptr_elt +=4;
|
|
}
|
|
}
|
|
for ( ; i < wi ; i++) {
|
|
*dptr_elt = ~(*dptr_elt);
|
|
dptr_elt ++;
|
|
}
|
|
dptr_line += sHRES;
|
|
}
|
|
}
|
|
|
|
|
|
// NOT using npm enables the use of 'cmix' in more cases
|
|
#define COPY(d,s,pm,npm) (d) = (s)
|
|
//#define COPY_PM(d,s,pm,npm) (d) = (((s) & (pm)) | ((d) & (npm)))
|
|
#define COPY_PM(d,s,pm,npm) (d) = (((s) & (pm)) | ((d) & (~pm)))
|
|
#define XOR(d,s,pm,npm) (d) = ((s) ^ (d))
|
|
//#define XOR_PM(d,s,pm,npm) (d) = ((((s) ^ (d)) & (pm)) | ((d) & (npm)))
|
|
#define XOR_PM(d,s,pm,npm) (d) = ((((s) ^ (d)) & (pm)) | ((d) & (~pm)))
|
|
|
|
#define BLIT_FWD_FWD(NAME, OP) \
|
|
static void bitblit_fwd_fwd_##NAME(const unsigned_param_type xs, \
|
|
const unsigned_param_type ys, \
|
|
const unsigned_param_type wi, \
|
|
const unsigned_param_type re, \
|
|
const unsigned_param_type xd, \
|
|
const unsigned_param_type yd, \
|
|
const unsigned char pm, \
|
|
const unsigned_param_type sHRES) { \
|
|
unsigned int i, j; \
|
|
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
|
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
|
unsigned char *sptr_line = sptr; \
|
|
unsigned char *dptr_line = dptr; \
|
|
/*const unsigned char npm = ~pm;*/ \
|
|
\
|
|
for (j = 0 ; j < re ; j++) { \
|
|
unsigned char *sptr_elt = sptr_line; \
|
|
unsigned char *dptr_elt = dptr_line; \
|
|
i = 0; \
|
|
if (wi>3) { \
|
|
if ((xs & 0x3) || (xd & 0x3)) { \
|
|
for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) { \
|
|
OP(*dptr_elt, *sptr_elt, pm, npm); \
|
|
dptr_elt ++; \
|
|
sptr_elt ++; \
|
|
} \
|
|
unsigned char *sptr_elt_al = (unsigned char*)((unsigned int)sptr_elt & ~0x3); \
|
|
unsigned int fsr_cst = 8*((unsigned int)sptr_elt & 0x3); \
|
|
unsigned int src0 = ((unsigned int*)sptr_elt_al)[0]; \
|
|
unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24; \
|
|
for ( ; i < (wi-3) ; i+=4) { \
|
|
unsigned int src1 = ((unsigned int*)sptr_elt_al)[1]; \
|
|
unsigned int val; \
|
|
asm("fsr %0, %1, %2, %3\n" : "=r"(val) : "r"(src0), "r"(src1), "r"(fsr_cst)); \
|
|
OP(*(unsigned int*)dptr_elt, val, u32pm, u32npm); \
|
|
src0 = src1; \
|
|
dptr_elt += 4; \
|
|
sptr_elt_al += 4; \
|
|
} \
|
|
sptr_elt = sptr_elt_al + ((unsigned int)sptr_elt & 0x3); \
|
|
} else { \
|
|
const unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24; \
|
|
/*const unsigned int u32npm = (unsigned int)npm | ((unsigned int)npm)<<8 | ((unsigned int)npm)<<16 | ((unsigned int)npm)<<24;*/ \
|
|
if (((xs & 0xf) == 0) && ((xd & 0xf) == 0)) { \
|
|
for ( ; i < (wi&(~0xf)) ; i+= 16) { \
|
|
OP(((unsigned int*)dptr_elt)[0], ((unsigned int*)sptr_elt)[0], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[1], ((unsigned int*)sptr_elt)[1], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[2], ((unsigned int*)sptr_elt)[2], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[3], ((unsigned int*)sptr_elt)[3], u32pm, u32npm); \
|
|
dptr_elt += 16; \
|
|
sptr_elt += 16; \
|
|
} \
|
|
} \
|
|
for ( ; i < (wi&(~3)) ; i+= 4) { \
|
|
OP(((unsigned int*)dptr_elt)[0], ((unsigned int*)sptr_elt)[0], u32pm, u32npm); \
|
|
dptr_elt += 4; \
|
|
sptr_elt += 4; \
|
|
} \
|
|
} \
|
|
} \
|
|
for ( ; i < wi ; i++) { \
|
|
OP(*dptr_elt, *sptr_elt, pm, npm); \
|
|
dptr_elt ++; \
|
|
sptr_elt ++; \
|
|
} \
|
|
sptr_line += sHRES; \
|
|
dptr_line += sHRES; \
|
|
} \
|
|
}
|
|
|
|
#define BLIT_FWD_BWD(NAME, OP) \
|
|
static void bitblit_fwd_bwd_##NAME(const unsigned_param_type xs, \
|
|
const unsigned_param_type ys, \
|
|
const unsigned_param_type wi, \
|
|
const unsigned_param_type re, \
|
|
const unsigned_param_type xd, \
|
|
const unsigned_param_type yd, \
|
|
const unsigned char pm, \
|
|
const unsigned_param_type sHRES) { \
|
|
unsigned int i, j; \
|
|
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
|
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
|
unsigned char *sptr_line = sptr + wi - 1; \
|
|
unsigned char *dptr_line = dptr + wi - 1; \
|
|
const unsigned char npm = ~pm; \
|
|
\
|
|
for (j = 0 ; j < re ; j++) { \
|
|
unsigned char *sptr_elt = sptr_line; \
|
|
unsigned char *dptr_elt = dptr_line; \
|
|
for (i = 0 ; i < wi ; i++) { \
|
|
OP(*dptr_elt, *sptr_elt, pm, npm); \
|
|
dptr_elt --; \
|
|
sptr_elt --; \
|
|
} \
|
|
sptr_line += sHRES; \
|
|
dptr_line += sHRES; \
|
|
} \
|
|
}
|
|
|
|
#define BLIT_BWD_FWD(NAME, OP) \
|
|
static void bitblit_bwd_fwd_##NAME(const unsigned_param_type xs, \
|
|
const unsigned_param_type ys, \
|
|
const unsigned_param_type wi, \
|
|
const unsigned_param_type re, \
|
|
const unsigned_param_type xd, \
|
|
const unsigned_param_type yd, \
|
|
const unsigned char pm, \
|
|
const unsigned_param_type sHRES) { \
|
|
unsigned int i, j; \
|
|
unsigned char *sptr = (((unsigned char *)BASE_FB) + mul_sHRES(ys) + xs); \
|
|
unsigned char *dptr = (((unsigned char *)BASE_FB) + mul_sHRES(yd) + xd); \
|
|
unsigned char *sptr_line = sptr + mul_sHRES(re-1); \
|
|
unsigned char *dptr_line = dptr + mul_sHRES(re-1); \
|
|
const unsigned char npm = ~pm; \
|
|
\
|
|
for (j = 0 ; j < re ; j++) { \
|
|
unsigned char *sptr_elt = sptr_line; \
|
|
unsigned char *dptr_elt = dptr_line; \
|
|
i = 0; \
|
|
if (wi>3) { \
|
|
if ((xs & 0x3) || (xd & 0x3)) { \
|
|
for ( ; i < wi && ((unsigned int)dptr_elt&0x3)!=0; i++) { \
|
|
OP(*dptr_elt, *sptr_elt, pm, npm); \
|
|
dptr_elt ++; \
|
|
sptr_elt ++; \
|
|
} \
|
|
unsigned char *sptr_elt_al = (unsigned char*)((unsigned int)sptr_elt & ~0x3); \
|
|
unsigned int fsr_cst = 8*((unsigned int)sptr_elt & 0x3); \
|
|
unsigned int src0 = ((unsigned int*)sptr_elt_al)[0]; \
|
|
unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24; \
|
|
for ( ; i < (wi-3) ; i+=4) { \
|
|
unsigned int src1 = ((unsigned int*)sptr_elt_al)[1]; \
|
|
unsigned int val; \
|
|
asm("fsr %0, %1, %2, %3\n" : "=r"(val) : "r"(src0), "r"(src1), "r"(fsr_cst)); \
|
|
OP(*(unsigned int*)dptr_elt, val, u32pm, u32npm); \
|
|
src0 = src1; \
|
|
dptr_elt += 4; \
|
|
sptr_elt_al += 4; \
|
|
} \
|
|
sptr_elt = sptr_elt_al + ((unsigned int)sptr_elt & 0x3); \
|
|
} else { \
|
|
if (((xs & 0xf) == 0) && ((xd & 0xf) == 0)) { \
|
|
for ( ; i < (wi&(~0xf)) ; i+= 16) { \
|
|
const unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24; \
|
|
/*const unsigned int u32npm = (unsigned int)npm | ((unsigned int)npm)<<8 | ((unsigned int)npm)<<16 | ((unsigned int)npm)<<24;*/ \
|
|
OP(((unsigned int*)dptr_elt)[0], ((unsigned int*)sptr_elt)[0], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[1], ((unsigned int*)sptr_elt)[1], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[2], ((unsigned int*)sptr_elt)[2], u32pm, u32npm); \
|
|
OP(((unsigned int*)dptr_elt)[3], ((unsigned int*)sptr_elt)[3], u32pm, u32npm); \
|
|
dptr_elt += 16; \
|
|
sptr_elt += 16; \
|
|
} \
|
|
} \
|
|
if (((xs & 0x3) == 0) && ((xd & 0x3) == 0)) { \
|
|
for ( ; i < (wi&(~3)) ; i+= 4) { \
|
|
const unsigned int u32pm = (unsigned int)pm | ((unsigned int)pm)<<8 | ((unsigned int)pm)<<16 | ((unsigned int)pm)<<24; \
|
|
/*const unsigned int u32npm = (unsigned int)npm | ((unsigned int)npm)<<8 | ((unsigned int)npm)<<16 | ((unsigned int)npm)<<24;*/ \
|
|
OP(((unsigned int*)dptr_elt)[0], ((unsigned int*)sptr_elt)[0], u32pm, u32npm); \
|
|
dptr_elt += 4; \
|
|
sptr_elt += 4; \
|
|
} \
|
|
} \
|
|
} \
|
|
} \
|
|
for ( ; i < wi ; i++) { \
|
|
OP(*dptr_elt, *sptr_elt, pm, npm); \
|
|
dptr_elt ++; \
|
|
sptr_elt ++; \
|
|
} \
|
|
sptr_line -= sHRES; \
|
|
dptr_line -= sHRES; \
|
|
} \
|
|
}
|
|
|
|
|
|
#define BLIT_ALLDIR(NAME, OP) \
|
|
BLIT_FWD_FWD(NAME, OP) \
|
|
BLIT_FWD_BWD(NAME, OP) \
|
|
BLIT_BWD_FWD(NAME, OP) \
|
|
|
|
|
|
BLIT_ALLDIR(copy, COPY)
|
|
BLIT_ALLDIR(xor, XOR)
|
|
BLIT_ALLDIR(copy_pm, COPY_PM)
|
|
BLIT_ALLDIR(xor_pm, XOR_PM)
|
|
|