Romain Dolbeau c0fbdca5d3 preliminary burst support for DMA

2022-07-14 17:17:53 +02:00

..

ConsoleTest

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DeclROM

dCtlDevBase might be empty, but dCtlSlot is fine...

2022-07-14 09:33:15 +02:00

NuBusFPGAInit

checking in slot

2022-06-26 13:22:12 +02:00

.gitignore

LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650

2022-06-24 23:37:18 +02:00

74fct245.v

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blit.c

better patterns

2022-06-25 12:54:10 +02:00

blit.lds

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blit.sh

LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650

2022-06-24 23:37:18 +02:00

CG6.scala

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DepVideoEqu.a

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do

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fb_dma.py

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fb_video.py

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GenGoblinAccel.scala

LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650

2022-06-24 23:37:18 +02:00

goblin_accel.py

HW-acceel big pattern (not sure about alignment...), add basic Icon w/ ShowInitIcon

2022-06-25 08:51:17 +02:00

goblin_fb.py

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ldsdsupport.h

LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650

2022-06-24 23:37:18 +02:00

MakeFile

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nubus_arbiter.v

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nubus_cpld.ucf

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nubus_cpld.v

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nubus_cpu_wb.py

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nubus_fpga_V1_0_timings.xdc

fix messed up timing...

2022-07-14 08:54:23 +02:00

nubus_full_sampling.py

preliminary burst support for DMA

2022-07-14 17:17:53 +02:00

nubus_full.py

'back'port superslot to non-sampling NuBus interface

2022-07-14 09:34:29 +02:00

nubus_master_tst.py

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nubus_mem_wb.py

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nubus_memfifo_wb.py

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nubus_sampling.v

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nubus_stat.py

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nubus_to_fpga_export.py

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nubus_to_fpga_soc.py

preliminary burst support for DMA

2022-07-14 17:17:53 +02:00

nubus-to-ztex-io-signal.xdc

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nubus-to-ztex-pin-signal.xdc

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nubus.py

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nubus.v

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NuBusFPGADrvr.a

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NuBusFPGAPrimaryInit.a

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NuBusFPGASecondaryInit.a

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post_process_timings.sh

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rom.a

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sdram_init.py

preliminary burst support for DMA

2022-07-14 17:17:53 +02:00

slave_tb.sv

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sn74lvt125.v

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VexRiscv_FbAccel.v

LD/LDU/SD (64-bits, dual regs) support in Vex + accel ; ramdisk tested in Q650

2022-06-24 23:37:18 +02:00

ztex213_nubus.py

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