Fix bug in using nor flash storage without SD

Author: Landon Rodgers

CHANGELOG

@@ -1,3 +1,19 @@
+2020XXXX		XXXXX
+	- Fix for invalid CDROM READ TOC responses (Thanks Simon Gander)
+
+20191202		4.8.4
+	- Fix to prevent sending floppy geometry mode page when not configured as
+	a floppy (Thanks Landon Rodgers)
+	- Fix for VMS 5.5-2 Inquiry allocation lengths. Requires setting "vms" quirk
+	mode in the XML config (Thanks Landon Rodgers)
+
+20190610		4.8.3
+	- Improve XEBEC controller support
+	- Add Flexible Disk Drive Geometry SCSI MODE page
+	- Fix SD card hotswap bug
+	- Add scsi mode page 0 support
+	- Fix regression for EMU EMAX
+
 20180926		4.8.1
 	- Fix bug when writing with multiple SCSI devices on the chain
 

hardware/gerber-db25/scsi2sd-db25.GBO

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-G04 Creator: pcb 20140316 *
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hardware/gerber-db25/scsi2sd-db25.GBP

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hardware/gerber-db25/scsi2sd-db25.GBS

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hardware/gerber-db25/scsi2sd-db25.GML

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hardware/gerber-db25/scsi2sd-db25.GTP

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hardware/gerber-db25/scsi2sd-db25.GTS

@@ -1,717 +0,0 @@
-G04 start of page 11 for group -4063 idx -4063 *
-G04 Title: (unknown), componentmask *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Sun 31 Aug 2014 13:13:00 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions (mil): 3930.00 3937.00 *
-G04 PCB-Coordinate-Origin: lower left *
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hardware/gerber-db25/scsi2sd-db25.TXT

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hardware/gerber-pbook/scsi2sd-pbook.GBO

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hardware/gerber-pbook/scsi2sd-pbook.GBP

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hardware/gerber-pbook/scsi2sd-pbook.GBS

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-M02*

hardware/gerber-pbook/scsi2sd-pbook.GML

@@ -1,23 +0,0 @@
-G04 start of page 6 for group 4 idx 4 *
-G04 Title: (unknown), outline *
-G04 Creator: pcb 20110918 *
-G04 CreationDate: Wed 07 May 2014 09:59:53 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions: 275000 304000 *
-G04 PCB-Coordinate-Origin: lower left *
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-M02*

hardware/gerber-pbook/scsi2sd-pbook.GTP

@@ -1,470 +0,0 @@
-G04 start of page 15 for group -4015 idx -4015 *
-G04 Title: (unknown), toppaste *
-G04 Creator: pcb 20110918 *
-G04 CreationDate: Wed 07 May 2014 09:59:53 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions: 275000 304000 *
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hardware/gerber-pbook/scsi2sd-pbook.GTS

@@ -1,600 +0,0 @@
-G04 start of page 11 for group -4063 idx -4063 *
-G04 Title: (unknown), componentmask *
-G04 Creator: pcb 20110918 *
-G04 CreationDate: Wed 07 May 2014 09:59:53 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions: 275000 304000 *
-G04 PCB-Coordinate-Origin: lower left *
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hardware/gerber-pbook/scsi2sd-pbook.TXT

@@ -1,157 +0,0 @@
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hardware/gerber/scsi2sd.GBO

@@ -1,25 +0,0 @@
-G04 start of page 14 for group -4078 idx -4078 *
-G04 Title: (unknown), bottomsilk *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions (mil): 3930.00 3937.00 *
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-M02*

hardware/gerber/scsi2sd.GBP

@@ -1,13 +0,0 @@
-G04 start of page 16 for group -4014 idx -4014 *
-G04 Title: (unknown), bottompaste *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
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-M02*

hardware/gerber/scsi2sd.GBS

@@ -1,227 +0,0 @@
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-G04 Title: (unknown), soldermask *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
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hardware/gerber/scsi2sd.GM1

@@ -1,17 +0,0 @@
-G04 start of page 6 for group 4 idx 4 *
-G04 Title: (unknown), outline *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
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-M02*

hardware/gerber/scsi2sd.GTP

@@ -1,514 +0,0 @@
-G04 start of page 15 for group -4015 idx -4015 *
-G04 Title: (unknown), toppaste *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
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hardware/gerber/scsi2sd.GTS

@@ -1,740 +0,0 @@
-G04 start of page 11 for group -4063 idx -4063 *
-G04 Title: (unknown), componentmask *
-G04 Creator: pcb 20140316 *
-G04 CreationDate: Tue 09 Dec 2014 10:14:49 GMT UTC *
-G04 For: michael *
-G04 Format: Gerber/RS-274X *
-G04 PCB-Dimensions (mil): 3930.00 3937.00 *
-G04 PCB-Coordinate-Origin: lower left *
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-X014060Y016590
-X014060Y015590
-X014060Y014590
-T147
-X002200Y034320
-X004200Y034320
-X006200Y034320
-X008200Y034320
-T148
-X001200Y035320
-X009200Y035320
-T152
-X000900Y023120
-X000900Y005620
-X007500Y031830
-X007500Y001670
-X031800Y031830
-X031800Y001670
-X038400Y023120
-X038400Y005620
-T149
-X003200Y038320
-X007200Y038320
-M30

hardware/scsi2sd.bom

@@ -1,36 +0,0 @@
-# PcbBOM Version 1.0
-# Date: Tue 09 Dec 2014 09:51:33 GMT UTC
-# Author: Michael McMaster
-# Title: (unknown) - PCB BOM
-# Quantity, Description, Value, RefDes
-# --------------------------------------------
-1,"HEADER16_2","unknown",J8 
-1,"HEADER8_2","unknown",J11 
-1,"SOT23_MOSFET","unknown",Q1 
-3,"HEADER2_2","unknown",J10 J7 J3 
-1,"MOLEX8981","unknown",J1 
-1,"HEADER50_2_RA","unknown",J2 
-3,"SO14","unknown",U4 U3 U5 
-11,"cap_0402","100nF",C22 C9 C21 C11 C3 C19 C23 C10 C17 C28 C24 
-1,"ARMJTAG","unknown",J9 
-3,"SMD_SIMPLE-80-50","22?",R5 R4 R6 
-1,"fci-10118192-0001LF","unknown",J5 
-1,"FTSH-105-01-L-DV-K","unknown",J4 
-5,"SMD_SIMPLE-80-50","10uF",C2 C13 C12 C5 C6 
-4,"cap_0402","1uF",C8 C20 C26 C27 
-3,"diode-DO-214AA-SMB","unknown",D2 D1 D3 
-1,"SMD_SIMPLE-120-60","1.5A Hold",F1 
-2,"SIP10","unknown",R2 R1 
-1,"SMD_SIMPLE-120-60","500mA Hold",F2 
-1,"SMD_SIMPLE-80-50","1600",R3 
-2,"Header connector, DIP pin numbering","HEADER2_1",(unknown) (unknown) 
-1,"TQFP100_14_reflow","unknown",U1 
-2,"DPAK","unknown",U6 U2 
-1,"HEADER18_2","unknown",J12 
-1,"wurth-microsd","unknown",J6 
-1,"SMD_SIMPLE-80-50","56?",R7 
-1,"SMD_SIMPLE-80-50","154?",R9 
-1,"SMD_SIMPLE-80-50","120?",R8 
-2,"cap_0402","0.1uF",C16 C15 
-4,"SMD_SIMPLE-120-60","47uF",C14 C4 C7 C1 
-1,"SMD_DIODE-80-50","unknown",LED1 

software/SCSI2SD/src/cdrom.c

@@ -152,8 +152,8 @@ static void doReadTOC(int MSF, uint8_t track, uint16_t allocationLength)
 	if (track > 1)
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -162,21 +162,22 @@ static void doReadTOC(int MSF, uint8_t track, uint16_t allocationLength)
 		memcpy(scsiDev.data, SimpleTOC, len);
 
 		uint32_t capacity = getScsiCapacity(
+			scsiDev.target->device,
 			scsiDev.target->cfg->sdSectorStart,
-			scsiDev.target->liveCfg.bytesPerSector,
+			scsiDev.target->state.bytesPerSector,
 			scsiDev.target->cfg->scsiSectors);
 
 		// Replace start of leadout track
 		if (MSF)
 		{
-			LBA2MSF(capacity, scsiDev.data + 0x0E);
+			LBA2MSF(capacity, scsiDev.data + 0x10);
 		}
 		else
 		{
-			scsiDev.data[0x0E] = capacity >> 24;
-			scsiDev.data[0x0F] = capacity >> 16;
-			scsiDev.data[0x10] = capacity >> 8;
-			scsiDev.data[0x11] = capacity;
+			scsiDev.data[0x10] = capacity >> 24;
+			scsiDev.data[0x11] = capacity >> 16;
+			scsiDev.data[0x12] = capacity >> 8;
+			scsiDev.data[0x13] = capacity;
 		}
 
 		if (len > allocationLength)
@@ -213,8 +214,8 @@ static void doReadFullTOC(int convertBCD, uint8_t session, uint16_t allocationLe
 	if (session > 1)
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -297,8 +298,8 @@ int scsiCDRomCommand()
 			default:
 			{
 				scsiDev.status = CHECK_CONDITION;
-				scsiDev.target->sense.code = ILLEGAL_REQUEST;
-				scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+				scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+				scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 				scsiDev.phase = STATUS;
 			}
 		}

software/SCSI2SD/src/config.c

@@ -31,7 +31,7 @@
 
 #include <string.h>
 
-static const uint16_t FIRMWARE_VERSION = 0x0481;
+static const uint16_t FIRMWARE_VERSION = 0x0485;
 
 // 1 flash row
 static const uint8_t DEFAULT_CONFIG[256] =
@@ -58,20 +58,21 @@ enum USB_STATE
 };
 
 static uint8_t hidBuffer[USBHID_LEN];
+static uint8_t dbgHidBuffer[USBHID_LEN];
 
 static int usbInEpState;
 static int usbDebugEpState;
 static int usbReady;
 
-static void initBoardConfig(BoardConfig* config) {
+static void initBoardConfig(S2S_BoardConfig* config) {
 	memcpy(
 		config,
-		(
+		(const void*)(
 			CY_FLASH_BASE +
 			(CY_FLASH_SIZEOF_ARRAY * (size_t) SCSI_CONFIG_ARRAY) +
 			(CY_FLASH_SIZEOF_ROW * SCSI_CONFIG_BOARD_ROW)
 			),
-		sizeof(BoardConfig));
+		sizeof(S2S_BoardConfig));
 
 	if (memcmp(config->magic, "BCFG", 4)) {
 		// Set a default from the deprecated flags, or 0 if
@@ -83,7 +84,7 @@ static void initBoardConfig(BoardConfig* config) {
 	}
 }
 
-void configInit(BoardConfig* config)
+void configInit(S2S_BoardConfig* config)
 {
 	// The USB block will be powered by an internal 3.3V regulator.
 	// The PSoC must be operating between 4.6V and 5V for the regulator
@@ -93,7 +94,7 @@ void configInit(BoardConfig* config)
 	usbReady = 0; // We don't know if host is connected yet.
 
 	int invalid = 1;
-	uint8_t* rawConfig = getConfigByIndex(0);
+	uint8_t* rawConfig = (uint8_t*)getConfigByIndex(0);
 	int i;
 	for (i = 0; i < 64; ++i)
 	{
@@ -175,9 +176,9 @@ pingCommand()
 static void
 sdInfoCommand()
 {
-	uint8_t response[sizeof(sdDev.csd) + sizeof(sdDev.cid)];
-	memcpy(response, sdDev.csd, sizeof(sdDev.csd));
-	memcpy(response + sizeof(sdDev.csd), sdDev.cid, sizeof(sdDev.cid));
+	uint8_t response[sizeof(sdCard.csd) + sizeof(sdCard.cid)];
+	memcpy(response, sdCard.csd, sizeof(sdCard.csd));
+	memcpy(response + sizeof(sdCard.csd), sdCard.cid, sizeof(sdCard.cid));
 
 	hidPacket_send(response, sizeof(response));
 }
@@ -195,6 +196,100 @@ scsiTestCommand()
 	hidPacket_send(response, sizeof(response));
 }
 
+static void
+deviceListCommand()
+{
+    int deviceCount;
+    S2S_Device** devices = s2s_GetDevices(&deviceCount);
+    
+    uint8_t response[16] = // Make larger if there can be more than 2 devices
+    {
+        deviceCount
+    };
+    
+    int pos = 1;
+    
+    for (int i = 0; i < deviceCount; ++i)
+    {
+        response[pos++] = devices[i]->deviceType;
+        
+        uint32_t capacity = devices[i]->getCapacity(devices[i]);
+        response[pos++] = capacity >> 24;
+        response[pos++] = capacity >> 16;
+        response[pos++] = capacity >> 8;
+        response[pos++] = capacity;
+    }
+    
+    hidPacket_send(response, pos);
+}
+
+static void
+deviceEraseCommand(const uint8_t* cmd)
+{
+    int deviceCount;
+    S2S_Device** devices = s2s_GetDevices(&deviceCount);
+    
+    uint32_t sectorNum =
+        ((uint32_t)cmd[2]) << 24 |
+        ((uint32_t)cmd[3]) << 16 |
+        ((uint32_t)cmd[4]) << 8 |
+        ((uint32_t)cmd[5]);
+
+    uint32_t count =
+        ((uint32_t)cmd[6]) << 24 |
+        ((uint32_t)cmd[7]) << 16 |
+        ((uint32_t)cmd[8]) << 8 |
+        ((uint32_t)cmd[9]);
+
+    devices[cmd[1]]->erase(devices[cmd[1]], sectorNum, count);
+    
+	uint8_t response[] =
+	{
+		CONFIG_STATUS_GOOD
+	};
+    hidPacket_send(response, sizeof(response));
+}
+
+static void
+deviceWriteCommand(const uint8_t* cmd)
+{
+    int deviceCount;
+    S2S_Device** devices = s2s_GetDevices(&deviceCount);
+    
+    uint32_t sectorNum =
+        ((uint32_t)cmd[2]) << 24 |
+        ((uint32_t)cmd[3]) << 16 |
+        ((uint32_t)cmd[4]) << 8 |
+        ((uint32_t)cmd[5]);
+
+    devices[cmd[1]]->write(devices[cmd[1]], sectorNum, 1, &cmd[6]);
+    
+	uint8_t response[] =
+	{
+		CONFIG_STATUS_GOOD
+	};
+    hidPacket_send(response, sizeof(response));
+}
+
+
+static void
+deviceReadCommand(const uint8_t* cmd)
+{
+    int deviceCount;
+    S2S_Device** devices = s2s_GetDevices(&deviceCount);
+    
+    uint32_t sectorNum =
+        ((uint32_t)cmd[2]) << 24 |
+        ((uint32_t)cmd[3]) << 16 |
+        ((uint32_t)cmd[4]) << 8 |
+        ((uint32_t)cmd[5]);
+
+    uint8_t response[512];
+    devices[cmd[1]]->read(devices[cmd[1]], sectorNum, 1, &response[0]);
+    
+    hidPacket_send(&response[0], 512);
+}
+
 static void
 processCommand(const uint8_t* cmd, size_t cmdSize)
 {
@@ -224,6 +319,22 @@ processCommand(const uint8_t* cmd, size_t cmdSize)
 		scsiTestCommand();
 		break;
 
+    case S2S_CMD_DEV_LIST:
+        deviceListCommand();
+        break;
+
+    case S2S_CMD_DEV_ERASE:
+        deviceEraseCommand(cmd);
+        break;
+
+    case S2S_CMD_DEV_WRITE:
+        deviceWriteCommand(cmd);
+        break;
+
+    case S2S_CMD_DEV_READ:
+        deviceReadCommand(cmd);
+        break;
+        
 	case CONFIG_NONE: // invalid
 	default:
 		break;
@@ -246,6 +357,7 @@ void configPoll()
 
 	if (reset)
 	{
+        hidPacket_reset();
 		USBFS_EnableOutEP(USB_EP_OUT);
 		USBFS_EnableOutEP(USB_EP_COMMAND);
 		usbInEpState = usbDebugEpState = USB_IDLE;
@@ -253,24 +365,32 @@ void configPoll()
 
 	if(USBFS_GetEPState(USB_EP_OUT) == USBFS_OUT_BUFFER_FULL)
 	{
-		ledOn();
-
 		// The host sent us some data!
 		int byteCount = USBFS_GetEPCount(USB_EP_OUT);
 		USBFS_ReadOutEP(USB_EP_OUT, hidBuffer, sizeof(hidBuffer));
 		hidPacket_recv(hidBuffer, byteCount);
-
+        
+        size_t cmdSize;
+        if (hidPacket_peekPacket(&cmdSize) == NULL)
+        {
+            // Allow the host to send us another updated config.
+		    USBFS_EnableOutEP(USB_EP_OUT);
+        }
+    }
+    
+    if (hidPacket_getHIDBytesReady() == 0) // Nothing queued to send
+    {
 		size_t cmdSize;
 		const uint8_t* cmd = hidPacket_getPacket(&cmdSize);
 		if (cmd && (cmdSize > 0))
 		{
+            ledOn();
 			processCommand(cmd, cmdSize);
+            ledOff();
+            
+            // Allow the host to send us another updated config.
+		    USBFS_EnableOutEP(USB_EP_OUT);
 		}
-
-		// Allow the host to send us another updated config.
-		USBFS_EnableOutEP(USB_EP_OUT);
-
-		ledOff();
 	}
 
 	switch (usbInEpState)
@@ -308,10 +428,10 @@ void debugPoll()
 	{
 		// The host sent us some data!
 		int byteCount = USBFS_GetEPCount(USB_EP_COMMAND);
-		USBFS_ReadOutEP(USB_EP_COMMAND, (uint8 *)&hidBuffer, byteCount);
+		USBFS_ReadOutEP(USB_EP_COMMAND, (uint8 *)&dbgHidBuffer, byteCount);
 
 		if (byteCount >= 1 &&
-			hidBuffer[0] == 0x01)
+			dbgHidBuffer[0] == 0x01)
 		{
 			// Reboot command.
 			Bootloadable_1_Load();
@@ -325,36 +445,36 @@ void debugPoll()
 	switch (usbDebugEpState)
 	{
 	case USB_IDLE:
-		memcpy(&hidBuffer, &scsiDev.cdb, 12);
-		hidBuffer[12] = scsiDev.msgIn;
-		hidBuffer[13] = scsiDev.msgOut;
-		hidBuffer[14] = scsiDev.lastStatus;
-		hidBuffer[15] = scsiDev.lastSense;
-		hidBuffer[16] = scsiDev.phase;
-		hidBuffer[17] = SCSI_ReadFilt(SCSI_Filt_BSY);
-		hidBuffer[18] = SCSI_ReadFilt(SCSI_Filt_SEL);
-		hidBuffer[19] = SCSI_ReadFilt(SCSI_Filt_ATN);
-		hidBuffer[20] = SCSI_ReadFilt(SCSI_Filt_RST);
-		hidBuffer[21] = scsiDev.rstCount;
-		hidBuffer[22] = scsiDev.selCount;
-		hidBuffer[23] = scsiDev.msgCount;
-		hidBuffer[24] = scsiDev.cmdCount;
-		hidBuffer[25] = scsiDev.watchdogTick;
-		hidBuffer[26] = blockDev.state;
-		hidBuffer[27] = scsiDev.lastSenseASC >> 8;
-		hidBuffer[28] = scsiDev.lastSenseASC;
-		hidBuffer[29] = scsiReadDBxPins();
-		hidBuffer[30] = LastTrace;
+		memcpy(&dbgHidBuffer, &scsiDev.cdb, 12);
+		dbgHidBuffer[12] = scsiDev.msgIn;
+		dbgHidBuffer[13] = scsiDev.msgOut;
+		dbgHidBuffer[14] = scsiDev.lastStatus;
+		dbgHidBuffer[15] = scsiDev.lastSense;
+		dbgHidBuffer[16] = scsiDev.phase;
+		dbgHidBuffer[17] = SCSI_ReadFilt(SCSI_Filt_BSY);
+		dbgHidBuffer[18] = SCSI_ReadFilt(SCSI_Filt_SEL);
+		dbgHidBuffer[19] = SCSI_ReadFilt(SCSI_Filt_ATN);
+		dbgHidBuffer[20] = SCSI_ReadFilt(SCSI_Filt_RST);
+		dbgHidBuffer[21] = scsiDev.rstCount;
+		dbgHidBuffer[22] = scsiDev.selCount;
+		dbgHidBuffer[23] = scsiDev.msgCount;
+		dbgHidBuffer[24] = scsiDev.cmdCount;
+		dbgHidBuffer[25] = scsiDev.watchdogTick;
+		dbgHidBuffer[26] = 0; // OBSOLETE. Previously media state
+		dbgHidBuffer[27] = scsiDev.lastSenseASC >> 8;
+		dbgHidBuffer[28] = scsiDev.lastSenseASC;
+		dbgHidBuffer[29] = scsiReadDBxPins();
+		dbgHidBuffer[30] = LastTrace;
 
-		hidBuffer[58] = sdDev.capacity >> 24;
-		hidBuffer[59] = sdDev.capacity >> 16;
-		hidBuffer[60] = sdDev.capacity >> 8;
-		hidBuffer[61] = sdDev.capacity;
+		dbgHidBuffer[58] = sdCard.capacity >> 24;
+		dbgHidBuffer[59] = sdCard.capacity >> 16;
+		dbgHidBuffer[60] = sdCard.capacity >> 8;
+		dbgHidBuffer[61] = sdCard.capacity;
 
-		hidBuffer[62] = FIRMWARE_VERSION >> 8;
-		hidBuffer[63] = FIRMWARE_VERSION;
+		dbgHidBuffer[62] = FIRMWARE_VERSION >> 8;
+		dbgHidBuffer[63] = FIRMWARE_VERSION & 0xFF;
 
-		USBFS_LoadInEP(USB_EP_DEBUG, (uint8 *)&hidBuffer, sizeof(hidBuffer));
+		USBFS_LoadInEP(USB_EP_DEBUG, (uint8 *)&dbgHidBuffer, sizeof(dbgHidBuffer));
 		usbDebugEpState = USB_DATA_SENT;
 		break;
 
@@ -404,14 +524,14 @@ void configSave(int scsiId, uint16_t bytesPerSector)
 	int cfgIdx;
 	for (cfgIdx = 0; cfgIdx < MAX_SCSI_TARGETS; ++cfgIdx)
 	{
-		const TargetConfig* tgt = getConfigByIndex(cfgIdx);
+		const S2S_TargetCfg* tgt = getConfigByIndex(cfgIdx);
 		if ((tgt->scsiId & CONFIG_TARGET_ID_BITS) == scsiId)
 		{
 			// Save row to flash
 			// We only save the first row of the configuration
 			// this contains the parameters changeable by a MODE SELECT command
 			uint8_t rowData[CYDEV_FLS_ROW_SIZE];
-			TargetConfig* rowCfgData = (TargetConfig*)&rowData;
+			S2S_TargetCfg* rowCfgData = (S2S_TargetCfg*)&rowData;
 			memcpy(rowCfgData, tgt, sizeof(rowData));
 			rowCfgData->bytesPerSector = bytesPerSector;
 
@@ -426,12 +546,12 @@ void configSave(int scsiId, uint16_t bytesPerSector)
 }
 
 
-const TargetConfig* getConfigByIndex(int i)
+const S2S_TargetCfg* getConfigByIndex(int i)
 {
 	if (i <= 3)
 	{
 		size_t row = SCSI_CONFIG_0_ROW + (i * SCSI_CONFIG_ROWS);
-		return (const TargetConfig*)
+		return (const S2S_TargetCfg*)
 			(
 				CY_FLASH_BASE +
 				(CY_FLASH_SIZEOF_ARRAY * (size_t) SCSI_CONFIG_ARRAY) +
@@ -439,7 +559,7 @@ const TargetConfig* getConfigByIndex(int i)
 				);
 	} else {
 		size_t row = SCSI_CONFIG_4_ROW + ((i-4) * SCSI_CONFIG_ROWS);
-		return (const TargetConfig*)
+		return (const S2S_TargetCfg*)
 			(
 				CY_FLASH_BASE +
 				(CY_FLASH_SIZEOF_ARRAY * (size_t) SCSI_CONFIG_ARRAY) +
@@ -447,18 +567,3 @@ const TargetConfig* getConfigByIndex(int i)
 				);
 	}
 }
-
-const TargetConfig* getConfigById(int scsiId)
-{
-	int i;
-	for (i = 0; i < MAX_SCSI_TARGETS; ++i)
-	{
-		const TargetConfig* tgt = getConfigByIndex(i);
-		if ((tgt->scsiId & CONFIG_TARGET_ID_BITS) == scsiId)
-		{
-			return tgt;
-		}
-	}
-	return NULL;
-
-}

software/SCSI2SD/src/config.h

@@ -20,12 +20,11 @@
 #include "device.h"
 #include "scsi2sd.h"
 
-void configInit(BoardConfig* config);
+void configInit(S2S_BoardConfig* config);
 void debugInit(void);
 void configPoll(void);
 void configSave(int scsiId, uint16_t byesPerSector);
 
-const TargetConfig* getConfigByIndex(int index);
-const TargetConfig* getConfigById(int scsiId);
+const S2S_TargetCfg* getConfigByIndex(int index);
 
 #endif

software/SCSI2SD/src/diagnostic.c

@@ -50,8 +50,8 @@ void scsiSendDiagnostic()
 			// Nowhere to store this data!
 			// Shouldn't happen - our buffer should be many magnitudes larger
 			// than the required size for diagnostic parameters.
-			scsiDev.target->sense.code = ILLEGAL_REQUEST;
-			scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+			scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+			scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 			scsiDev.status = CHECK_CONDITION;
 			scsiDev.phase = STATUS;
 		}
@@ -95,14 +95,14 @@ void scsiReceiveDiagnostic()
 		// 64bit linear address, then convert back again.
 		uint64 fromByteAddr =
 			scsiByteAddress(
-				scsiDev.target->liveCfg.bytesPerSector,
+				scsiDev.target->state.bytesPerSector,
 				scsiDev.target->cfg->headsPerCylinder,
 				scsiDev.target->cfg->sectorsPerTrack,
 				suppliedFmt,
 				&scsiDev.data[6]);
 
 		scsiSaveByteAddress(
-			scsiDev.target->liveCfg.bytesPerSector,
+			scsiDev.target->state.bytesPerSector,
 			scsiDev.target->cfg->headsPerCylinder,
 			scsiDev.target->cfg->sectorsPerTrack,
 			translateFmt,
@@ -121,8 +121,8 @@ void scsiReceiveDiagnostic()
 	{
 		// error.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 
@@ -169,8 +169,8 @@ void scsiReadBuffer()
 	{
 		// error.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 }
@@ -208,10 +208,21 @@ void scsiWriteBuffer()
 	{
 		// error.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 }
 
+// XEBEC specific command. See 
+// http://www.bitsavers.org/pdf/westernDigital/WD100x/79-000004_WD1002-SHD_OEM_Manual_Aug1984.pdf
+// Section 4.3.14
+void scsiWriteSectorBuffer()
+{
+	scsiDev.dataLen = scsiDev.target->state.bytesPerSector;
+	scsiDev.phase = DATA_OUT;
+	scsiDev.postDataOutHook = doWriteBuffer;
+}
+
+
 

software/SCSI2SD/src/diagnostic.h

@@ -20,6 +20,7 @@
 void scsiSendDiagnostic(void);
 void scsiReceiveDiagnostic(void);
 void scsiWriteBuffer(void);
+void scsiWriteSectorBuffer(void);
 void scsiReadBuffer(void);
 
 #endif

software/SCSI2SD/src/disk.c

@@ -28,24 +28,8 @@
 #include <string.h>
 
 // Global
-BlockDevice blockDev;
 Transfer transfer;
 
-static int doSdInit()
-{
-	int result = 0;
-	if (blockDev.state & DISK_PRESENT)
-	{
-		result = sdInit();
-
-		if (result)
-		{
-			blockDev.state = blockDev.state | DISK_INITIALISED;
-		}
-	}
-	return result;
-}
-
 // Callback once all data has been read in the data out phase.
 static void doFormatUnitComplete(void)
 {
@@ -92,8 +76,8 @@ static void doFormatUnitHeader(void)
 	{
 		// Save the "MODE SELECT savable parameters"
 		configSave(
-			scsiDev.target->targetId,
-			scsiDev.target->liveCfg.bytesPerSector);
+			scsiDev.target->cfg->scsiId & CONFIG_TARGET_ID_BITS,
+			scsiDev.target->state.bytesPerSector);
 	}
 
 	if (IP)
@@ -123,8 +107,9 @@ static void doReadCapacity()
 	int pmi = scsiDev.cdb[8] & 1;
 
 	uint32_t capacity = getScsiCapacity(
+		scsiDev.target->device,
 		scsiDev.target->cfg->sdSectorStart,
-		scsiDev.target->liveCfg.bytesPerSector,
+		scsiDev.target->state.bytesPerSector,
 		scsiDev.target->cfg->scsiSectors);
 
 	if (!pmi && lba)
@@ -134,8 +119,8 @@ static void doReadCapacity()
 		// assume that delays are constant across each block. But the spec
 		// says we must return this error if pmi is specified incorrectly.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 	else if (capacity > 0)
@@ -147,7 +132,7 @@ static void doReadCapacity()
 		scsiDev.data[2] = highestBlock >> 8;
 		scsiDev.data[3] = highestBlock;
 
-		uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+		uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
 		scsiDev.data[4] = bytesPerSector >> 24;
 		scsiDev.data[5] = bytesPerSector >> 16;
 		scsiDev.data[6] = bytesPerSector >> 8;
@@ -158,8 +143,8 @@ static void doReadCapacity()
 	else
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = NOT_READY;
-		scsiDev.target->sense.asc = MEDIUM_NOT_PRESENT;
+		scsiDev.target->state.sense.code = NOT_READY;
+		scsiDev.target->state.sense.asc = MEDIUM_NOT_PRESENT;
 		scsiDev.phase = STATUS;
 	}
 }
@@ -172,19 +157,22 @@ static void doWrite(uint32 lba, uint32 blocks)
 		CyDelay(10);
 	}
 
-	uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+	uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
+	MEDIA_STATE* mediaState = &(scsiDev.target->device->mediaState);
 
-	if (unlikely(blockDev.state & DISK_WP) ||
-		unlikely(scsiDev.target->cfg->deviceType == CONFIG_OPTICAL))
+	if (unlikely(*mediaState & MEDIA_WP) ||
+		unlikely(scsiDev.target->cfg->deviceType == CONFIG_OPTICAL) ||
+        (scsiDev.target->cfg->storageDevice != CONFIG_STOREDEVICE_SD))
 
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = WRITE_PROTECTED;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = WRITE_PROTECTED;
 		scsiDev.phase = STATUS;
 	}
 	else if (unlikely(((uint64) lba) + blocks >
 		getScsiCapacity(
+			scsiDev.target->device,
 			scsiDev.target->cfg->sdSectorStart,
 			bytesPerSector,
 			scsiDev.target->cfg->scsiSectors
@@ -192,8 +180,8 @@ static void doWrite(uint32 lba, uint32 blocks)
 		))
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -230,14 +218,15 @@ static void doRead(uint32 lba, uint32 blocks)
 	}
 
 	uint32_t capacity = getScsiCapacity(
+        scsiDev.target->device,
 		scsiDev.target->cfg->sdSectorStart,
-		scsiDev.target->liveCfg.bytesPerSector,
+		scsiDev.target->state.bytesPerSector,
 		scsiDev.target->cfg->scsiSectors);
 	if (unlikely(((uint64) lba) + blocks > capacity))
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -248,7 +237,7 @@ static void doRead(uint32 lba, uint32 blocks)
 		scsiDev.phase = DATA_IN;
 		scsiDev.dataLen = 0; // No data yet
 
-		uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+		uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
 		uint32_t sdSectorPerSCSISector = SDSectorsPerSCSISector(bytesPerSector);
 		uint32_t sdSectors =
 			blocks * sdSectorPerSCSISector;
@@ -257,7 +246,8 @@ static void doRead(uint32 lba, uint32 blocks)
 				(sdSectors == 1) &&
 				!(scsiDev.boardCfg.flags & CONFIG_ENABLE_CACHE)
 			) ||
-			unlikely(((uint64) lba) + blocks == capacity)
+			unlikely(((uint64) lba) + blocks == capacity) ||
+            (scsiDev.target->cfg->storageDevice != CONFIG_STOREDEVICE_SD)
 			)
 		{
 			// We get errors on reading the last sector using a multi-sector
@@ -283,47 +273,54 @@ static void doSeek(uint32 lba)
 {
 	if (lba >=
 		getScsiCapacity(
+            scsiDev.target->device,
 			scsiDev.target->cfg->sdSectorStart,
-			scsiDev.target->liveCfg.bytesPerSector,
+			scsiDev.target->state.bytesPerSector,
 			scsiDev.target->cfg->scsiSectors)
 		)
 	{
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE;
 		scsiDev.phase = STATUS;
 	}
+	else
+	{
+		CyDelay(10);
+	}
 }
 
 static int doTestUnitReady()
 {
+	MEDIA_STATE* mediaState = &(scsiDev.target->device->mediaState);
+
 	int ready = 1;
-	if (likely(blockDev.state == (DISK_STARTED | DISK_PRESENT | DISK_INITIALISED)))
+	if (likely(*mediaState == (MEDIA_STARTED | MEDIA_PRESENT | MEDIA_INITIALISED)))
 	{
 		// nothing to do.
 	}
-	else if (unlikely(!(blockDev.state & DISK_STARTED)))
+	else if (unlikely(!(*mediaState & MEDIA_STARTED)))
 	{
 		ready = 0;
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = NOT_READY;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED;
+		scsiDev.target->state.sense.code = NOT_READY;
+		scsiDev.target->state.sense.asc = LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED;
 		scsiDev.phase = STATUS;
 	}
-	else if (unlikely(!(blockDev.state & DISK_PRESENT)))
+	else if (unlikely(!(*mediaState & MEDIA_PRESENT)))
 	{
 		ready = 0;
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = NOT_READY;
-		scsiDev.target->sense.asc = MEDIUM_NOT_PRESENT;
+		scsiDev.target->state.sense.code = NOT_READY;
+		scsiDev.target->state.sense.asc = MEDIUM_NOT_PRESENT;
 		scsiDev.phase = STATUS;
 	}
-	else if (unlikely(!(blockDev.state & DISK_INITIALISED)))
+	else if (unlikely(!(*mediaState & MEDIA_INITIALISED)))
 	{
 		ready = 0;
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = NOT_READY;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE;
+		scsiDev.target->state.sense.code = NOT_READY;
+		scsiDev.target->state.sense.asc = LOGICAL_UNIT_NOT_READY_CAUSE_NOT_REPORTABLE;
 		scsiDev.phase = STATUS;
 	}
 	return ready;
@@ -343,17 +340,21 @@ int scsiDiskCommand()
 		//int immed = scsiDev.cdb[1] & 1;
 		int start = scsiDev.cdb[4] & 1;
 
+		MEDIA_STATE* mediaState = &(scsiDev.target->device->mediaState);
 		if (start)
 		{
-			blockDev.state = blockDev.state | DISK_STARTED;
-			if (!(blockDev.state & DISK_INITIALISED))
+			*mediaState = *mediaState | MEDIA_STARTED;
+			if (!(*mediaState & MEDIA_INITIALISED))
 			{
-				doSdInit();
+				if (*mediaState & MEDIA_PRESENT)
+				{
+					*mediaState = *mediaState | MEDIA_INITIALISED;
+				}
 			}
 		}
 		else
 		{
-			blockDev.state &= ~DISK_STARTED;
+			*mediaState &= ~MEDIA_STARTED;
 		}
 	}
 	else if (unlikely(command == 0x00))
@@ -510,19 +511,29 @@ int scsiDiskCommand()
 			// TODO. This means they are supplying data to verify against.
 			// Technically we should probably grab the data and compare it.
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = ILLEGAL_REQUEST;
-			scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+			scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+			scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 			scsiDev.phase = STATUS;
 		}
 	}
 	else if (unlikely(command == 0x37))
 	{
 		// READ DEFECT DATA
-		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = NO_SENSE;
-		scsiDev.target->sense.asc = DEFECT_LIST_NOT_FOUND;
-		scsiDev.phase = STATUS;
+		uint32_t allocLength = (((uint16_t)scsiDev.cdb[7]) << 8) |
+			scsiDev.cdb[8];
 
+		scsiDev.data[0] = 0;
+		scsiDev.data[1] = scsiDev.cdb[1];
+		scsiDev.data[2] = 0;
+		scsiDev.data[3] = 0;
+		scsiDev.dataLen = 4;
+
+		if (scsiDev.dataLen > allocLength)
+		{
+			scsiDev.dataLen = allocLength;
+		}
+
+		scsiDev.phase = DATA_IN;
 	}
 	else
 	{
@@ -534,7 +545,7 @@ int scsiDiskCommand()
 
 void scsiDiskPoll()
 {
-	uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+	uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
 
 	if (scsiDev.phase == DATA_IN &&
 		transfer.currentBlock != transfer.blocks)
@@ -555,6 +566,9 @@ void scsiDiskPoll()
 		int i = 0;
 		int scsiActive = 0;
 		int sdActive = 0;
+        
+        int isSDDevice = scsiDev.target->cfg->storageDevice == CONFIG_STOREDEVICE_SD;
+        
 		while ((i < totalSDSectors) &&
 			likely(scsiDev.phase == DATA_IN) &&
 			likely(!scsiDev.resetFlag))
@@ -562,9 +576,15 @@ void scsiDiskPoll()
 			// Wait for the next DMA interrupt. It's beneficial to halt the
 			// processor to give the DMA controller more memory bandwidth to
 			// work with.
-			int scsiBusy = 1;
-			int sdBusy = 1;
-			while (scsiBusy && sdBusy)
+			int scsiBusy;
+			int sdBusy;
+			{
+				uint8_t intr = CyEnterCriticalSection();
+				scsiBusy = scsiDMABusy();
+				sdBusy = isSDDevice && sdDMABusy();
+				CyExitCriticalSection(intr);
+			}
+			while (scsiBusy && sdBusy && isSDDevice)
 			{
 				uint8_t intr = CyEnterCriticalSection();
 				scsiBusy = scsiDMABusy();
@@ -576,11 +596,23 @@ void scsiDiskPoll()
 				CyExitCriticalSection(intr);
 			}
 
-			if (sdActive && !sdBusy && sdReadSectorDMAPoll())
-			{
-				sdActive = 0;
-				prep++;
-			}
+            if (isSDDevice)
+            {
+			    if (sdActive && !sdBusy && sdReadSectorDMAPoll())
+			    {
+				    sdActive = 0;
+			    	prep++;
+			    }
+            }
+            else
+            {
+                S2S_Device* device = scsiDev.target->device;
+                if (sdActive && device->readAsyncPoll(device))
+			    {
+				    sdActive = 0;
+			    	prep++;
+			    }
+            }
 
 			// Usually SD is slower than the SCSI interface.
 			// Prioritise starting the read of the next sector over starting a
@@ -590,16 +622,26 @@ void scsiDiskPoll()
 				(prep - i < buffers) &&
 				(prep < totalSDSectors))
 			{
-				// Start an SD transfer if we have space.
-				if (transfer.multiBlock)
-				{
-					sdReadMultiSectorDMA(&scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)]);
-				}
-				else
-				{
-					sdReadSingleSectorDMA(sdLBA + prep, &scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)]);
-				}
-				sdActive = 1;
+                if (isSDDevice)
+                {
+				    // Start an SD transfer if we have space.
+				    if (transfer.multiBlock)
+				    {
+					    sdReadMultiSectorDMA(&scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)]);
+				    }
+				    else
+				    {
+					    sdReadSingleSectorDMA(sdLBA + prep, &scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)]);
+				    }
+				    sdActive = 1;
+                }
+                else
+                {
+                    // Sync Read onboard flash
+                    S2S_Device* device = scsiDev.target->device;
+                    device->readAsync(device, sdLBA + prep, 1, &scsiDev.data[SD_SECTOR_SIZE * (prep % buffers)]);
+                    sdActive = 1;
+                }
 			}
 
 			if (scsiActive && !scsiBusy && scsiWriteDMAPoll())
@@ -624,6 +666,15 @@ void scsiDiskPoll()
 			scsiDev.phase = STATUS;
 		}
 		scsiDiskReset();
+        
+        // Wait for current DMA transfer done then deselect (if reset encountered)
+        if (!isSDDevice)
+        {
+            S2S_Device* device = scsiDev.target->device;
+            while (!device->readAsyncPoll(device))
+		    {
+		    }
+        }
 	}
 	else if (scsiDev.phase == DATA_OUT &&
 		transfer.currentBlock != transfer.blocks)
@@ -785,8 +836,8 @@ void scsiDiskPoll()
 				(scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&
 				(scsiDev.compatMode >= COMPAT_SCSI2))
 			{
-				scsiDev.target->sense.code = ABORTED_COMMAND;
-				scsiDev.target->sense.asc = SCSI_PARITY_ERROR;
+				scsiDev.target->state.sense.code = ABORTED_COMMAND;
+				scsiDev.target->state.sense.asc = SCSI_PARITY_ERROR;
 				scsiDev.status = CHECK_CONDITION;;
 			}
 			scsiDev.phase = STATUS;
@@ -820,8 +871,6 @@ void scsiDiskInit()
 {
 	scsiDiskReset();
 
-	// Don't require the host to send us a START STOP UNIT command
-	blockDev.state = DISK_STARTED;
 	// WP pin not available for micro-sd
 	// TODO read card WP register
 	#if 0

software/SCSI2SD/src/disk.h

@@ -17,25 +17,12 @@
 #ifndef DISK_H
 #define DISK_H
 
-typedef enum
-{
-	DISK_STARTED = 1,     // Controlled via START STOP UNIT
-	DISK_PRESENT = 2,     // SD card is physically present
-	DISK_INITIALISED = 4, // SD card responded to init sequence
-	DISK_WP = 8           // Write-protect.
-} DISK_STATE;
-
 typedef enum
 {
 	TRANSFER_READ,
 	TRANSFER_WRITE
 } TRANSFER_DIR;
 
-typedef struct
-{
-	int state;
-} BlockDevice;
-
 typedef struct
 {
 	int multiBlock; // True if we're using a multi-block SPI transfer.
@@ -45,7 +32,6 @@ typedef struct
 	uint32 currentBlock;
 } Transfer;
 
-extern BlockDevice blockDev;
 extern Transfer transfer;
 
 void scsiDiskInit(void);

software/SCSI2SD/src/flash.c

@@ -0,0 +1,465 @@
+//    Copyright (C) 2013 Michael McMaster <michael@codesrc.com>
+//
+//    This file is part of SCSI2SD.
+//
+//    SCSI2SD is free software: you can redistribute it and/or modify
+//    it under the terms of the GNU General Public License as published by
+//    the Free Software Foundation, either version 3 of the License, or
+//    (at your option) any later version.
+//
+//    SCSI2SD is distributed in the hope that it will be useful,
+//    but WITHOUT ANY WARRANTY; without even the implied warranty of
+//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//    GNU General Public License for more details.
+//
+//    You should have received a copy of the GNU General Public License
+//    along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+
+#include "device.h"
+#include "flash.h"
+
+#include "config.h"
+#include "led.h"
+#include "time.h"
+
+typedef struct
+{
+    S2S_Device dev;
+
+    S2S_Target targets[MAX_SCSI_TARGETS];
+    
+    uint32_t capacity; // in 512 byte blocks
+    
+    // CFI info
+    uint8_t manufacturerID;
+    uint8_t deviceID[2];
+    
+
+} SpiFlash;
+
+static void spiFlash_earlyInit(S2S_Device* dev);
+static void spiFlash_init(S2S_Device* dev);
+static S2S_Target* spiFlash_getTargets(S2S_Device* dev, int* count);
+static uint32_t spiFlash_getCapacity(S2S_Device* dev);
+static int spiFlash_pollMediaChange(S2S_Device* dev);
+static void spiFlash_pollMediaBusy(S2S_Device* dev);
+static void spiFlash_erase(S2S_Device* dev, uint32_t sectorNumber, uint32_t count);
+static void spiFlash_read(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+static void spiFlash_readAsync(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+static int  spiFlash_readAsyncPoll(S2S_Device* dev);
+static void spiFlash_write(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, const uint8_t* buffer);
+
+SpiFlash spiFlash = {
+    {
+        spiFlash_earlyInit,
+        spiFlash_init,
+        spiFlash_getTargets,
+        spiFlash_getCapacity,
+        spiFlash_pollMediaChange,
+        spiFlash_pollMediaBusy,
+        spiFlash_erase,
+        spiFlash_read,
+        spiFlash_readAsync,
+        spiFlash_readAsyncPoll,
+        spiFlash_write,
+        0, // initial mediaState
+        CONFIG_STOREDEVICE_FLASH
+    }
+};
+
+S2S_Device* spiFlashDevice = &(spiFlash.dev);
+
+// Private DMA variables.
+static uint8 spiFlashDMARxChan = CY_DMA_INVALID_CHANNEL;
+static uint8 spiFlashDMATxChan = CY_DMA_INVALID_CHANNEL;
+static uint8_t spiFlashDmaRxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD };
+static uint8_t spiFlashDmaTxTd[2] = { CY_DMA_INVALID_TD, CY_DMA_INVALID_TD };
+
+// Source of dummy SPI bytes for DMA
+static uint8_t dummyBuffer[2]  __attribute__((aligned(4))) = {0xFF, 0xFF};
+// Dummy location for DMA to sink usless data to
+static uint8 discardBuffer[2] __attribute__((aligned(4)));
+
+
+volatile uint8_t spiFlashRxDMAComplete = 1;
+volatile uint8_t spiFlashTxDMAComplete = 1;
+
+CY_ISR_PROTO(spiFlashRxISR);
+CY_ISR(spiFlashRxISR)
+{
+	spiFlashRxDMAComplete = 1;
+}
+CY_ISR_PROTO(spiFlashTxISR);
+CY_ISR(spiFlashTxISR)
+{
+	spiFlashTxDMAComplete = 1;
+}
+
+// Read and write 1 byte.
+static uint8_t spiFlashByte(uint8_t value)
+{
+    NOR_SPI_WriteTxData(value);
+    while (!(NOR_SPI_ReadRxStatus() & NOR_SPI_STS_RX_FIFO_NOT_EMPTY)) {}
+    return NOR_SPI_ReadRxData();
+}
+
+static void spiFlash_earlyInit(S2S_Device* dev)
+{
+    SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    for (int i = 0; i < MAX_SCSI_TARGETS; ++i)
+    {
+        spiFlash->targets[i].device = dev;
+        
+        const S2S_TargetCfg* cfg = getConfigByIndex(i);
+        if (cfg->storageDevice == CONFIG_STOREDEVICE_FLASH)
+        {
+            spiFlash->targets[i].cfg = (S2S_TargetCfg*)cfg;
+        }
+        else
+        {
+            spiFlash->targets[i].cfg = NULL;
+        }
+    }
+
+    // Don't require the host to send us a START STOP UNIT command
+    spiFlash->dev.mediaState = MEDIA_STARTED | MEDIA_WP;
+    
+    // DMA stuff
+	spiFlashDMATxChan =
+		NOR_TX_DMA_DmaInitialize(
+			2, // Bytes per burst
+			1, // request per burst
+			HI16(CYDEV_SRAM_BASE),
+			HI16(CYDEV_PERIPH_BASE)
+			);
+
+	spiFlashDMARxChan =
+		NOR_RX_DMA_DmaInitialize(
+			1, // Bytes per burst
+			1, // request per burst
+			HI16(CYDEV_PERIPH_BASE),
+			HI16(CYDEV_SRAM_BASE)
+			);
+
+	CyDmaChDisable(spiFlashDMATxChan);
+	CyDmaChDisable(spiFlashDMARxChan);
+
+	NOR_RX_DMA_COMPLETE_StartEx(spiFlashRxISR);
+	NOR_TX_DMA_COMPLETE_StartEx(spiFlashTxISR);
+    
+    spiFlashDmaRxTd[0] = CyDmaTdAllocate();
+    spiFlashDmaRxTd[1] = CyDmaTdAllocate();
+    
+    spiFlashDmaTxTd[0] = CyDmaTdAllocate();
+    spiFlashDmaTxTd[1] = CyDmaTdAllocate();
+}
+
+static void spiFlash_init(S2S_Device* dev)
+{
+    SpiFlash* spiFlash = (SpiFlash*)dev;
+    spiFlash->capacity = 0;
+
+    nNOR_WP_Write(1); // We don't need write Protect
+    nNOR_CS_Write(1); // Deselect
+    
+    NOR_SPI_Start();
+    CyDelayUs(50); // tRPH is 35 uS. Wait a bit longer
+
+    // Mode-bit-reset (go back to normal from high performance mode)
+    nNOR_CS_Write(0); // Select
+    CyDelayCycles(4); // Tiny delay
+    spiFlashByte(0xFF);
+    nNOR_CS_Write(1); // Deselect
+    CyDelayCycles(4); // Tiny delay
+
+    // Software-reset
+    nNOR_CS_Write(0); // Select
+    CyDelayCycles(4); // Tiny delay
+    spiFlashByte(0xF0);
+    nNOR_CS_Write(1); // Deselect - reset is triggered on the deselect
+    CyDelayUs(50); // tRPH is 35 uS. Wait a bit longer
+
+    nNOR_CS_Write(0); // Select
+    // JEDEC standard "Read Identification" command
+    // returns CFI information
+    spiFlashByte(0x9F);
+    
+    // 1 byte manufacturer ID
+    spiFlash->manufacturerID = spiFlashByte(0xFF);
+    
+    // 2 bytes device ID
+    spiFlash->deviceID[0] = spiFlashByte(0xFF);
+    spiFlash->deviceID[1] = spiFlashByte(0xFF);
+
+    uint8_t bytesFollowing = spiFlashByte(0xFF);
+    
+    // Chances are this says 0, which means up to 512 bytes.
+    // But ignore it for now and just get the capacity.
+    for (int i = 0; i < 0x23; ++i)
+    {
+        spiFlashByte(0xFF);
+    }
+    
+    // Capacity is 2^n at offset 0x27
+    //spiFlash->capacity = (1 << spiFlashByte(0xFF)) / 512;
+    // Record value in 512-byte sectors.
+    spiFlash->capacity = 1 << (spiFlashByte(0xFF) - 9);
+    
+    if (spiFlash->capacity > 0)
+    {
+        spiFlash->dev.mediaState |= MEDIA_PRESENT | MEDIA_INITIALISED;
+    }
+
+    // Don't bother reading the rest. Deselecting will cancel the command.
+    
+    nNOR_CS_Write(1); // Deselect
+}
+
+static S2S_Target* spiFlash_getTargets(S2S_Device* dev, int* count)
+{
+    SpiFlash* spiFlash = (SpiFlash*)dev;
+    *count = MAX_SCSI_TARGETS;
+    return spiFlash->targets;
+}
+
+static uint32_t spiFlash_getCapacity(S2S_Device* dev)
+{
+    SpiFlash* spiFlash = (SpiFlash*)dev;
+    return spiFlash->capacity;
+}
+
+static int spiFlash_pollMediaChange(S2S_Device* dev)
+{
+    // Non-removable
+    return 0;
+}
+
+static void spiFlash_pollMediaBusy(S2S_Device* dev)
+{
+    // Non-removable
+}
+
+static void spiFlash_WaitForWIP()
+{
+    int inProgress = 1;
+    while (inProgress)
+    {
+        nNOR_CS_Write(0);
+        uint8_t status = spiFlashByte(0x05); // Read Status Register 1;
+        inProgress = status & 1;
+        nNOR_CS_Write(1);
+    }
+}
+
+static void spiFlash_erase(S2S_Device* dev, uint32_t sectorNumber, uint32_t count)
+{
+    // SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    nNOR_CS_Write(0); // Select
+
+    // Send the WREN - Write Enable command
+    spiFlashByte(0x06);
+
+    // We NEED to deselect the device now for writes to work
+    nNOR_CS_Write(1);
+    
+    // For now we assume 256kb sectors. This needs to be expanded to cater for 
+    // different sector sizes. We safely assume it will always be >= 512 bytes.
+    const uint32_t flashSectorSize = 256*1024;
+
+    // We don't have enough memory to do a read-modify-write cycle, so the caller
+    // had better line these up on sector boundaries.
+    for (uint32_t linearAddress = sectorNumber * 512;
+        linearAddress < (sectorNumber + count) * 512;
+        linearAddress += flashSectorSize)
+    {
+        nNOR_CS_Write(0);
+
+        spiFlashByte(0xDC);
+
+        // 4-byte address
+        spiFlashByte(linearAddress >> 24);
+        spiFlashByte(linearAddress >> 16);
+        spiFlashByte(linearAddress >> 8);
+        spiFlashByte(linearAddress);
+
+        // Initiate erase
+        nNOR_CS_Write(1);
+
+        spiFlash_WaitForWIP();
+    }
+
+    nNOR_CS_Write(0);
+
+    // Send the WREN - Write Disable command
+    spiFlashByte(0x04);
+    
+    nNOR_CS_Write(1); // Deselect
+}
+
+static void spiFlash_write(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, const uint8_t* buffer)
+{
+    // SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    nNOR_CS_Write(0); // Select
+
+    // Send the WREN - Write Enable command
+    spiFlashByte(0x06);
+
+    // We NEED to deselect the device now for writes to work
+    nNOR_CS_Write(1);
+    
+    // We're assuming here that the page size is 512 bytes or more.
+    for (unsigned int i = 0; i < count; ++i)
+    {
+        nNOR_CS_Write(0);
+
+        spiFlashByte(0x12);
+
+        uint32_t linearAddress = (sectorNumber + i) * 512;
+        spiFlashByte(linearAddress >> 24);
+        spiFlashByte(linearAddress >> 16);
+        spiFlashByte(linearAddress >> 8);
+        spiFlashByte(linearAddress);
+
+        for (int off = 0; off < 512; ++off)
+        {
+            spiFlashByte(buffer[i * 512 + off]);
+        }
+
+        // Initiate write 
+        nNOR_CS_Write(1);
+
+        spiFlash_WaitForWIP();
+    }
+
+    nNOR_CS_Write(0);
+
+    // Send the WREN - Write Disable command
+    spiFlashByte(0x04);
+    
+    nNOR_CS_Write(1); // Deselect
+}
+
+static void spiFlash_read(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
+{
+    // SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    nNOR_CS_Write(0); // Select
+    spiFlashByte(0x13);
+
+    uint32_t linearAddress = sectorNumber * 512;
+    spiFlashByte(linearAddress >> 24);
+    spiFlashByte(linearAddress >> 16);
+    spiFlashByte(linearAddress >> 8);
+    spiFlashByte(linearAddress);
+    
+    // There's no harm in reading -extra- data, so keep the FIFO
+    // one step ahead.
+    NOR_SPI_WriteTxData(0xFF);
+    NOR_SPI_WriteTxData(0xFF);
+    NOR_SPI_WriteTxData(0xFF);
+
+    for (int off = 0; off < count * 512; ++off)
+    {
+        NOR_SPI_WriteTxData(0xFF);
+
+        while (!(NOR_SPI_ReadRxStatus() & NOR_SPI_STS_RX_FIFO_NOT_EMPTY)) {}
+        buffer[off] = NOR_SPI_ReadRxData();
+    }
+
+    // Read and discard the extra bytes of data. It was only used to improve
+    // performance with a full FIFO.
+    for (int i = 0; i < 3; ++i)
+    {
+        while (!(NOR_SPI_ReadRxStatus() & NOR_SPI_STS_RX_FIFO_NOT_EMPTY)) {}
+        NOR_SPI_ReadRxData();
+    }
+    
+    nNOR_CS_Write(1); // Deselect
+}
+
+static void spiFlash_readAsync(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
+{
+    // SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    nNOR_CS_Write(0); // Select
+    spiFlashByte(0x13);
+
+    uint32_t linearAddress = sectorNumber * 512;
+    
+    // DMA implementation
+    // send is static as the address must remain consistent for the static
+	// DMA descriptors to work.
+	// Size must be divisible by 2 to suit 2-byte-burst TX DMA channel.
+	static uint8_t send[4] __attribute__((aligned(4)));
+    send[0] = linearAddress >> 24;
+    send[1] = linearAddress >> 16;
+    send[2] = linearAddress >> 8;
+    send[3] = linearAddress;
+    
+	// Prepare DMA transfer
+    CyDmaTdSetConfiguration(spiFlashDmaTxTd[0], sizeof(send), spiFlashDmaTxTd[1], TD_INC_SRC_ADR);
+    CyDmaTdSetAddress(spiFlashDmaTxTd[0], LO16((uint32)&send), LO16((uint32)NOR_SPI_TXDATA_PTR));
+        
+	CyDmaTdSetConfiguration(
+		spiFlashDmaTxTd[1],
+		count * 512,
+		CY_DMA_DISABLE_TD, // Disable the DMA channel when TD completes count bytes
+		NOR_TX_DMA__TD_TERMOUT_EN // Trigger interrupt when complete
+		);
+    CyDmaTdSetAddress(
+		spiFlashDmaTxTd[1],
+		LO16((uint32)&dummyBuffer),
+		LO16((uint32)NOR_SPI_TXDATA_PTR));
+    
+    CyDmaTdSetConfiguration(spiFlashDmaRxTd[0], sizeof(send), spiFlashDmaRxTd[1], 0);
+    CyDmaTdSetAddress(spiFlashDmaRxTd[0], LO16((uint32)NOR_SPI_RXDATA_PTR), LO16((uint32)&discardBuffer));
+        
+	CyDmaTdSetConfiguration(
+		spiFlashDmaRxTd[1],
+		count * 512,
+		CY_DMA_DISABLE_TD, // Disable the DMA channel when TD completes count bytes
+		TD_INC_DST_ADR |
+			NOR_RX_DMA__TD_TERMOUT_EN // Trigger interrupt when complete
+		);
+	
+	CyDmaTdSetAddress(
+		spiFlashDmaRxTd[1],
+		LO16((uint32)NOR_SPI_RXDATA_PTR),
+		LO16((uint32)buffer)
+		);
+
+	CyDmaChSetInitialTd(spiFlashDMATxChan, spiFlashDmaTxTd[0]);
+	CyDmaChSetInitialTd(spiFlashDMARxChan, spiFlashDmaRxTd[0]);
+
+	// The DMA controller is a bit trigger-happy. It will retain
+	// a drq request that was triggered while the channel was
+	// disabled.
+	CyDmaChSetRequest(spiFlashDMATxChan, CY_DMA_CPU_REQ);
+	CyDmaClearPendingDrq(spiFlashDMARxChan);
+
+	spiFlashTxDMAComplete = 0;
+	spiFlashRxDMAComplete = 0;
+
+	CyDmaChEnable(spiFlashDMARxChan, 1);
+	CyDmaChEnable(spiFlashDMATxChan, 1);
+}
+
+static int spiFlash_readAsyncPoll(S2S_Device* dev)
+{
+    // SpiFlash* spiFlash = (SpiFlash*)dev;
+
+    int allComplete = 0;
+    uint8_t intr = CyEnterCriticalSection();
+	allComplete = spiFlashTxDMAComplete && spiFlashRxDMAComplete;
+	CyExitCriticalSection(intr);
+
+    if (allComplete)
+    {
+        nNOR_CS_Write(1); // Deselect
+    }
+    
+    return allComplete;
+}

software/SCSI2SD/src/flash.h

@@ -0,0 +1,25 @@
+//	Copyright (C) 2020 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+#ifndef S2S_FLASH_H
+#define S2S_FLASH_H
+
+#include "storedevice.h"
+
+extern S2S_Device* spiFlashDevice;
+
+
+#endif

software/SCSI2SD/src/geometry.c

@@ -21,19 +21,22 @@
 #include <string.h>
 
 uint32_t getScsiCapacity(
+    S2S_Device* device,
 	uint32_t sdSectorStart,
 	uint16_t bytesPerSector,
 	uint32_t scsiSectors)
 {
+    uint32_t devCapacity = device->getCapacity(device);
+    
 	uint32_t capacity =
-		(sdDev.capacity - sdSectorStart) /
+		(devCapacity - sdSectorStart) /
 			SDSectorsPerSCSISector(bytesPerSector);
 
-	if (sdDev.capacity == 0)
+	if (devCapacity == 0)
 	{
 		capacity = 0;
 	}
-	else if (sdSectorStart >= sdDev.capacity)
+	else if (sdSectorStart >= devCapacity)
 	{
 		capacity = 0;
 	}

software/SCSI2SD/src/geometry.h

@@ -20,8 +20,9 @@
 #include "device.h"
 
 #include "config.h"
+#include "storedevice.h"
 #include "sd.h"
-
+    
 typedef enum
 {
 	ADDRESS_BLOCK = 0,
@@ -35,6 +36,7 @@ static inline int SDSectorsPerSCSISector(uint16_t bytesPerSector)
 }
 
 uint32_t getScsiCapacity(
+	S2S_Device* device,
 	uint32_t sdSectorStart,
 	uint16_t bytesPerSector,
 	uint32_t scsiSectors);

software/SCSI2SD/src/hidpacket.c

@@ -45,6 +45,12 @@ txReset()
 	tx.offset = 0;
 }
 
+void hidPacket_reset()
+{
+    rxReset();
+    txReset();
+}
+
 void hidPacket_recv(const uint8_t* bytes, size_t len)
 {
 	if (len < 2)
@@ -94,6 +100,21 @@ void hidPacket_recv(const uint8_t* bytes, size_t len)
 	}
 }
 
+const uint8_t*
+hidPacket_peekPacket(size_t* len)
+{
+	if (rx.state == COMPLETE)
+	{
+		*len = rx.offset;
+		return rx.buffer;
+	}
+	else
+	{
+		*len = 0;
+		return NULL;
+	}
+}
+
 const uint8_t*
 hidPacket_getPacket(size_t* len)
 {
@@ -125,6 +146,17 @@ void hidPacket_send(const uint8_t* bytes, size_t len)
 	}
 }
 
+int
+hidPacket_getHIDBytesReady()
+{
+	if ((tx.state != PARTIAL) || (tx.offset <= 0))
+	{
+		return 0;
+	}
+
+	return 1;
+}
+
 const uint8_t*
 hidPacket_getHIDBytes(uint8_t* hidBuffer)
 {

software/SCSI2SD/src/inquiry.c

@@ -1,4 +1,5 @@
 //	Copyright (C) 2013 Michael McMaster <michael@codesrc.com>
+//     Copyright (C) 2019 Landon Rodgers  <g.landon.rodgers@gmail.com>
 //
 //	This file is part of SCSI2SD.
 //
@@ -90,7 +91,7 @@ static const uint8 AscImpOperatingDefinition[] =
 'S','C','S','I','-','2'
 };
 
-static void useCustomVPD(const TargetConfig* cfg, int pageCode)
+static void useCustomVPD(const S2S_TargetCfg* cfg, int pageCode)
 {
 	int cfgIdx = 0;
 	int found = 0;
@@ -115,8 +116,8 @@ static void useCustomVPD(const TargetConfig* cfg, int pageCode)
 	{
 		// error.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 }
@@ -140,13 +141,13 @@ void scsiInquiry()
 		{
 			// error.
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = ILLEGAL_REQUEST;
-			scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+			scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+			scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 			scsiDev.phase = STATUS;
 		}
 		else
 		{
-			const TargetConfig* config = scsiDev.target->cfg;
+			const S2S_TargetCfg* config = scsiDev.target->cfg;
 			memcpy(scsiDev.data, StandardResponse, sizeof(StandardResponse));
 			scsiDev.data[1] = scsiDev.target->cfg->deviceTypeModifier;
 
@@ -157,6 +158,7 @@ void scsiInquiry()
 			memcpy(&scsiDev.data[8], config->vendor, sizeof(config->vendor));
 			memcpy(&scsiDev.data[16], config->prodId, sizeof(config->prodId));
 			memcpy(&scsiDev.data[32], config->revision, sizeof(config->revision));
+
 			scsiDev.dataLen = sizeof(StandardResponse) +
 				sizeof(config->vendor) +
 				sizeof(config->prodId) +
@@ -178,7 +180,7 @@ void scsiInquiry()
 	{
 		memcpy(scsiDev.data, UnitSerialNumber, sizeof(UnitSerialNumber));
 		scsiDev.dataLen = sizeof(UnitSerialNumber);
-		const TargetConfig* config = scsiDev.target->cfg;
+		const S2S_TargetCfg* config = scsiDev.target->cfg;
 		memcpy(&scsiDev.data[4], config->serial, sizeof(config->serial));
 		scsiDev.phase = DATA_IN;
 	}
@@ -204,14 +206,21 @@ void scsiInquiry()
 	{
 		// error.
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 
 
 	if (scsiDev.phase == DATA_IN)
 	{
+		// VAX workaround
+		if (allocationLength == 255 &&
+			(scsiDev.target->cfg->quirks & CONFIG_QUIRKS_VMS))
+		{
+			allocationLength = 254;
+		}
+
 		// "real" hard drives send back exactly allocationLenth bytes, padded
 		// with zeroes. This only seems to happen for Inquiry responses, and not
 		// other commands that also supply an allocation length such as Mode Sense or
@@ -229,20 +238,19 @@ void scsiInquiry()
 		scsiDev.dataLen = allocationLength;
 
 		// Set the device type as needed.
+		scsiDev.data[0] = getDeviceTypeQualifier();
+
 		switch (scsiDev.target->cfg->deviceType)
 		{
 		case CONFIG_OPTICAL:
-			scsiDev.data[0] = 0x05; // device type
 			scsiDev.data[1] |= 0x80; // Removable bit.
 			break;
 
 		case CONFIG_SEQUENTIAL:
-			scsiDev.data[0] = 0x01; // device type
 			scsiDev.data[1] |= 0x80; // Removable bit.
 			break;
 			
 		case CONFIG_MO:
-			scsiDev.data[0] = 0x07; // device type
 			scsiDev.data[1] |= 0x80; // Removable bit.
 			break;
 
@@ -254,6 +262,7 @@ void scsiInquiry()
 			// Accept defaults for a fixed disk.
 			break;
 		}
+
 	}
 
 	// Set the first byte to indicate LUN presence.
@@ -263,3 +272,31 @@ void scsiInquiry()
 	}
 }
 
+uint8_t getDeviceTypeQualifier()
+{
+	// Set the device type as needed.
+	switch (scsiDev.target->cfg->deviceType)
+	{
+	case CONFIG_OPTICAL:
+		return 0x05;
+		break;
+
+	case CONFIG_SEQUENTIAL:
+		return 0x01;
+		break;
+
+	case CONFIG_MO:
+		return 0x07;
+		break;
+
+	case CONFIG_FLOPPY_14MB:
+	case CONFIG_REMOVEABLE:
+		return 0;
+		break;
+
+	default:
+		// Accept defaults for a fixed disk.
+		return 0;
+	}
+}
+

software/SCSI2SD/src/inquiry.h

@@ -19,4 +19,6 @@
 
 void scsiInquiry(void);
 
+uint8_t getDeviceTypeQualifier(void);
+
 #endif

software/SCSI2SD/src/main.c

@@ -18,17 +18,19 @@
 #include "scsi.h"
 #include "scsiPhy.h"
 #include "config.h"
+#include "debug.h"
 #include "disk.h"
 #include "led.h"
 #include "time.h"
 #include "trace.h"
 
-const char* Notice = "Copyright (C) 2015-2018 Michael McMaster <michael@codesrc.com>";
+const char* Notice = "Copyright (C) 2015-2021 Michael McMaster <michael@codesrc.com>";
 
 int main()
 {
 	timeInit();
 	ledInit();
+	s2s_deviceEarlyInit();
 	traceInit();
 
 	// Enable global interrupts.
@@ -60,8 +62,7 @@ int main()
 		++delaySeconds;
 	}
 
-	uint32_t lastSDPoll = getTime_ms();
-	sdCheckPresent();
+    s2s_deviceInit();
 
 	while (1)
 	{
@@ -74,12 +75,16 @@ int main()
 
 		if (unlikely(scsiDev.phase == BUS_FREE))
 		{
-			if (unlikely(elapsedTime_ms(lastSDPoll) > 200))
+			if (s2s_pollMediaChange())
 			{
-				lastSDPoll = getTime_ms();
-				sdCheckPresent();
+				scsiPhyConfig();
+				scsiInit();
 			}
-			else
+            
+            // If USB is connected we could be busy transferring data
+            // Note: The same flag is used for the config USB interface and
+            // therefore SPI flash writes
+			else if (!isDebugEnabled())
 			{
 				// Wait for our 1ms timer to save some power.
 				// There's an interrupt on the SEL signal to ensure we respond
@@ -94,10 +99,11 @@ int main()
 				CyExitCriticalSection(interruptState);
 			}
 		}
-		else if (scsiDev.phase >= 0)
+		else if ((scsiDev.phase >= 0) &&
+			scsiDev.target &&
+			(scsiDev.target->device->mediaState & MEDIA_PRESENT))
 		{
-			// don't waste time scanning SD cards while we're doing disk IO
-			lastSDPoll = getTime_ms();
+			scsiDev.target->device->pollMediaBusy(scsiDev.target->device);
 		}
 	}
 	return 0;

software/SCSI2SD/src/mode.c

@@ -1,5 +1,6 @@
 //	Copyright (C) 2013 Michael McMaster <michael@codesrc.com>
 //  Copyright (C) 2014 Doug Brown <doug@downtowndougbrown.com>
+//  Copyright (C) 2019 Landon Rodgers <g.landon.rodgers@gmail.com>
 //
 //	This file is part of SCSI2SD.
 //
@@ -19,9 +20,26 @@
 #include "scsi.h"
 #include "mode.h"
 #include "disk.h"
+#include "inquiry.h"
 
 #include <string.h>
 
+// "Vendor" defined page which was included by Seagate, and required for
+// Amiga 500 using DKB SpitFire controller.
+static const uint8 OperatingPage[] =
+{
+0x00, // Page code
+0x02, // Page length
+
+// Bit 4 = unit attension (0 = on, 1 = off).
+// Bit 7 = usage bit, EEPROM life exceeded warning = 1.
+0x80, 
+
+// Bit 7 = reserved.
+// Bits 0:6: Device type qualifier, as per Inquiry data
+0x00
+};
+
 static const uint8 ReadWriteErrorRecoveryPage[] =
 {
 0x01, // Page code
@@ -120,6 +138,35 @@ static const uint8 RigidDiskDriveGeometry[] =
 0x00, 0x00 // Reserved
 };
 
+static const uint8 FlexibleDiskDriveGeometry[] =
+{
+0x05, // Page code
+0x1E, // Page length
+0x01, 0xF4, // Transfer Rate (500kbits)
+0x01, // heads
+18, // sectors per track
+0x20,0x00, // bytes per sector
+0x00, 80, // Cylinders
+0x00, 0x80, // Write-precomp
+0x00, 0x80, // reduced current,
+0x00, 0x00, // Drive step rate
+0x00, // pulse width
+0x00, 0x00, // Head settle delay
+0x00, // motor on delay
+0x00,  // motor off delay
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00,
+0x00
+};
+
 static const uint8 RigidDiskDriveGeometry_SCSI1[] =
 {
 0x04, // Page code
@@ -194,7 +241,7 @@ static void pageIn(int pc, int dataIdx, const uint8* pageData, int pageLen)
 	}
 }
 
-static int useCustomPages(const TargetConfig* cfg, int pc, int pageCode, int* idx)
+static int useCustomPages(const S2S_TargetCfg* cfg, int pc, int pageCode, int* idx)
 {
 	int found = 0;
 	int cfgIdx = 0;
@@ -222,7 +269,12 @@ static int useCustomPages(const TargetConfig* cfg, int pc, int pageCode, int* id
 }
 
 static void doModeSense(
-	int sixByteCmd, int dbd, int pc, int pageCode, int allocLength)
+	S2S_Device* dev,
+	int sixByteCmd,
+	int dbd,
+	int pc,
+	int pageCode,
+	int allocLength)
 {
 	////////////// Mode Parameter Header
 	////////////////////////////////////
@@ -241,14 +293,14 @@ static void doModeSense(
 		mediumType = 0; // We should support various floppy types here!
 		// Contains cache bits (0) and a Write-Protect bit.
 		deviceSpecificParam =
-			(blockDev.state & DISK_WP) ? 0x80 : 0;
+			(dev->mediaState & MEDIA_WP) ? 0x80 : 0;
 		density = 0; // reserved for direct access
 		break;
 
 	case CONFIG_FLOPPY_14MB:
 		mediumType = 0x1E; // 90mm/3.5"
 		deviceSpecificParam =
-			(blockDev.state & DISK_WP) ? 0x80 : 0;
+			(dev->mediaState & MEDIA_WP) ? 0x80 : 0;
 		density = 0; // reserved for direct access
 		break;
 
@@ -261,14 +313,14 @@ static void doModeSense(
 	case CONFIG_SEQUENTIAL:
 		mediumType = 0; // reserved
 		deviceSpecificParam =
-			(blockDev.state & DISK_WP) ? 0x80 : 0;
-		density = 0x13; // DAT Data Storage, X3B5/88-185A 
+			(dev->mediaState & MEDIA_WP) ? 0x80 : 0;
+		density = 0x13; // DAT Data Storage, X3B5/88-185A
 		break;
 
 	case CONFIG_MO:
-        mediumType = 0x03; // Optical reversible or erasable medium
+		mediumType = 0x03; // Optical reversible or erasable medium
 		deviceSpecificParam =
-			(blockDev.state & DISK_WP) ? 0x80 : 0;
+			(dev->mediaState & MEDIA_WP) ? 0x80 : 0;
 		density = 0x00; // Default
 		break;
 
@@ -321,7 +373,7 @@ static void doModeSense(
 		scsiDev.data[idx++] = 0; // reserved
 
 		// Block length
-		uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+		uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
 		scsiDev.data[idx++] = bytesPerSector >> 16;
 		scsiDev.data[idx++] = bytesPerSector >> 8;
 		scsiDev.data[idx++] = bytesPerSector & 0xFF;
@@ -376,7 +428,7 @@ static void doModeSense(
 			scsiDev.data[idx+11] = sectorsPerTrack & 0xFF;
 
 			// Fill out the configured bytes-per-sector
-			uint32_t bytesPerSector = scsiDev.target->liveCfg.bytesPerSector;
+			uint32_t bytesPerSector = scsiDev.target->state.bytesPerSector;
 			scsiDev.data[idx+12] = bytesPerSector >> 8;
 			scsiDev.data[idx+13] = bytesPerSector & 0xFF;
 		}
@@ -410,8 +462,9 @@ static void doModeSense(
 			uint32 sector;
 			LBA2CHS(
 				getScsiCapacity(
+					scsiDev.target->device,
 					scsiDev.target->cfg->sdSectorStart,
-					scsiDev.target->liveCfg.bytesPerSector,
+					scsiDev.target->state.bytesPerSector,
 					scsiDev.target->cfg->scsiSectors),
 				&cyl,
 				&head,
@@ -439,6 +492,14 @@ static void doModeSense(
 		}
 	}
 
+	if ((pageCode == 0x05 || pageCode == 0x3F) &&
+		(scsiDev.target->cfg->deviceType == CONFIG_FLOPPY_14MB))
+	{
+		pageFound = 1;
+		pageIn(pc, idx, FlexibleDiskDriveGeometry, sizeof(FlexibleDiskDriveGeometry));
+		idx += sizeof(FlexibleDiskDriveGeometry);
+	}
+
 	// DON'T output the following pages for SCSI1 hosts. They get upset when
 	// we have more data to send than the allocation length provided.
 	// (ie. Try not to output any more pages below this comment)
@@ -482,13 +543,28 @@ static void doModeSense(
 		idx += sizeof(AppleVendorPage);
 	}
 
+	// SCSI 2 standard says page 0 is always last.
+	if (pageCode == 0x00 || pageCode == 0x3F)
+	{
+		pageFound = 1;
+		pageIn(pc, idx, OperatingPage, sizeof(OperatingPage));
+
+		// Note inverted logic for the flag.
+		scsiDev.data[idx+2] =
+			(scsiDev.boardCfg.flags & CONFIG_ENABLE_UNIT_ATTENTION) ? 0x80 : 0x90;
+
+		scsiDev.data[idx+3] = getDeviceTypeQualifier();
+
+		idx += sizeof(OperatingPage);
+	}
+
 	if (!pageFound)
 	{
 		// Unknown Page Code
 		pageFound = 0;
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -547,10 +623,10 @@ static void doModeSelect(void)
 			}
 			else
 			{
-				scsiDev.target->liveCfg.bytesPerSector = bytesPerSector;
+				scsiDev.target->state.bytesPerSector = bytesPerSector;
 				if (bytesPerSector != scsiDev.target->cfg->bytesPerSector)
 				{
-					configSave(scsiDev.target->targetId, bytesPerSector);
+					configSave(scsiDev.target->cfg->scsiId & CONFIG_TARGET_ID_BITS, bytesPerSector);
 				}
 			}
 		}
@@ -580,10 +656,10 @@ static void doModeSelect(void)
 					goto bad;
 				}
 
-				scsiDev.target->liveCfg.bytesPerSector = bytesPerSector;
+				scsiDev.target->state.bytesPerSector = bytesPerSector;
 				if (scsiDev.cdb[1] & 1) // SP Save Pages flag
 				{
-					configSave(scsiDev.target->targetId, bytesPerSector);
+					configSave(scsiDev.target->cfg->scsiId & CONFIG_TARGET_ID_BITS, bytesPerSector);
 				}
 			}
 			break;
@@ -599,14 +675,14 @@ static void doModeSelect(void)
 	goto out;
 bad:
 	scsiDev.status = CHECK_CONDITION;
-	scsiDev.target->sense.code = ILLEGAL_REQUEST;
-	scsiDev.target->sense.asc = INVALID_FIELD_IN_PARAMETER_LIST;
+	scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+	scsiDev.target->state.sense.asc = INVALID_FIELD_IN_PARAMETER_LIST;
 
 out:
 	scsiDev.phase = STATUS;
 }
 
-int scsiModeCommand()
+int scsiModeCommand(S2S_Device* dev)
 {
 	int commandHandled = 1;
 
@@ -626,7 +702,7 @@ int scsiModeCommand()
 		// SCSI1 standard: (CCS X3T9.2/86-52)
 		// "An Allocation Length of zero indicates that no MODE SENSE data shall
 		// be transferred. This condition shall not be considered as an error."
-		doModeSense(1, dbd, pc, pageCode, allocLength);
+		doModeSense(dev, 1, dbd, pc, pageCode, allocLength);
 	}
 	else if (command == 0x5A)
 	{
@@ -637,7 +713,7 @@ int scsiModeCommand()
 		int allocLength =
 			(((uint16) scsiDev.cdb[7]) << 8) +
 			scsiDev.cdb[8];
-		doModeSense(0, dbd, pc, pageCode, allocLength);
+		doModeSense(dev, 0, dbd, pc, pageCode, allocLength);
 	}
 	else if (command == 0x15)
 	{

software/SCSI2SD/src/mode.h

@@ -17,6 +17,6 @@
 #ifndef MODE_H
 #define MODE_H
 
-int scsiModeCommand(void);
+int scsiModeCommand(S2S_Device* dev);
 
 #endif

software/SCSI2SD/src/scsi.c

@@ -132,8 +132,8 @@ static void enter_Status(uint8 status)
 	scsiDev.phase = STATUS;
 
 	scsiDev.lastStatus = scsiDev.status;
-	scsiDev.lastSense = scsiDev.target->sense.code;
-	scsiDev.lastSenseASC = scsiDev.target->sense.asc;
+	scsiDev.lastSense = scsiDev.target->state.sense.code;
+	scsiDev.lastSenseASC = scsiDev.target->state.sense.asc;
 }
 
 void process_Status()
@@ -192,7 +192,7 @@ void process_Status()
 	}
 	else if (scsiDev.target->cfg->quirks == CONFIG_QUIRKS_OMTI)
 	{
-		scsiDev.status |= (scsiDev.target->targetId & 0x03) << 5;
+		scsiDev.status |= (scsiDev.target->cfg->scsiId & 0x03) << 5;
 		scsiWriteByte(scsiDev.status);
 	}
 	else
@@ -201,8 +201,8 @@ void process_Status()
 	}
 
 	scsiDev.lastStatus = scsiDev.status;
-	scsiDev.lastSense = scsiDev.target->sense.code;
-	scsiDev.lastSenseASC = scsiDev.target->sense.asc;
+	scsiDev.lastSense = scsiDev.target->state.sense.code;
+	scsiDev.lastSenseASC = scsiDev.target->state.sense.asc;
 
 
 	// Command Complete occurs AFTER a valid status has been
@@ -262,8 +262,8 @@ static void process_DataOut()
 			(scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&
 			(scsiDev.compatMode >= COMPAT_SCSI2))
 		{
-			scsiDev.target->sense.code = ABORTED_COMMAND;
-			scsiDev.target->sense.asc = SCSI_PARITY_ERROR;
+			scsiDev.target->state.sense.code = ABORTED_COMMAND;
+			scsiDev.target->state.sense.asc = SCSI_PARITY_ERROR;
 			enter_Status(CHECK_CONDITION);
 		}
 	}
@@ -318,15 +318,11 @@ static void process_Command()
 	// http://bitsavers.trailing-edge.com/pdf/xebec/104524C_S1410Man_Aug83.pdf
 	if ((scsiDev.lun > 0) && (scsiDev.boardCfg.flags & CONFIG_MAP_LUNS_TO_IDS))
 	{
-		int tgtIndex;
-		for (tgtIndex = 0; tgtIndex < MAX_SCSI_TARGETS; ++tgtIndex)
+		S2S_Target* lunTarget = s2s_DeviceFindByScsiId(scsiDev.lun);
+		if (lunTarget != NULL)
 		{
-			if (scsiDev.targets[tgtIndex].targetId == scsiDev.lun)
-			{
-				scsiDev.target = &scsiDev.targets[tgtIndex];
-				scsiDev.lun = 0;
-				break;
-			}
+			scsiDev.target = lunTarget;
+			scsiDev.lun = 0;
 		}
 	}
 
@@ -334,7 +330,7 @@ static void process_Command()
 	control = scsiDev.cdb[scsiDev.cdbLen - 1];
 
 	scsiDev.cmdCount++;
-	const TargetConfig* cfg = scsiDev.target->cfg;
+	const S2S_TargetCfg* cfg = scsiDev.target->cfg;
 
 	if (unlikely(scsiDev.resetFlag))
 	{
@@ -347,8 +343,8 @@ static void process_Command()
 		(scsiDev.boardCfg.flags & CONFIG_ENABLE_PARITY) &&
 		(scsiDev.compatMode >= COMPAT_SCSI2))
 	{
-		scsiDev.target->sense.code = ABORTED_COMMAND;
-		scsiDev.target->sense.asc = SCSI_PARITY_ERROR;
+		scsiDev.target->state.sense.code = ABORTED_COMMAND;
+		scsiDev.target->state.sense.asc = SCSI_PARITY_ERROR;
 		enter_Status(CHECK_CONDITION);
 	}
 	else if ((control & 0x02) && ((control & 0x01) == 0) &&
@@ -356,8 +352,8 @@ static void process_Command()
 		likely(scsiDev.target->cfg->quirks != CONFIG_QUIRKS_XEBEC))
 	{
 		// FLAG set without LINK flag.
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		enter_Status(CHECK_CONDITION);
 	}
 	else if (command == 0x12)
@@ -373,11 +369,11 @@ static void process_Command()
 		{
 			// Completely non-standard
 			allocLength = 4;
-			if (scsiDev.target->sense.code == NO_SENSE)
+			if (scsiDev.target->state.sense.code == NO_SENSE)
 				scsiDev.data[0] = 0;
-			else if (scsiDev.target->sense.code == ILLEGAL_REQUEST)
+			else if (scsiDev.target->state.sense.code == ILLEGAL_REQUEST)
 				scsiDev.data[0] = 0x20; // Illegal command
-			else if (scsiDev.target->sense.code == NOT_READY)
+			else if (scsiDev.target->state.sense.code == NOT_READY)
 				scsiDev.data[0] = 0x04; // Drive not ready
 			else
 				scsiDev.data[0] = 0x11;  // Uncorrectable data error
@@ -395,7 +391,7 @@ static void process_Command()
 
 		memset(scsiDev.data, 0, 256); // Max possible alloc length
 		scsiDev.data[0] = 0xF0;
-		scsiDev.data[2] = scsiDev.target->sense.code & 0x0F;
+		scsiDev.data[2] = scsiDev.target->state.sense.code & 0x0F;
 
 		scsiDev.data[3] = transfer.lba >> 24;
 		scsiDev.data[4] = transfer.lba >> 16;
@@ -404,45 +400,45 @@ static void process_Command()
 
 		// Additional bytes if there are errors to report
 		scsiDev.data[7] = 10; // additional length
-		scsiDev.data[12] = scsiDev.target->sense.asc >> 8;
-		scsiDev.data[13] = scsiDev.target->sense.asc;
+		scsiDev.data[12] = scsiDev.target->state.sense.asc >> 8;
+		scsiDev.data[13] = scsiDev.target->state.sense.asc;
 		}
 
 		// Silently truncate results. SCSI-2 spec 8.2.14.
 		enter_DataIn(allocLength);
 
 		// This is a good time to clear out old sense information.
-		scsiDev.target->sense.code = NO_SENSE;
-		scsiDev.target->sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
+		scsiDev.target->state.sense.code = NO_SENSE;
+		scsiDev.target->state.sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
 	}
 	// Some old SCSI drivers do NOT properly support
 	// unitAttention. eg. the Mac Plus would trigger a SCSI reset
 	// on receiving the unit attention response on boot, thus
 	// triggering another unit attention condition.
-	else if (scsiDev.target->unitAttention &&
+	else if (scsiDev.target->state.unitAttention &&
 		(scsiDev.boardCfg.flags & CONFIG_ENABLE_UNIT_ATTENTION))
 	{
-		scsiDev.target->sense.code = UNIT_ATTENTION;
-		scsiDev.target->sense.asc = scsiDev.target->unitAttention;
+		scsiDev.target->state.sense.code = UNIT_ATTENTION;
+		scsiDev.target->state.sense.asc = scsiDev.target->state.unitAttention;
 
 		// If initiator doesn't do REQUEST SENSE for the next command, then
 		// data is lost.
-		scsiDev.target->unitAttention = 0;
+		scsiDev.target->state.unitAttention = 0;
 
 		enter_Status(CHECK_CONDITION);
 	}
 	else if (scsiDev.lun)
 	{
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_NOT_SUPPORTED;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = LOGICAL_UNIT_NOT_SUPPORTED;
 		enter_Status(CHECK_CONDITION);
 	}
 	else if (command == 0x17 || command == 0x16)
 	{
 		doReserveRelease();
 	}
-	else if ((scsiDev.target->reservedId >= 0) &&
-		(scsiDev.target->reservedId != scsiDev.initiatorId))
+	else if ((scsiDev.target->state.reservedId >= 0) &&
+		(scsiDev.target->state.reservedId != scsiDev.initiatorId))
 	{
 		enter_Status(CONFLICT);
 	}
@@ -472,14 +468,19 @@ static void process_Command()
 	{
 		scsiWriteBuffer();
 	}
+	else if (command == 0x0f &&
+		scsiDev.target->cfg->quirks == CONFIG_QUIRKS_XEBEC)
+	{
+		scsiWriteSectorBuffer();
+	}
 	else if (command == 0x3C)
 	{
 		scsiReadBuffer();
 	}
-	else if (!scsiModeCommand() && !scsiVendorCommand())
+	else if (!scsiModeCommand(scsiDev.target->device) && !scsiVendorCommand())
 	{
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_COMMAND_OPERATION_CODE;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_COMMAND_OPERATION_CODE;
 		enter_Status(CHECK_CONDITION);
 	}
 
@@ -499,25 +500,25 @@ static void doReserveRelease()
 	uint8 command = scsiDev.cdb[0];
 
 	int canRelease =
-		(!thirdPty && (scsiDev.initiatorId == scsiDev.target->reservedId)) ||
+		(!thirdPty && (scsiDev.initiatorId == scsiDev.target->state.reservedId)) ||
 			(thirdPty &&
-				(scsiDev.target->reserverId == scsiDev.initiatorId) &&
-				(scsiDev.target->reservedId == thirdPtyId)
+				(scsiDev.target->state.reserverId == scsiDev.initiatorId) &&
+				(scsiDev.target->state.reservedId == thirdPtyId)
 			);
 
 	if (extentReservation)
 	{
 		// Not supported.
-		scsiDev.target->sense.code = ILLEGAL_REQUEST;
-		scsiDev.target->sense.asc = INVALID_FIELD_IN_CDB;
+		scsiDev.target->state.sense.code = ILLEGAL_REQUEST;
+		scsiDev.target->state.sense.asc = INVALID_FIELD_IN_CDB;
 		enter_Status(CHECK_CONDITION);
 	}
 	else if (command == 0x17) // release
 	{
-		if ((scsiDev.target->reservedId < 0) || canRelease)
+		if ((scsiDev.target->state.reservedId < 0) || canRelease)
 		{
-			scsiDev.target->reservedId = -1;
-			scsiDev.target->reserverId = -1;
+			scsiDev.target->state.reservedId = -1;
+			scsiDev.target->state.reserverId = -1;
 		}
 		else
 		{
@@ -526,16 +527,16 @@ static void doReserveRelease()
 	}
 	else // assume reserve.
 	{
-		if ((scsiDev.target->reservedId < 0) || canRelease)
+		if ((scsiDev.target->state.reservedId < 0) || canRelease)
 		{
-			scsiDev.target->reserverId = scsiDev.initiatorId;
+			scsiDev.target->state.reserverId = scsiDev.initiatorId;
 			if (thirdPty)
 			{
-				scsiDev.target->reservedId = thirdPtyId;
+				scsiDev.target->state.reservedId = thirdPtyId;
 			}
 			else
 			{
-				scsiDev.target->reservedId = scsiDev.initiatorId;
+				scsiDev.target->state.reservedId = scsiDev.initiatorId;
 			}
 		}
 		else
@@ -564,14 +565,14 @@ static void scsiReset()
 
 	if (scsiDev.target)
 	{
-		if (scsiDev.target->unitAttention != POWER_ON_RESET)
+		if (scsiDev.target->state.unitAttention != POWER_ON_RESET)
 		{
-			scsiDev.target->unitAttention = SCSI_BUS_RESET;
+			scsiDev.target->state.unitAttention = SCSI_BUS_RESET;
 		}
-		scsiDev.target->reservedId = -1;
-		scsiDev.target->reserverId = -1;
-		scsiDev.target->sense.code = NO_SENSE;
-		scsiDev.target->sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
+		scsiDev.target->state.reservedId = -1;
+		scsiDev.target->state.reserverId = -1;
+		scsiDev.target->state.sense.code = NO_SENSE;
+		scsiDev.target->state.sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
 	}
 	scsiDev.target = NULL;
 	scsiDiskReset();
@@ -586,7 +587,16 @@ static void scsiReset()
 	// in which case TERMPWR cannot be supplied, and reset will ALWAYS
 	// be true. Therefore, the sleep here must be slow to avoid slowing
 	// USB comms
-	CyDelay(1); // 1ms.
+	// Also, need to exit quickly for XEBEC controllers which may
+	// assert RST immediately before pulsing a SEL.
+	uint32_t rstTimerBegin = getTime_ms();
+	while (SCSI_ReadFilt(SCSI_Filt_RST))
+	{
+		if (elapsedTime_ms(rstTimerBegin) >= 1)
+		{
+			break;
+		}
+	}
 }
 
 static void enter_SelectionPhase()
@@ -652,16 +662,19 @@ static void process_SelectionPhase()
 	int goodParity = (Lookup_OddParity[mask] == SCSI_ReadPin(SCSI_In_DBP));
 	int atnFlag = SCSI_ReadFilt(SCSI_Filt_ATN);
 
-	int tgtIndex;
-	TargetState* target = NULL;
-	for (tgtIndex = 0; tgtIndex < MAX_SCSI_TARGETS; ++tgtIndex)
+	S2S_Target* target = NULL;
+	for (int testIdx = 0; testIdx < 8; ++testIdx)
 	{
-		if (mask & (1 << scsiDev.targets[tgtIndex].targetId))
-		{
-			target = &scsiDev.targets[tgtIndex];
-			break;
-		}
+        if (mask & (1 << testIdx))
+        {
+		    target = s2s_DeviceFindByScsiId(testIdx);
+		    if (target)
+		    {
+			    break;
+		    }
+        }
 	}
+
 	sel &= (selLatchCfg && scsiDev.selFlag) || SCSI_ReadFilt(SCSI_Filt_SEL);
 	bsy |= SCSI_ReadFilt(SCSI_Filt_BSY);
 #ifdef SCSI_In_IO
@@ -695,7 +708,7 @@ static void process_SelectionPhase()
 		// controllers don't generate parity bits.
 		if (!scsiDev.atnFlag)
 		{
-			target->unitAttention = 0;
+			target->state.unitAttention = 0;
 			scsiDev.compatMode = COMPAT_SCSI1;
 		}
 		else if (!(scsiDev.boardCfg.flags & CONFIG_ENABLE_SCSI2))
@@ -715,7 +728,7 @@ static void process_SelectionPhase()
 		// SCSI1/SASI initiators may not set their own ID.
 		{
 			int i;
-			uint8_t initiatorMask = mask ^ (1 << target->targetId);
+			uint8_t initiatorMask = mask ^ (1 << (target->cfg->scsiId & CONFIG_TARGET_ID_BITS));
 			scsiDev.initiatorId = -1;
 			for (i = 0; i < 8; ++i)
 			{
@@ -735,6 +748,13 @@ static void process_SelectionPhase()
 			{
 				break;
 			}
+			else if (elapsedTime_ms(selTimerBegin) >= 10 &&
+				scsiDev.target->cfg->quirks == CONFIG_QUIRKS_XEBEC)
+			{
+				// XEBEC hosts may not bother releasing SEL at all until
+				// just before the command ends.
+				break;
+			}
 			else if (elapsedTime_ms(selTimerBegin) >= 250)
 			{
 				SCSI_ClearPin(SCSI_Out_BSY);
@@ -795,11 +815,11 @@ static void process_MessageOut()
 
 		scsiDiskReset();
 
-		scsiDev.target->unitAttention = SCSI_BUS_RESET;
+		scsiDev.target->state.unitAttention = SCSI_BUS_RESET;
 
 		// ANY initiator can reset the reservation state via this message.
-		scsiDev.target->reservedId = -1;
-		scsiDev.target->reserverId = -1;
+		scsiDev.target->state.reservedId = -1;
+		scsiDev.target->state.reserverId = -1;
 		enter_BusFree();
 	}
 	else if (scsiDev.msgOut == 0x05)
@@ -1034,27 +1054,28 @@ void scsiInit()
 	scsiDev.target = NULL;
 	scsiDev.compatMode = COMPAT_UNKNOWN;
 
-	int i;
-	for (i = 0; i < MAX_SCSI_TARGETS; ++i)
+	int deviceCount;
+	S2S_Device** allDevices = s2s_GetDevices(&deviceCount);
+	for (int devIdx = 0; devIdx < deviceCount; ++devIdx)
 	{
-		const TargetConfig* cfg = getConfigByIndex(i);
-		if (cfg && (cfg->scsiId & CONFIG_TARGET_ENABLED))
-		{
-			scsiDev.targets[i].targetId = cfg->scsiId & CONFIG_TARGET_ID_BITS;
-			scsiDev.targets[i].cfg = cfg;
+		int targetCount;
+		S2S_Target* targets = allDevices[devIdx]->getTargets(allDevices[devIdx], &targetCount);
 
-			scsiDev.targets[i].liveCfg.bytesPerSector = cfg->bytesPerSector;
-		}
-		else
+		for (int i = 0; i < targetCount; ++i)
 		{
-			scsiDev.targets[i].targetId = 0xff;
-			scsiDev.targets[i].cfg = NULL;
+			S2S_TargetState* state = &(targets[i].state);
+
+			state->reservedId = -1;
+			state->reserverId = -1;
+			state->unitAttention = POWER_ON_RESET;
+			state->sense.code = NO_SENSE;
+			state->sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
+
+            if (targets[i].cfg)
+            {
+			    state->bytesPerSector = targets[i].cfg->bytesPerSector;
+            }
 		}
-		scsiDev.targets[i].reservedId = -1;
-		scsiDev.targets[i].reserverId = -1;
-		scsiDev.targets[i].unitAttention = POWER_ON_RESET;
-		scsiDev.targets[i].sense.code = NO_SENSE;
-		scsiDev.targets[i].sense.asc = NO_ADDITIONAL_SENSE_INFORMATION;
 	}
 }
 
@@ -1090,7 +1111,7 @@ int scsiReconnect()
 	{
 		// Arbitrate.
 		ledOn();
-		uint8_t scsiIdMask = 1 << scsiDev.target->targetId;
+		uint8_t scsiIdMask = 1 << (scsiDev.target->cfg->scsiId & CONFIG_TARGET_ID_BITS);
 		SCSI_Out_Bits_Write(scsiIdMask);
 		SCSI_Out_Ctl_Write(1); // Write bits manually.
 		SCSI_SetPin(SCSI_Out_BSY);

software/SCSI2SD/src/scsi.h

@@ -17,8 +17,8 @@
 #ifndef SCSI_H
 #define SCSI_H
 
+#include "storedevice.h"
 #include "geometry.h"
-#include "sense.h"
 
 typedef enum
 {
@@ -73,37 +73,10 @@ typedef enum
 #define MAX_SECTOR_SIZE 8192
 #define MIN_SECTOR_SIZE 64
 
-// Shadow parameters, possibly not saved to flash yet.
-// Set via Mode Select
 typedef struct
 {
-	uint16_t bytesPerSector;
-} LiveCfg;
-
-typedef struct
-{
-	uint8_t targetId;
-
-	const TargetConfig* cfg;
-
-	LiveCfg liveCfg;
-
-	ScsiSense sense;
-
-	uint16 unitAttention; // Set to the sense qualifier key to be returned.
-
-	// Only let the reserved initiator talk to us.
-	// A 3rd party may be sending the RESERVE/RELEASE commands
-	int reservedId; // 0 -> 7 if reserved. -1 if not reserved.
-	int reserverId; // 0 -> 7 if reserved. -1 if not reserved.
-} TargetState;
-
-typedef struct
-{
-	TargetState targets[MAX_SCSI_TARGETS];
-	TargetState* target;
-	BoardConfig boardCfg;
-
+	S2S_Target* target;
+    S2S_BoardConfig boardCfg;
 
 	// Set to true (1) if the ATN flag was set, and we need to
 	// enter the MESSAGE_OUT phase.

software/SCSI2SD/src/scsiPhy.c

@@ -309,11 +309,11 @@ doTxSingleDMA(const uint8* data, uint32 count)
 }
 
 void
-scsiWriteDMA(const uint8* data, uint32 count)
+scsiWriteDMA(const uint8_t* data, uint32 count)
 {
 	dmaSentCount = 0;
 	dmaTotalCount = count;
-	dmaBuffer = data;
+	dmaBuffer = (uint8_t*) data;
 
 	uint32_t singleCount = (count > MAX_DMA_BYTES) ? MAX_DMA_BYTES : count;
 	doTxSingleDMA(data, singleCount);
@@ -401,7 +401,8 @@ void scsiEnterPhase(int phase)
 		{
 			// XEBEC S1410 manual (old SASI controller) gives 10uSec delay
 			// between phase bits and REQ.
-			CyDelayUs(10);
+			// EMU EMAX needs 100uS ! 10uS is not enough.
+			CyDelayUs(100);
 		}
 	}
 }
@@ -457,7 +458,6 @@ void scsiPhyReset()
 	#ifdef SCSI_Out_ACK
 	SCSI_ClearPin(SCSI_Out_ACK);
 	#endif
-	SCSI_ClearPin(SCSI_Out_RST);
 	SCSI_ClearPin(SCSI_Out_SEL);
 	SCSI_ClearPin(SCSI_Out_REQ);
 

software/SCSI2SD/src/scsiPhy.h

@@ -37,8 +37,8 @@ typedef enum
 #define scsiPhyTx(val) CY_SET_REG8(scsiTarget_datapath__F0_REG, (val))
 #define scsiPhyRx() CY_GET_REG8(scsiTarget_datapath__F1_REG)
 
-#ifdef TERM_EN_0
-	// V5.1 is active-low
+#if defined(TERM_EN_0) || defined(BOOTLDR_0)
+	// V5.1 and v5.5 is active-low
 #define SCSI_SetPin(pin) \
 	CyPins_ClearPin((pin));
 

software/SCSI2SD/src/sd.c

@@ -28,8 +28,38 @@
 
 #include <string.h>
 
+static void sd_earlyInit(S2S_Device* dev);
+static void sd_deviceInit(S2S_Device* dev);
+static S2S_Target* sd_getTargets(S2S_Device* dev, int* count);
+static uint32_t sd_getCapacity(S2S_Device* dev);
+static int sd_pollMediaChange(S2S_Device* dev);
+static void sd_pollMediaBusy(S2S_Device* dev);
+static void sd_erase(S2S_Device* dev, uint32_t sectorNumber, uint32_t count);
+static void sd_read(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+static void sd_readAsync(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+static int  sd_readAsyncPoll(S2S_Device* dev);
+static void sd_write(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, const uint8_t* buffer);
+
+
 // Global
-SdDevice sdDev;
+SdCard sdCard = {
+	{
+		sd_earlyInit,
+        sd_deviceInit,
+		sd_getTargets,
+		sd_getCapacity,
+		sd_pollMediaChange,
+		sd_pollMediaBusy,
+        sd_erase,
+        sd_read,
+        sd_readAsync,
+        sd_readAsyncPoll,
+        sd_write,
+        0, // initial mediaState
+        CONFIG_STOREDEVICE_SD
+	}
+};
+S2S_Device* sdDevice = &(sdCard.dev);
 
 enum SD_CMD_STATE { CMD_STATE_IDLE, CMD_STATE_READ, CMD_STATE_WRITE };
 static int sdCmdState = CMD_STATE_IDLE;
@@ -268,7 +298,7 @@ sdReadMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)
 {
 	uint32_t tmpNextLBA = sdLBA + sdSectors;
 
-	if (!sdDev.ccs)
+	if (!sdCard.ccs)
 	{
 		sdLBA = sdLBA * SD_SECTOR_SIZE;
 		tmpNextLBA = tmpNextLBA * SD_SECTOR_SIZE;
@@ -291,8 +321,8 @@ sdReadMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)
 			sdClearStatus();
 
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+			scsiDev.target->state.sense.code = HARDWARE_ERROR;
+			scsiDev.target->state.sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
 			scsiDev.phase = STATUS;
 		}
 		else
@@ -330,8 +360,8 @@ dmaReadSector(uint8_t* outputBuffer)
 		if (scsiDev.status != CHECK_CONDITION)
 		{
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
+			scsiDev.target->state.sense.code = HARDWARE_ERROR;
+			scsiDev.target->state.sense.asc = UNRECOVERED_READ_ERROR;
 			scsiDev.phase = STATUS;
 		}
 		sdClearStatus();
@@ -399,7 +429,7 @@ void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer)
 	sdPreCmdState(CMD_STATE_READ);
 
 	uint8 v;
-	if (!sdDev.ccs)
+	if (!sdCard.ccs)
 	{
 		lba = lba * SD_SECTOR_SIZE;
 	}
@@ -410,8 +440,8 @@ void sdReadSingleSectorDMA(uint32_t lba, uint8_t* outputBuffer)
 		sdClearStatus();
 
 		scsiDev.status = CHECK_CONDITION;
-		scsiDev.target->sense.code = HARDWARE_ERROR;
-		scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+		scsiDev.target->state.sense.code = HARDWARE_ERROR;
+		scsiDev.target->state.sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
 		scsiDev.phase = STATUS;
 	}
 	else
@@ -446,8 +476,8 @@ static void sdCompleteRead()
 		if (unlikely(r1b) && (scsiDev.phase == DATA_IN))
 		{
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = UNRECOVERED_READ_ERROR;
+			scsiDev.target->state.sense.code = HARDWARE_ERROR;
+			scsiDev.target->state.sense.asc = UNRECOVERED_READ_ERROR;
 			scsiDev.phase = STATUS;
 		}
 	}
@@ -544,8 +574,8 @@ sdWriteSectorDMAPoll()
 				sdClearStatus();
 
 				scsiDev.status = CHECK_CONDITION;
-				scsiDev.target->sense.code = HARDWARE_ERROR;
-				scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+				scsiDev.target->state.sense.code = HARDWARE_ERROR;
+				scsiDev.target->state.sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
 				scsiDev.phase = STATUS;
 			}
 			else
@@ -599,8 +629,8 @@ static void sdCompleteWrite()
 		{
 			sdClearStatus();
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = WRITE_ERROR_AUTO_REALLOCATION_FAILED;
+			scsiDev.target->state.sense.code = HARDWARE_ERROR;
+			scsiDev.target->state.sense.asc = WRITE_ERROR_AUTO_REALLOCATION_FAILED;
 			scsiDev.phase = STATUS;
 		}
 	}
@@ -627,7 +657,7 @@ static int sendIfCond()
 		if (status == SD_R1_IDLE)
 		{
 			// Version 2 card.
-			sdDev.version = 2;
+			sdCard.version = 2;
 			// Read 32bit response. Should contain the same bytes that
 			// we sent in the command parameter.
 			sdSpiByte(0xFF);
@@ -639,7 +669,7 @@ static int sendIfCond()
 		else if (status & SD_R1_ILLEGAL)
 		{
 			// Version 1 card.
-			sdDev.version = 1;
+			sdCard.version = 1;
 			sdClearStatus();
 			break;
 		}
@@ -688,7 +718,7 @@ static int sdReadOCR()
 			buf[i] = sdSpiByte(0xFF);
 		}
 
-		sdDev.ccs = (buf[0] & 0x40) ? 1 : 0;
+		sdCard.ccs = (buf[0] & 0x40) ? 1 : 0;
 		complete = (buf[0] & 0x80);
 
 	} while (!status &&
@@ -715,7 +745,7 @@ static void sdReadCID()
 
 	for (i = 0; i < 16; ++i)
 	{
-		sdDev.cid[i] = sdSpiByte(0xFF);
+		sdCard.cid[i] = sdSpiByte(0xFF);
 	}
 	sdSpiByte(0xFF); // CRC
 	sdSpiByte(0xFF); // CRC
@@ -738,30 +768,30 @@ static int sdReadCSD()
 
 	for (i = 0; i < 16; ++i)
 	{
-		sdDev.csd[i] = sdSpiByte(0xFF);
+		sdCard.csd[i] = sdSpiByte(0xFF);
 	}
 	sdSpiByte(0xFF); // CRC
 	sdSpiByte(0xFF); // CRC
 
-	if ((sdDev.csd[0] >> 6) == 0x00)
+	if ((sdCard.csd[0] >> 6) == 0x00)
 	{
 		// CSD version 1
 		// C_SIZE in bits [73:62]
-		uint32 c_size = (((((uint32)sdDev.csd[6]) & 0x3) << 16) | (((uint32)sdDev.csd[7]) << 8) | sdDev.csd[8]) >> 6;
-		uint32 c_mult = (((((uint32)sdDev.csd[9]) & 0x3) << 8) | ((uint32)sdDev.csd[0xa])) >> 7;
-		uint32 sectorSize = sdDev.csd[5] & 0x0F;
-		sdDev.capacity = ((c_size+1) * ((uint64)1 << (c_mult+2)) * ((uint64)1 << sectorSize)) / SD_SECTOR_SIZE;
+		uint32 c_size = (((((uint32)sdCard.csd[6]) & 0x3) << 16) | (((uint32)sdCard.csd[7]) << 8) | sdCard.csd[8]) >> 6;
+		uint32 c_mult = (((((uint32)sdCard.csd[9]) & 0x3) << 8) | ((uint32)sdCard.csd[0xa])) >> 7;
+		uint32 sectorSize = sdCard.csd[5] & 0x0F;
+		sdCard.capacity = ((c_size+1) * ((uint64)1 << (c_mult+2)) * ((uint64)1 << sectorSize)) / SD_SECTOR_SIZE;
 	}
-	else if ((sdDev.csd[0] >> 6) == 0x01)
+	else if ((sdCard.csd[0] >> 6) == 0x01)
 	{
 		// CSD version 2
 		// C_SIZE in bits [69:48]
 
 		uint32 c_size =
-			((((uint32)sdDev.csd[7]) & 0x3F) << 16) |
-			(((uint32)sdDev.csd[8]) << 8) |
-			((uint32)sdDev.csd[7]);
-		sdDev.capacity = (c_size + 1) * 1024;
+			((((uint32)sdCard.csd[7]) & 0x3F) << 16) |
+			(((uint32)sdCard.csd[8]) << 8) |
+			((uint32)sdCard.csd[7]);
+		sdCard.capacity = (c_size + 1) * 1024;
 	}
 	else
 	{
@@ -809,11 +839,11 @@ int sdInit()
 	uint8 v;
 
 	sdCmdState = CMD_STATE_IDLE;
-	sdDev.version = 0;
-	sdDev.ccs = 0;
-	sdDev.capacity = 0;
-	memset(sdDev.csd, 0, sizeof(sdDev.csd));
-	memset(sdDev.cid, 0, sizeof(sdDev.cid));
+	sdCard.version = 0;
+	sdCard.ccs = 0;
+	sdCard.capacity = 0;
+	memset(sdCard.csd, 0, sizeof(sdCard.csd));
+	memset(sdCard.cid, 0, sizeof(sdCard.cid));
 
 	sdInitDMA();
 
@@ -848,7 +878,7 @@ int sdInit()
 	if (!sdOpCond()) goto bad; // ACMD41. Wait for init completes.
 	if (!sdReadOCR()) goto bad; // CMD58. Get CCS flag. Only valid after init.
 
-	// This command will be ignored if sdDev.ccs is set.
+	// This command will be ignored if sdCard.ccs is set.
 	// SDHC and SDXC are always 512bytes.
 	v = sdCRCCommandAndResponse(SD_SET_BLOCKLEN, SD_SECTOR_SIZE); //Force sector size
 	if(v){goto bad;}
@@ -882,7 +912,7 @@ int sdInit()
 
 bad:
 	SD_Data_Clk_SetDivider(clkDiv25MHz); // Restore the clock for our next retry
-	sdDev.capacity = 0;
+	sdCard.capacity = 0;
 
 out:
 	sdClearStatus();
@@ -895,7 +925,7 @@ void sdWriteMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)
 {
 	uint32_t tmpNextLBA = sdLBA + sdSectors;
 
-	if (!sdDev.ccs)
+	if (!sdCard.ccs)
 	{
 		sdLBA = sdLBA * SD_SECTOR_SIZE;
 		tmpNextLBA = tmpNextLBA * SD_SECTOR_SIZE;
@@ -924,8 +954,8 @@ void sdWriteMultiSectorPrep(uint32_t sdLBA, uint32_t sdSectors)
 			scsiDiskReset();
 			sdClearStatus();
 			scsiDev.status = CHECK_CONDITION;
-			scsiDev.target->sense.code = HARDWARE_ERROR;
-			scsiDev.target->sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
+			scsiDev.target->state.sense.code = HARDWARE_ERROR;
+			scsiDev.target->state.sense.asc = LOGICAL_UNIT_COMMUNICATION_FAILURE;
 			scsiDev.phase = STATUS;
 		}
 		else
@@ -947,6 +977,24 @@ void sdPoll()
 	}
 }
 
+static int
+sdIsCardPresent()
+{
+	// The CS line is pulled high by the SD card.
+	// De-assert the line, and check if it's high.
+	// This isn't foolproof as it'll be left floating without
+	// an SD card. We can't use the built-in pull-down resistor as it will
+	// overpower the SD pullup resistor.
+	SD_CS_Write(0);
+	SD_CS_SetDriveMode(SD_CS_DM_DIG_HIZ);
+
+	// Delay extended to work with 60cm cables running cards at 2.85V
+	CyDelayCycles(128);
+	int cs = SD_CS_Read();
+	SD_CS_SetDriveMode(SD_CS_DM_STRONG);
+	return cs;
+}
+
 void sdCheckPresent()
 {
 	static int firstCheck = 1;
@@ -955,64 +1003,143 @@ void sdCheckPresent()
 		(sdIOState == SD_IDLE) &&
 		(sdCmdState == CMD_STATE_IDLE))
 	{
-		// The CS line is pulled high by the SD card.
-		// De-assert the line, and check if it's high.
-		// This isn't foolproof as it'll be left floating without
-		// an SD card. We can't use the built-in pull-down resistor as it will
-		// overpower the SD pullup resistor.
-		SD_CS_Write(0);
-		SD_CS_SetDriveMode(SD_CS_DM_DIG_HIZ);
+		int cs = sdIsCardPresent();
 
-		// Delay extended to work with 60cm cables running cards at 2.85V
-		CyDelayCycles(128);
-		uint8_t cs = SD_CS_Read();
-		SD_CS_SetDriveMode(SD_CS_DM_STRONG)	;
-
-		if (cs && !(blockDev.state & DISK_PRESENT))
+		if (cs && !(sdCard.dev.mediaState & MEDIA_PRESENT))
 		{
 			static int firstInit = 1;
 
-			// Debounce, except on startup if the card is present at
+			// Debounce. Quicker if the card is present at
 			// power on
-			if (!firstCheck)
+			for (int i = 0; cs && (i < (firstCheck ? 2 : 50)); ++i)
 			{
-				CyDelay(250);
+				cs = sdIsCardPresent();
+				CyDelay(5);
 			}
 
-			if (sdInit())
+			if (cs && sdInit())
 			{
-				blockDev.state |= DISK_PRESENT | DISK_INITIALISED;
+				sdCard.dev.mediaState |= MEDIA_PRESENT | MEDIA_INITIALISED;
 
 				// Always "start" the device. Many systems (eg. Apple System 7)
 				// won't respond properly to
 				// LOGICAL_UNIT_NOT_READY_INITIALIZING_COMMAND_REQUIRED sense
 				// code, even if they stopped it first with
 				// START STOP UNIT command.
-				blockDev.state |= DISK_STARTED;
+				sdCard.dev.mediaState |= MEDIA_STARTED;
 
 				if (!firstInit)
 				{
 					int i;
 					for (i = 0; i < MAX_SCSI_TARGETS; ++i)
 					{
-						scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;
+						sdCard.targets[i].state.unitAttention = PARAMETERS_CHANGED;
 					}
 				}
 				firstInit = 0;
 			}
 		}
-		else if (!cs && (blockDev.state & DISK_PRESENT))
+		else if (!cs && (sdCard.dev.mediaState & MEDIA_PRESENT))
 		{
-			sdDev.capacity = 0;
-			blockDev.state &= ~DISK_PRESENT;
-			blockDev.state &= ~DISK_INITIALISED;
+			sdCard.capacity = 0;
+			sdCard.dev.mediaState &= ~MEDIA_PRESENT;
+			sdCard.dev.mediaState &= ~MEDIA_INITIALISED;
 			int i;
 			for (i = 0; i < MAX_SCSI_TARGETS; ++i)
 			{
-				scsiDev.targets[i].unitAttention = PARAMETERS_CHANGED;
+				sdCard.targets[i].state.unitAttention = PARAMETERS_CHANGED;
 			}
 		}
 	}
 	firstCheck = 0;
 }
 
+static void sd_earlyInit(S2S_Device* dev)
+{
+	SdCard* sdCardDevice = (SdCard*)dev;
+
+	for (int i = 0; i < MAX_SCSI_TARGETS; ++i)
+	{
+		sdCardDevice->targets[i].device = dev;
+        
+        const S2S_TargetCfg* cfg = getConfigByIndex(i);
+        if (cfg->storageDevice == CONFIG_STOREDEVICE_SD)
+        {
+		    sdCardDevice->targets[i].cfg = (S2S_TargetCfg*)cfg;
+        }
+        else
+        {
+            sdCardDevice->targets[i].cfg = NULL;
+        }
+	}
+	sdCardDevice->lastPollMediaTime = getTime_ms();
+
+	// Don't require the host to send us a START STOP UNIT command
+	sdCardDevice->dev.mediaState = MEDIA_STARTED;
+}
+
+static void sd_deviceInit(S2S_Device* dev)
+{
+	sdCheckPresent();
+}
+
+static S2S_Target* sd_getTargets(S2S_Device* dev, int* count)
+{
+	SdCard* sdCardDevice = (SdCard*)dev;
+	*count = MAX_SCSI_TARGETS;
+	return sdCardDevice->targets;
+}
+
+static uint32_t sd_getCapacity(S2S_Device* dev)
+{
+	SdCard* sdCardDevice = (SdCard*)dev;
+	return sdCardDevice->capacity;
+}
+
+static int sd_pollMediaChange(S2S_Device* dev)
+{
+	SdCard* sdCardDevice = (SdCard*)dev;
+	if (elapsedTime_ms(sdCardDevice->lastPollMediaTime) > 200)
+	{
+		sdCheckPresent();
+		sdCardDevice->lastPollMediaTime = getTime_ms();
+		return 0;
+	}
+	else
+	{
+		return 0;
+	}
+}
+
+static void sd_pollMediaBusy(S2S_Device* dev)
+{
+	SdCard* sdCardDevice = (SdCard*)dev;
+	sdCardDevice->lastPollMediaTime = getTime_ms();
+}
+
+static void sd_erase(S2S_Device* dev, uint32_t sectorNumber, uint32_t count)
+{
+    // TODO
+}
+
+static void sd_read(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
+{
+    // TODO
+}
+
+static void sd_readAsync(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer)
+{
+    // TODO
+}
+
+
+static int sd_readAsyncPoll(S2S_Device* dev)
+{
+    return 1;
+}
+
+
+static void sd_write(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, const uint8_t* buffer)
+{
+    // TODO
+}

software/SCSI2SD/src/sd.h

@@ -17,6 +17,8 @@
 #ifndef SD_H
 #define SD_H
 
+#include "storedevice.h"
+
 #define SD_SECTOR_SIZE 512
 
 typedef enum
@@ -52,15 +54,23 @@ typedef enum
 
 typedef struct
 {
+	S2S_Device dev;
+
+	S2S_Target targets[MAX_SCSI_TARGETS];
+
 	int version; // SDHC = version 2.
 	int ccs; // Card Capacity Status. 1 = SDHC or SDXC
-	uint32 capacity; // in 512 byte blocks
+	uint32_t capacity; // in 512 byte blocks
 
 	uint8_t csd[16]; // Unparsed CSD
 	uint8_t cid[16]; // Unparsed CID
-} SdDevice;
 
-extern SdDevice sdDev;
+	uint32_t lastPollMediaTime;
+} SdCard;
+
+extern SdCard sdCard;
+extern S2S_Device* sdDevice;
+
 extern volatile uint8_t sdRxDMAComplete;
 extern volatile uint8_t sdTxDMAComplete;
 

software/SCSI2SD/src/sense.h

@@ -169,8 +169,8 @@ typedef enum
 
 typedef struct
 {
-	uint8 code;
-	uint16 asc;
+	uint8_t code;
+	uint16_t asc;
 } ScsiSense;
 
 #endif

software/SCSI2SD/src/storedevice.c

@@ -0,0 +1,100 @@
+//	Copyright (C) 2020 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+#include "storedevice.h"
+
+#include "device.h"
+
+#ifdef NOR_SPI_DATA_WIDTH
+#include "flash.h"
+#endif
+
+#include "sd.h"
+
+#include <stddef.h>
+#include <string.h>
+
+S2S_Target* s2s_DeviceFindByScsiId(int scsiId)
+{
+	int deviceCount;
+	S2S_Device** devices = s2s_GetDevices(&deviceCount);
+	for (int deviceIdx = 0; deviceIdx < deviceCount; ++deviceIdx)
+	{
+		int targetCount;
+		S2S_Target* targets = devices[deviceIdx]->getTargets(devices[deviceIdx], &targetCount);
+		for (int targetIdx = 0; targetIdx < targetCount; ++targetIdx)
+		{
+			S2S_Target* target = targets + targetIdx;
+			if (target &&
+                target->cfg &&
+				(target->cfg->scsiId & CONFIG_TARGET_ENABLED) &&
+				((target->cfg->scsiId & CONFIG_TARGET_ID_BITS) == scsiId))
+			{
+				return target;
+			}
+		}
+	}
+
+	return NULL;
+}
+
+S2S_Device** s2s_GetDevices(int* count)
+{
+    static S2S_Device* allDevices[2];
+    
+    *count = 1;
+    allDevices[0] = sdDevice;
+    
+    #ifdef NOR_SPI_DATA_WIDTH
+	    *count = 2;
+        allDevices[1] = spiFlashDevice;
+    #endif
+    
+    return allDevices;
+}
+
+void s2s_deviceEarlyInit()
+{
+	int count;
+	S2S_Device** devices = s2s_GetDevices(&count);
+	for (int i = 0; i < count; ++i)
+	{
+		devices[i]->earlyInit(devices[i]);
+	}
+}
+
+void s2s_deviceInit()
+{
+	int count;
+	S2S_Device** devices = s2s_GetDevices(&count);
+	for (int i = 0; i < count; ++i)
+	{
+		devices[i]->init(devices[i]);
+	}
+}
+
+int s2s_pollMediaChange()
+{
+	int result = 0;
+	int count;
+	S2S_Device** devices = s2s_GetDevices(&count);
+	for (int i = 0; i < count; ++i)
+	{
+		int devResult = devices[i]->pollMediaChange(devices[i]);
+		result = result || devResult;
+	}
+	return result;
+}

software/SCSI2SD/src/storedevice.h

@@ -0,0 +1,98 @@
+//	Copyright (C) 2020 Michael McMaster <michael@codesrc.com>
+//
+//	This file is part of SCSI2SD.
+//
+//	SCSI2SD is free software: you can redistribute it and/or modify
+//	it under the terms of the GNU General Public License as published by
+//	the Free Software Foundation, either version 3 of the License, or
+//	(at your option) any later version.
+//
+//	SCSI2SD is distributed in the hope that it will be useful,
+//	but WITHOUT ANY WARRANTY; without even the implied warranty of
+//	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+//	GNU General Public License for more details.
+//
+//	You should have received a copy of the GNU General Public License
+//	along with SCSI2SD.  If not, see <http://www.gnu.org/licenses/>.
+#ifndef S2S_DEVICE_H
+#define S2S_DEVICE_H
+
+#include "scsi2sd.h"
+#include "sense.h"
+
+#include <stdint.h>
+
+struct S2S_DeviceStruct;
+typedef struct S2S_DeviceStruct S2S_Device;
+
+struct S2S_TargetStruct;
+typedef struct S2S_TargetStruct S2S_Target;
+
+struct S2S_TargetStateStruct;
+typedef struct S2S_TargetStateStruct S2S_TargetState;
+
+typedef enum
+{
+	MEDIA_STARTED = 1,     // Controlled via START STOP UNIT
+	MEDIA_PRESENT = 2,     // SD card is physically present
+	MEDIA_INITIALISED = 4, // SD card responded to init sequence
+	MEDIA_WP = 8           // Write-protect.
+} MEDIA_STATE;
+
+struct S2S_TargetStateStruct
+{
+	ScsiSense sense;
+
+	uint16_t unitAttention; // Set to the sense qualifier key to be returned.
+
+	// Only let the reserved initiator talk to us.
+	// A 3rd party may be sending the RESERVE/RELEASE commands
+	int reservedId; // 0 -> 7 if reserved. -1 if not reserved.
+	int reserverId; // 0 -> 7 if reserved. -1 if not reserved.
+
+	// Shadow parameters, possibly not saved to flash yet.
+	// Set via Mode Select
+	uint16_t bytesPerSector;
+};
+
+struct S2S_TargetStruct
+{
+	S2S_Device* device;
+	S2S_TargetCfg* cfg;
+
+	S2S_TargetState state;
+};
+
+struct S2S_DeviceStruct
+{
+	void (*earlyInit)(S2S_Device* dev);
+    void (*init)(S2S_Device* dev);
+
+	S2S_Target* (*getTargets)(S2S_Device* dev, int* count);
+
+	// Get the number of 512 byte blocks
+	uint32_t (*getCapacity)(S2S_Device* dev);
+
+	int (*pollMediaChange)(S2S_Device* dev);
+	void (*pollMediaBusy)(S2S_Device* dev);
+
+    void (*erase)(S2S_Device* dev, uint32_t sectorNumber, uint32_t count);
+    void (*read)(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+    void (*readAsync)(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, uint8_t* buffer);
+    int  (*readAsyncPoll)(S2S_Device* dev);
+    void (*write)(S2S_Device* dev, uint32_t sectorNumber, uint32_t count, const uint8_t* buffer);
+
+	MEDIA_STATE mediaState;
+    CONFIG_STOREDEVICE deviceType;
+};
+
+S2S_Target* s2s_DeviceFindByScsiId(int scsiId);
+
+S2S_Device** s2s_GetDevices(int* count);
+
+void s2s_deviceEarlyInit();
+void s2s_deviceInit();
+int s2s_pollMediaChange();
+#endif
+
+

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cy_em_eeprom.h

@@ -0,0 +1,556 @@
+/*******************************************************************************
+* \file cy_em_eeprom.h
+* \version 2.0
+*
+* \brief
+*  This file provides the function prototypes and constants for the Emulated
+*  EEPROM middleware library.
+*
+********************************************************************************
+* Copyright 2017, Cypress Semiconductor Corporation.  All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+/**
+ * \mainpage Cypress Em_EEPROM Middleware Library
+ *
+ * The Emulated EEPROM provides an API that allows creating an emulated
+ * EEPROM in flash that has the ability to do wear leveling and restore
+ * corrupted data from a redundant copy. The Emulated EEPROM library is designed
+ * to be used with the Em_EEPROM component.
+ *
+ * The Cy_Em_EEPROM API is described in the following sections:
+ * - \ref group_em_eeprom_macros
+ * - \ref group_em_eeprom_data_structures
+ * - \ref group_em_eeprom_enums
+ * - \ref group_em_eeprom_functions
+ *
+ * <b>Features:</b>
+ * * EEPROM-Like Non-Volatile Storage
+ * * Easy to use Read and Write API
+ * * Optional Wear Leveling
+ * * Optional Redundant Data storage
+ *
+ * \section group_em_eeprom_configuration Configuration Considerations
+ *
+ * The Em_EEPROM operates on the top of the flash driver. The flash driver has
+ * some prerequisites for proper operation. Refer to the "Flash System 
+ * Routine (Flash)" section of the PDL API Reference Manual.
+ *
+ * <b>Initializing Emulated EEPROM in User flash</b>
+ *
+ * To initialize an Emulated EEPROM in the User flash, the EEPROM storage should
+ * be declared by the user. For the proper operation, the EEPROM storage should
+ * be aligned to the size of the flash row. An example of the EEPROM storage
+ * declaration is below (applicable for GCC and MDK compilers):
+ *
+ *      CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * The same declaration for the IAR compiler:
+ *
+ *      #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ * 
+ * Note that the name "emEeprom" is shown for reference. Any other name can be
+ * used instead. Also, note that the Em_EEPROM_PHYSICAL_SIZE constant is 
+ * generated by the PSoC Creator Em_EEPROM component and so it is instance name
+ * dependent and its prefix should be changed when the name of the component 
+ * changes. If the The Cy_Em_EEPROM middleware library is used without the 
+ * Em_EEPROM component, the user has to provide a proper size for the EEPROM 
+ * storage instead of Em_EEPROM_PHYSICAL_SIZE. The size of the EEPROM storage 
+ * can be calculated using the following equation:
+ * 
+ *  Physical size = EEPROM data size * 2 * wear leveling * (1 + redundant copy)
+ *
+ * where, 
+ *   "EEPROM data size" - the size of data the user wants to store in the 
+ *   EEPROM. The data size must divide evenly to the half of the flash row size.
+ *   "wear leveling" - the wear leveling factor (1-10).
+ *   "redundant copy" - "zero" if a redundant copy is not used, and "one" 
+ *   otherwise.
+ *
+ * The start address of the storage should be filled to the Emulated EEPROM 
+ * configuration structure and then passed to the Cy_Em_EEPROM_Init().
+ * If the Em_EEPROM component is used, the config (Em_EEPROM_config) and 
+ * context structures (Em_EEPROM_context) are defined by the component, so the
+ * user may just use that structures otherwise both of the structures need to 
+ * be provided by the user. Note that if the "Config Data in Flash"
+ * option is selected in the component, then the configuration structure should
+ * be copied to RAM to allow EEPROM storage start address update. The following 
+ * code demonstrates utilization of "Em_EEPROM_config" and "Em_EEPROM_context"
+ * Em_EEPROM component structures for Cy_Em_EEPROM middleware library 
+ * initialization:
+ *
+ *      cy_en_em_eeprom_status_t retValue;
+ *      cy_stc_eeprom_config_t config;
+ *
+ *      memcpy((void *)&config, 
+               (void *)&Em_EEPROM_config, 
+               sizeof(cy_stc_eeprom_config_t));
+ *      config.userFlashStartAddr = (uint32)emEeprom;
+ *      retValue = Cy_Em_EEPROM_Init(&config, &Em_EEPROM_context);
+ *
+ * <b>Initializing EEPROM in Emulated EEPROM flash area</b>
+ * 
+ * Initializing of the EEPROM storage in the Emulated EEPROM flash area is 
+ * identical to initializing of the EEPROM storage in the User flash with one 
+ * difference. The location of the Emulated EEPROM storage should be specified 
+ * somewhere in the EmulatedEEPROM flash area. If the Em_EEPROM component is 
+ * utilized in the project, then the respective storage 
+ * (Em_EEPROM_em_EepromStorage[]) is automatically declared by the component 
+ * if the "Use Emulated EEPROM" option is set to "Yes". The user just needs to 
+ * fill the start address of the storage to the config structure. If the
+ * Em_EEPROM component is not used, the user needs to declare the storage
+ * in the Emulated EEPROM flash area. An example of such declaration is 
+ * following (applicable for GCC and MDK compilers):
+ *
+ *      CY_SECTION(".cy_em_eeprom") CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+ *      const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * The same declaration for the IAR compiler:
+ *
+ *      #pragma location = ".cy_em_eeprom"
+ *      #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * where,
+ *   Em_EEPROM_PHYSICAL_SIZE - is a constant that is generated by the Em_EEPROM
+ *   component when the component is utilized in the project or it should be 
+ *   provided by the user. The equation for the calculation of the constant is 
+ *   shown above.
+ *
+ * Note that the size of the Emulated EEPROM flash area is limited. Refer to the
+ * specific device datasheet for the value of the available EEPROM Emulation 
+ * area.
+ *
+ * \section group_em_eeprom_more_information More Information
+ * See the Em_EEPROM Component datasheet.
+ *
+ *
+ * \section group_em_eeprom_MISRA MISRA-C Compliance
+ *
+ * The Cy_Em_EEPROM library has the following specific deviations:
+ *
+ * <table class="doxtable">
+ *   <tr>
+ *     <th>MISRA Rule</th>
+ *     <th>Rule Class (Required/Advisory)</th>
+ *     <th>Rule Description</th>
+ *     <th>Description of Deviation(s)</th>
+ *   </tr>
+ *   <tr>
+ *     <td>11.4</td>
+ *     <td>A</td>
+ *     <td>The cast should not be performed between a pointer to the object type
+ *         and a different pointer to the object type.</td>
+ *     <td>The cast from the object type and a different pointer to the object 
+ *         was used intentionally because of the performance reasons.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>14.2</td>
+ *     <td>R</td>
+ *     <td>All non-null statements shall either have at least one side-effect,
+ *         however executed, or cause control flow to change.</td>
+ *     <td>To maintain common codebase, some variables, unused for a specific 
+ *         device, are casted to void to prevent generation of an unused variable
+ *         compiler warning.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>16.7</td>
+ *     <td>A</td>
+ *     <td>The object addressed by the pointer parameter is not modified and so
+ *          the pointer could be of type 'pointer to const'.</td>
+ *     <td>The warning is generated because of the pointer dereferencing to
+ *         address which makes the MISRA checker think the data is not
+ *         modified.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>17.4</td>
+ *     <td>R</td>
+ *     <td>The array indexing shall be the only allowed form of pointer 
+ *         arithmetic.</td>
+ *     <td>The pointer arithmetic used in several places on the Cy_Em_EEPROM
+ *         implementation is safe and preferred because it increases the code
+ *         flexibility.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>19.7</td>
+ *     <td>A</td>
+ *     <td>A function shall be used in preference to a function-like macro.</td>
+ *     <td>Macro is used because of performance reasons.</td>
+ *   </tr>
+ * </table>
+ *
+ * \section group_em_eeprom_changelog Changelog
+ * <table class="doxtable">
+ *   <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
+ *   <tr>
+ *     <td>1.0</td>
+ *     <td>Initial Version</td>
+ *     <td></td>
+ *   </tr>
+ * </table>
+ *
+ * \defgroup group_em_eeprom_macros Macros
+ * \brief
+ * This section describes the Emulated EEPROM Macros.
+ *
+ * \defgroup group_em_eeprom_functions Functions
+ * \brief
+ * This section describes the Emulated EEPROM Function Prototypes.
+ *
+ * \defgroup group_em_eeprom_data_structures Data Structures
+ * \brief
+ * Describes the data structures defined by the Emulated EEPROM.
+ *
+ * \defgroup group_em_eeprom_enums Enumerated types
+ * \brief
+ * Describes the enumeration types defined by the Emulated EEPROM.
+ *
+ */
+
+
+#if !defined(CY_EM_EEPROM_H)
+#define CY_EM_EEPROM_H
+
+#include "cytypes.h"
+#include <stddef.h>
+#if (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6)
+    #include <cy_device_headers.h>
+    #include "syslib/cy_syslib.h"
+    #include "flash/cy_flash.h"
+#else
+    #include "CyFlash.h"
+    #include <cyfitter.h>
+#endif /* (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6) */
+
+/* The C binding of definitions if building with the C++ compiler */
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+
+/***************************************
+* Conditional Compilation Parameters
+***************************************/
+#define CY_PSOC6                                    (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6)
+
+
+/***************************************
+* Data Structure definitions
+***************************************/
+/**
+* \addtogroup group_em_eeprom_data_structures
+* \{
+*/
+
+/** EEPROM configuration structure */
+typedef struct
+{
+    /** The number of bytes to store in EEPROM */
+    uint32 eepromSize;
+
+    /** The amount of wear leveling from 1 to 10. 1 means no wear leveling
+    * is used.
+    */
+    uint32 wearLevelingFactor;
+
+    /** If not zero, a redundant copy of the Em_EEPROM is included. */
+    uint8 redundantCopy;
+
+    /** If not zero, a blocking write to flash is used. Otherwise non-blocking
+    * write is used. This parameter is used only for PSoC 6.
+    */
+    uint8 blockingWrite;
+
+    /** The start address for the EEPROM memory in the user's flash. */
+    uint32 userFlashStartAddr;
+} cy_stc_eeprom_config_t;
+
+/** \} group_em_eeprom_data_structures */
+
+/** The EEPROM context data structure. It is used to store the specific
+* EEPROM context data.
+*/
+typedef struct
+{
+    /** The pointer to the end address of EEPROM including wear leveling overhead
+    * and excluding redundant copy overhead.
+    */
+    uint32 wlEndAddr;
+
+    /** The number of flash rows allocated for the EEPROM excluding the number of
+    * rows allocated for wear leveling and redundant copy overhead.
+    */
+    uint32 numberOfRows;
+
+    /** The address of the last written EEPROM row */
+    uint32 lastWrRowAddr;
+
+    /** The number of bytes to store in EEPROM */
+    uint32 eepromSize;
+
+    /** The amount of wear leveling from 1 to 10. 1 means no wear leveling
+    * is used.
+    */
+    uint32 wearLevelingFactor;
+
+    /** If not zero, a redundant copy of the Em_EEPROM is included. */
+    uint8 redundantCopy;
+
+    /** If not zero, a blocking write to flash is used. Otherwise non-blocking
+    * write is used. This parameter is used only for PSoC 6.
+    */
+    uint8 blockingWrite;
+
+    /** The start address for the EEPROM memory in the user's flash. */
+    uint32 userFlashStartAddr;
+} cy_stc_eeprom_context_t;
+
+#if (CY_PSOC6)
+
+    #define CY_EM_EEPROM_ID                         (CY_PDL_DRV_ID(0x1BuL))  /**< Em_EEPROM PDL ID */
+    /**
+    * \addtogroup group_em_eeprom_enums
+    * \{
+    * Specifies return values meaning.
+    */
+    /** A prefix for EEPROM function error return-values */
+    #define CY_EM_EEPROM_ID_ERROR                   (uint32_t)(CY_EM_EEPROM_ID | CY_PDL_STATUS_ERROR)
+
+#else
+
+    /** A prefix for EEPROM function status codes. For non-PSoC6 devices,
+    * prefix is zero.
+    */
+    #define CY_EM_EEPROM_ID_ERROR                       (0uL)
+
+#endif /* (CY_PSOC6) */
+
+
+/***************************************
+* Enumerated Types and Parameters
+***************************************/
+
+/** EEPROM return enumeration type */
+typedef enum
+{
+    CY_EM_EEPROM_SUCCESS      = 0x00uL,                             /**< The function executed successfully */
+    CY_EM_EEPROM_BAD_PARAM    = (CY_EM_EEPROM_ID_ERROR + 1uL),      /**< The input parameter is invalid */
+    CY_EM_EEPROM_BAD_CHECKSUM = (CY_EM_EEPROM_ID_ERROR + 2uL),      /**< The data in EEPROM is corrupted */
+    CY_EM_EEPROM_BAD_DATA     = (CY_EM_EEPROM_ID_ERROR + 3uL),      /**< Failed to place the EEPROM in flash */
+    CY_EM_EEPROM_WRITE_FAIL   = (CY_EM_EEPROM_ID_ERROR + 4uL)       /**< Write to EEPROM failed */
+} cy_en_em_eeprom_status_t;
+
+/** \} group_em_eeprom_enums */
+
+
+/***************************************
+*        Function Prototypes
+***************************************/
+
+/**
+* \addtogroup group_em_eeprom_functions
+* \{
+*/
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Init(cy_stc_eeprom_config_t* config, cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Read(uint32 addr,
+                                        void * eepromData,
+                                        uint32 size,
+                                        cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Write(uint32 addr,
+                                            void * eepromData,
+                                            uint32 size,
+                                            cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Erase(cy_stc_eeprom_context_t * context);
+uint32 Cy_Em_EEPROM_NumWrites(cy_stc_eeprom_context_t * context);
+/** \} group_em_eeprom_functions */
+
+
+/***************************************
+* API Constants
+***************************************/
+/**
+* \addtogroup group_em_eeprom_macros
+* \{
+*/
+/** Library major version */
+#define CY_EM_EEPROM_VERSION_MAJOR                  (2)
+
+/** Library minor version */
+#define CY_EM_EEPROM_VERSION_MINOR                  (0)
+
+/** Defines the maximum data length that can be stored in one flash row */
+#define CY_EM_EEPROM_EEPROM_DATA_LEN                (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)
+
+/** \} group_em_eeprom_macros */
+
+
+/***************************************
+* Macro definitions
+***************************************/
+/** \cond INTERNAL */
+
+/* Defines the size of flash row */
+#define CY_EM_EEPROM_FLASH_SIZEOF_ROW               (CY_FLASH_SIZEOF_ROW)
+
+/* Device specific flash constants */
+#if (!CY_PSOC6)
+    #define CY_EM_EEPROM_FLASH_BASE_ADDR                (CYDEV_FLASH_BASE)
+    #define CY_EM_EEPROM_FLASH_SIZE                     (CYDEV_FLASH_SIZE)
+    #define CY_EM_EEPROM_ROWS_IN_ARRAY                  (CY_FLASH_SIZEOF_ARRAY / CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+    #if (CY_PSOC3)
+        #define CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX          (0xff0000uL)
+        #define CY_EM_EEPROM_CODE_ADDR_END                  \
+                        (CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX + (CY_EM_EEPROM_FLASH_SIZE - 1u))
+        #define CY_EM_EEPROM_CODE_ADDR_MASK                 (0xffffu)
+        /* Checks if the EEPROM is in flash range */
+        #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                        (((startAddr) > CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX) && \
+                         ((endAddr) <= CY_EM_EEPROM_CODE_ADDR_END))
+    #else
+        /* Checks is the EEPROM is in flash range */
+        #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                        (((startAddr) > CY_EM_EEPROM_FLASH_BASE_ADDR) && ((endAddr) <= CY_EM_EEPROM_FLASH_END_ADDR))
+    #endif /* (CY_PSOC3) */
+#else
+    #define CY_EM_EEPROM_FLASH_BASE_ADDR                (CY_FLASH_BASE)
+    #define CY_EM_EEPROM_FLASH_SIZE                     (CY_FLASH_SIZE)
+    #define CY_EM_EEPROM_EM_EEPROM_BASE_ADDR            (CY_EM_EEPROM_BASE)
+    #define CY_EM_EEPROM_EM_EEPROM_SIZE                 (CY_EM_EEPROM_SIZE)
+    #define CY_EM_EEPROM_EM_EEPROM_END_ADDR             (CY_EM_EEPROM_EM_EEPROM_BASE_ADDR + CY_EM_EEPROM_EM_EEPROM_SIZE)
+    /* Checks is the EEPROM is in flash range */
+    #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                    (((((startAddr) > CY_EM_EEPROM_FLASH_BASE_ADDR) && ((endAddr) <= CY_EM_EEPROM_FLASH_END_ADDR)) || \
+                      (((startAddr) >= CY_EM_EEPROM_EM_EEPROM_BASE_ADDR) && \
+                                                                    ((endAddr) <= CY_EM_EEPROM_EM_EEPROM_END_ADDR))))
+#endif /* (!CY_PSOC6) */
+
+#define CY_EM_EEPROM_FLASH_END_ADDR                 (CY_EM_EEPROM_FLASH_BASE_ADDR + CY_EM_EEPROM_FLASH_SIZE)
+
+/* Defines the length of EEPROM data that can be stored in Em_EEPROM header */
+#define CY_EM_EEPROM_HEADER_DATA_LEN                ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) - 16u)
+
+#define CY_EM_EEPROM_ADDR_IN_RANGE                  (1u)
+
+/* Return CY_EM_EEPROM_ADDR_IN_RANGE if addr exceeded the upper range of
+* EEPROM. The wear leveling overhead is included in the range but redundant copy
+* is excluded.
+*/
+#define CY_EM_EEPROM_IS_ADDR_EXCEED_RANGE(addr, endEepromAddr) \
+                                    (((addr) >= (endEepromAddr)) ? (0u) : (CY_EM_EEPROM_ADDR_IN_RANGE))
+
+/* Check to see if the specified address is present in the EEPROM */
+#define CY_EM_EEPROM_IS_ADDR_IN_RANGE(addr, startEepromAddr, endEepromAddr) \
+                                    (((addr) > (startEepromAddr)) ? \
+                                    (((addr) < (endEepromAddr)) ? (CY_EM_EEPROM_ADDR_IN_RANGE) : (0u)) : (0u))
+
+/* Check if the EEPROM address locations from startAddr1 to endAddr1
+* are crossed with EEPROM address locations from startAddr2 to endAddr2.
+*/
+#define CY_EM_EEPROM_IS_ADDRESES_CROSSING(startAddr1, endAddr1 , startAddr2, endAddr2) \
+                                    (((startAddr1) > (startAddr2)) ? (((startAddr1) >= (endAddr2)) ? (0u) : (1u) ) : \
+                                    (((startAddr2) >= (endAddr1)) ? (0u) : (1u)))
+
+/* Return the pointer to the start of the redundant copy of the EEPROM */
+#define CY_EM_EEPROM_GET_REDNT_COPY_ADDR_BASE(numRows, wearLeveling, eepromStartAddr) \
+                                    ((((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW) * (wearLeveling)) + (eepromStartAddr))
+
+/* Return the number of the row in EM_EEPROM which contains an address defined by
+* rowAddr.
+ */
+#define CY_EM_EEPROM_GET_ACT_ROW_NUM_FROM_ADDR(rowAddr, maxRows, eepromStartAddr) \
+                                    ((((rowAddr) - (eepromStartAddr)) / CY_EM_EEPROM_FLASH_SIZEOF_ROW) % (maxRows))
+
+
+/** Returns the size allocated for the EEPROM excluding wear leveling and
+* redundant copy overhead.
+*/
+#define CY_EM_EEPROM_GET_EEPROM_SIZE(numRows)       ((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+
+/* Check if the given address belongs to the EEPROM address of the row
+* specified by rowNum.
+*/
+#define CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr, rowNum) \
+                                    (((addr) < ((rowNum) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u))) ? (0u) : \
+                                    (((addr) > ((((rowNum) + 1u) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)) - 1u)) ? \
+                                    (0u) : (1u)))
+
+/* CRC-8 constants */
+#define CY_EM_EEPROM_CRC8_POLYNOM                   ((uint8)(0x31u))
+#define CY_EM_EEPROM_CRC8_POLYNOM_LEN               (8u)
+#define CY_EM_EEPROM_CRC8_SEED                      (0xFFu)
+#define CY_EM_EEPROM_CRC8_XOR_VAL                   ((uint8) (0x80u))
+
+#define CY_EM_EEPROM_CALCULATE_CRC8(crc)            \
+                  ((CY_EM_EEPROM_CRC8_XOR_VAL == ((crc) & CY_EM_EEPROM_CRC8_XOR_VAL)) ? \
+                  ((uint8)(((uint8)((uint8)((crc) << 1u))) ^ CY_EM_EEPROM_CRC8_POLYNOM)) : ((uint8)((crc) << 1u)))
+
+#define CY_EM_EEPROM_GET_SEQ_NUM(addr)                (*(uint32*)(addr))
+
+/** \endcond */
+
+/**
+* \addtogroup group_em_eeprom_macros
+* \{
+*/
+
+/** Calculate the number of flash rows required to create an Em_EEPROM of
+* dataSize.
+*/
+#define CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) \
+                                    (((dataSize) / (CY_EM_EEPROM_EEPROM_DATA_LEN)) + \
+                                    ((((dataSize) % (CY_EM_EEPROM_EEPROM_DATA_LEN)) != 0u) ? 1U : 0U))
+
+/** Returns the size of flash allocated for EEPROM including wear leveling and
+* redundant copy overhead.
+*/
+#define CY_EM_EEPROM_GET_PHYSICAL_SIZE(dataSize, wearLeveling, redundantCopy) \
+                                    (((CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) * \
+                                    CY_EM_EEPROM_FLASH_SIZEOF_ROW) * \
+                                    (wearLeveling)) * (1uL + (redundantCopy)))
+
+/** \} group_em_eeprom_macros */
+
+
+/******************************************************************************
+* Local definitions
+*******************************************************************************/
+/** \cond INTERNAL */
+
+/* Offsets for 32-bit RAM buffer addressing */
+#define CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32         ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) / 4u)
+#define CY_EM_EEPROM_HEADER_SEQ_NUM_OFFSET_U32      (0u)
+#define CY_EM_EEPROM_HEADER_ADDR_OFFSET_U32         (1u)
+#define CY_EM_EEPROM_HEADER_LEN_OFFSET_U32          (2u)
+#define CY_EM_EEPROM_HEADER_DATA_OFFSET_U32         (3u)
+#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32     (CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32 - 1u)
+
+/* The same offsets as above used for direct memory addressing */
+#define CY_EM_EEPROM_EEPROM_DATA_OFFSET             (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)
+#define CY_EM_EEPROM_HEADER_ADDR_OFFSET             (4u)
+#define CY_EM_EEPROM_HEADER_LEN_OFFSET              (8u)
+#define CY_EM_EEPROM_HEADER_DATA_OFFSET             (12u)
+#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET         (CY_EM_EEPROM_EEPROM_DATA_OFFSET - 4u)
+
+#define CY_EM_EEPROM_U32_DIV                        (4u)
+
+/* Maximum wear leveling value */
+#define CY_EM_EEPROM_MAX_WEAR_LEVELING_FACTOR       (10u)
+
+/* Maximum allowed flash row write/erase operation duration */
+#define CY_EM_EEPROM_MAX_WRITE_DURATION_MS          (50u)
+
+/** \endcond */
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* CY_EM_EEPROM_H */
+
+
+/* [] END OF FILE */

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevice.h
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice_trm.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevice_trm.h
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu.inc

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevicegnu.inc
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu_trm.inc

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevicegnu_trm.inc
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydeviceiar.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar_trm.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydeviceiar_trm.inc
 ; 
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicerv.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydevicerv.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicerv_trm.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydevicerv_trm.inc
 ; 
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c

@@ -2,7 +2,7 @@
 /*******************************************************************************
 * File Name: cyfitter_cfg.c
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file contains device initialization code.
@@ -10,7 +10,7 @@
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -101,6 +101,7 @@ static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)
 #define CYCLOCKSTART_32KHZ_ERROR 2u
 #define CYCLOCKSTART_PLL_ERROR   3u
 #define CYCLOCKSTART_FLL_ERROR   4u
+#define CYCLOCKSTART_WCO_ERROR   5u
 
 
 #ifdef CY_NEED_CYCLOCKSTARTUPERROR
@@ -124,12 +125,8 @@ static void CyClockStartupError(uint8 errorCode);
 CY_CFG_UNUSED
 static void CyClockStartupError(uint8 errorCode)
 {
-    /* To remove the compiler warning if errorCode not used. */
-#if defined(CY_PSOC3) && (CY_PSOC3)
+    /* To remove the compiler warning if errorCode not used.                */
     errorCode = errorCode;
-#else
-    (void)errorCode;
-#endif /* CY_PSOC3 */
 
     /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */
     /* we will end up here to allow the customer to implement something to  */
@@ -403,7 +400,7 @@ void cyfitter_cfg(void)
 
 
 	/* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
-	CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
+	CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x61u : 0x60u));
 	/* Setup clocks based on selections from Clock DWR */
 	ClockSetup();
 	/* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cyfitter_cfg.h
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides basic startup and mux configuration settings
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/cymetadata.c

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cymetadata.c
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file defines all extra memory spaces that need to be included.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v3/SCSI2SD.cydsn/Generated_Source/PSoC5/project.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: project.h
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * It contains references to all generated header files and should not be modified.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -85,6 +85,7 @@
 #include "cyPm.h"
 #include "CySpc.h"
 #include "cytypes.h"
+#include "cy_em_eeprom.h"
 
 /*[]*/
 

software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cycdx

@@ -1,12 +1,42 @@
 <?xml version="1.0" encoding="utf-8"?>
 <blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
+  <block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
+    <register name="SCSI_Parity_Error_STATUS_REG" address="0x40006461" bitWidth="8" desc="" hidden="false" />
+    <register name="SCSI_Parity_Error_MASK_REG" address="0x40006481" bitWidth="8" desc="" hidden="false" />
+    <register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006491" bitWidth="8" desc="" hidden="false">
+      <field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
+        <value name="ENABLED" value="1" desc="Enable counter" />
+        <value name="DISABLED" value="0" desc="Disable counter" />
+      </field>
+      <field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
+        <value name="ENABLED" value="1" desc="Interrupt enabled" />
+        <value name="DISABLED" value="0" desc="Interrupt disabled" />
+      </field>
+      <field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
+        <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
+        <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
+      </field>
+      <field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
+        <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
+        <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
+      </field>
+      <field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
+        <value name="ENABLED" value="1" desc="Clear FIFO state" />
+        <value name="DISABLED" value="0" desc="Normal FIFO operation" />
+      </field>
+      <field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
+        <value name="ENABLED" value="1" desc="Clear FIFO state" />
+        <value name="DISABLED" value="0" desc="Normal FIFO operation" />
+      </field>
+    </register>
+  </block>
   <block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
     <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
@@ -65,21 +95,19 @@
     <register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />
     <register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />
   </block>
-  <block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
-    <register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006478" bitWidth="8" desc="" hidden="false" />
-  </block>
+  <block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
     <register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006477" bitWidth="8" desc="" hidden="false" />
   </block>
-  <block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
     <register name="SCSI_Filtered_STATUS_REG" address="0x40006462" bitWidth="8" desc="" hidden="false" />
@@ -111,39 +139,12 @@
       </field>
     </register>
   </block>
-  <block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
-    <register name="SCSI_Parity_Error_STATUS_REG" address="0x40006461" bitWidth="8" desc="" hidden="false" />
-    <register name="SCSI_Parity_Error_MASK_REG" address="0x40006481" bitWidth="8" desc="" hidden="false" />
-    <register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006491" bitWidth="8" desc="" hidden="false">
-      <field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
-        <value name="ENABLED" value="1" desc="Enable counter" />
-        <value name="DISABLED" value="0" desc="Disable counter" />
-      </field>
-      <field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
-        <value name="ENABLED" value="1" desc="Interrupt enabled" />
-        <value name="DISABLED" value="0" desc="Interrupt disabled" />
-      </field>
-      <field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
-        <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
-        <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
-      </field>
-      <field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
-        <value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
-        <value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
-      </field>
-      <field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
-        <value name="ENABLED" value="1" desc="Clear FIFO state" />
-        <value name="DISABLED" value="0" desc="Normal FIFO operation" />
-      </field>
-      <field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
-        <value name="ENABLED" value="1" desc="Clear FIFO state" />
-        <value name="DISABLED" value="0" desc="Normal FIFO operation" />
-      </field>
-    </register>
-  </block>
+  <block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
-  <block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
+  <block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
+    <register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006478" bitWidth="8" desc="" hidden="false" />
+  </block>
   <block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
   <block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />

software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cydwr

@@ -450,6 +450,7 @@
   <Group key="Component">
     <Group key="v1">
       <Data key="cy_boot" value="cy_boot_v5_50" />
+      <Data key="Em_EEPROM_Dynamic" value="Em_EEPROM_Dynamic_v2_0" />
       <Data key="LIN_Dynamic" value="LIN_Dynamic_v3_40" />
     </Group>
   </Group>
@@ -3603,8 +3604,20 @@
     </Group>
   </Group>
   <Group key="Interrupt">
-    <Data key="4abaf846-60a1-4cfc-b1e0-6eb532fa6a05" value="0" />
-    <Data key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500" value="6" />
+    <Group key="4abaf846-60a1-4cfc-b1e0-6eb532fa6a05">
+      <Group key="CortexM3">
+        <Data key="Assigned" value="True" />
+        <Data key="Priority" value="0" />
+        <Data key="Vector" value="-1" />
+      </Group>
+    </Group>
+    <Group key="791071b3-a348-49c4-b578-64e66d701d0f/d91ea660-bc91-4817-b29b-2fe86c305500">
+      <Group key="CortexM3">
+        <Data key="Assigned" value="True" />
+        <Data key="Priority" value="6" />
+        <Data key="Vector" value="-1" />
+      </Group>
+    </Group>
   </Group>
   <Group key="Pin2">
     <Group key="1bd12db2-da87-4f00-90d1-0a734e846c58">

software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cyprj

@@ -2848,6 +2848,32 @@
 <build_action v="OTHER;;;;" />
 <PropertyDeltas />
 </CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFolderSerialize" version="3">
+<CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtBaseContainerSerialize" version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="Em_EEPROM_Dynamic" persistent="">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<CyGuid_0820c2e7-528d-4137-9a08-97257b946089 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemListSerialize" version="2">
+<dependencies>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.c" persistent="Generated_Source\PSoC5\cy_em_eeprom.c">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="SOURCE_C;CortexM3;;;" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+<CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtFileSerialize" version="3" xml_contents_version="1">
+<CyGuid_31768f72-0253-412b-af77-e7dba74d1330 type_name="CyDesigner.Common.ProjMgmt.Model.CyPrjMgmtItemSerialize" version="2" name="cy_em_eeprom.h" persistent="Generated_Source\PSoC5\cy_em_eeprom.h">
+<Hidden v="False" />
+</CyGuid_31768f72-0253-412b-af77-e7dba74d1330>
+<build_action v="HEADER;;;;" />
+<PropertyDeltas />
+</CyGuid_8b8ab257-35d3-4473-b57b-36315200b38b>
+</dependencies>
+</CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
+</CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
+<filters />
+</CyGuid_ebc4f06d-207f-49c2-a540-72acf4adabc0>
 </dependencies>
 </CyGuid_0820c2e7-528d-4137-9a08-97257b946089>
 </CyGuid_2f73275c-45bf-46ba-b3b1-00a2fe0c8dd8>
@@ -3456,8 +3482,8 @@
 </platforms>
 <project_current_platform v="c9323d49-d323-40b8-9b59-cc008d68a989" />
 <last_selected_tab v="Cypress" />
-<WriteAppVersionLastSavedWith v="4.1.0.2686" />
-<WriteAppMarketingVersionLastSavedWith v=" 4.1" />
+<WriteAppVersionLastSavedWith v="4.2.0.641" />
+<WriteAppMarketingVersionLastSavedWith v=" 4.2" />
 <project_id v="6e1f5cbb-a0ca-4f55-a1fa-7b20c5be3a3e" />
 <GenerateDescriptionFiles v="False" />
 </CyGuid_49cfd574-032a-4a64-b7be-d4eeeaf25e43>

software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.svd

@@ -6,6 +6,161 @@
   <addressUnitBits>8</addressUnitBits>
   <width>32</width>
   <peripherals>
+    <peripheral>
+      <name>SCSI_Parity_Error</name>
+      <description>No description available</description>
+      <baseAddress>0x0</baseAddress>
+      <addressBlock>
+        <offset>0</offset>
+        <size>0x0</size>
+        <usage>registers</usage>
+      </addressBlock>
+      <registers>
+        <register>
+          <name>SCSI_Parity_Error_STATUS_REG</name>
+          <description>No description available</description>
+          <addressOffset>0x40006461</addressOffset>
+          <size>8</size>
+          <access>read-write</access>
+          <resetValue>0</resetValue>
+          <resetMask>0</resetMask>
+        </register>
+        <register>
+          <name>SCSI_Parity_Error_MASK_REG</name>
+          <description>No description available</description>
+          <addressOffset>0x40006481</addressOffset>
+          <size>8</size>
+          <access>read-write</access>
+          <resetValue>0</resetValue>
+          <resetMask>0</resetMask>
+        </register>
+        <register>
+          <name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
+          <description>No description available</description>
+          <addressOffset>0x40006491</addressOffset>
+          <size>8</size>
+          <access>read-write</access>
+          <resetValue>0</resetValue>
+          <resetMask>0</resetMask>
+          <fields>
+            <field>
+              <name>FIFO0</name>
+              <description>FIFO0 clear</description>
+              <lsb>5</lsb>
+              <msb>5</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>Enable counter</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>Disable counter</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>INTRENBL</name>
+              <description>Enables or disables the Interrupt</description>
+              <lsb>4</lsb>
+              <msb>4</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>Interrupt enabled</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>Interrupt disabled</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>FIFO1LEVEL</name>
+              <description>FIFO level</description>
+              <lsb>3</lsb>
+              <msb>3</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>FIFO0LEVEL</name>
+              <description>FIFO level</description>
+              <lsb>2</lsb>
+              <msb>2</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>FIFO1CLEAR</name>
+              <description>FIFO clear</description>
+              <lsb>1</lsb>
+              <msb>1</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>Clear FIFO state</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>Normal FIFO operation</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+            <field>
+              <name>FIFO0CLEAR</name>
+              <description>FIFO clear</description>
+              <lsb>0</lsb>
+              <msb>0</msb>
+              <access>read-write</access>
+              <enumeratedValues>
+                <enumeratedValue>
+                  <name>ENABLED</name>
+                  <description>Clear FIFO state</description>
+                  <value>1</value>
+                </enumeratedValue>
+                <enumeratedValue>
+                  <name>DISABLED</name>
+                  <description>Normal FIFO operation</description>
+                  <value>0</value>
+                </enumeratedValue>
+              </enumeratedValues>
+            </field>
+          </fields>
+        </register>
+      </registers>
+    </peripheral>
     <peripheral>
       <name>Debug_Timer</name>
       <description>No description available</description>
@@ -298,31 +453,10 @@
         </register>
       </registers>
     </peripheral>
-    <peripheral>
-      <name>SCSI_Out_Ctl</name>
-      <description>No description available</description>
-      <baseAddress>0x40006478</baseAddress>
-      <addressBlock>
-        <offset>0</offset>
-        <size>0x0</size>
-        <usage>registers</usage>
-      </addressBlock>
-      <registers>
-        <register>
-          <name>SCSI_Out_Ctl_CONTROL_REG</name>
-          <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
-          <size>8</size>
-          <access>read-write</access>
-          <resetValue>0</resetValue>
-          <resetMask>0</resetMask>
-        </register>
-      </registers>
-    </peripheral>
     <peripheral>
       <name>SCSI_Glitch_Ctl</name>
       <description>No description available</description>
-      <baseAddress>0x40006477</baseAddress>
+      <baseAddress>0x0</baseAddress>
       <addressBlock>
         <offset>0</offset>
         <size>0x0</size>
@@ -332,7 +466,7 @@
         <register>
           <name>SCSI_Glitch_Ctl_CONTROL_REG</name>
           <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
+          <addressOffset>0x40006477</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
@@ -343,7 +477,7 @@
     <peripheral>
       <name>SCSI_Filtered</name>
       <description>No description available</description>
-      <baseAddress>0x40006462</baseAddress>
+      <baseAddress>0x0</baseAddress>
       <addressBlock>
         <offset>0</offset>
         <size>0x0</size>
@@ -353,7 +487,7 @@
         <register>
           <name>SCSI_Filtered_STATUS_REG</name>
           <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
+          <addressOffset>0x40006462</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
@@ -362,7 +496,7 @@
         <register>
           <name>SCSI_Filtered_MASK_REG</name>
           <description>No description available</description>
-          <addressOffset>0x20</addressOffset>
+          <addressOffset>0x40006482</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
@@ -371,7 +505,7 @@
         <register>
           <name>SCSI_Filtered_STATUS_AUX_CTL_REG</name>
           <description>No description available</description>
-          <addressOffset>0x30</addressOffset>
+          <addressOffset>0x40006492</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
@@ -496,9 +630,9 @@
       </registers>
     </peripheral>
     <peripheral>
-      <name>SCSI_Parity_Error</name>
+      <name>SCSI_Out_Ctl</name>
       <description>No description available</description>
-      <baseAddress>0x40006461</baseAddress>
+      <baseAddress>0x0</baseAddress>
       <addressBlock>
         <offset>0</offset>
         <size>0x0</size>
@@ -506,154 +640,20 @@
       </addressBlock>
       <registers>
         <register>
-          <name>SCSI_Parity_Error_STATUS_REG</name>
+          <name>SCSI_Out_Ctl_CONTROL_REG</name>
           <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
+          <addressOffset>0x40006478</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
           <resetMask>0</resetMask>
         </register>
-        <register>
-          <name>SCSI_Parity_Error_MASK_REG</name>
-          <description>No description available</description>
-          <addressOffset>0x20</addressOffset>
-          <size>8</size>
-          <access>read-write</access>
-          <resetValue>0</resetValue>
-          <resetMask>0</resetMask>
-        </register>
-        <register>
-          <name>SCSI_Parity_Error_STATUS_AUX_CTL_REG</name>
-          <description>No description available</description>
-          <addressOffset>0x30</addressOffset>
-          <size>8</size>
-          <access>read-write</access>
-          <resetValue>0</resetValue>
-          <resetMask>0</resetMask>
-          <fields>
-            <field>
-              <name>FIFO0</name>
-              <description>FIFO0 clear</description>
-              <lsb>5</lsb>
-              <msb>5</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>Enable counter</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>Disable counter</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>INTRENBL</name>
-              <description>Enables or disables the Interrupt</description>
-              <lsb>4</lsb>
-              <msb>4</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>Interrupt enabled</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>Interrupt disabled</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>FIFO1LEVEL</name>
-              <description>FIFO level</description>
-              <lsb>3</lsb>
-              <msb>3</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>FIFO0LEVEL</name>
-              <description>FIFO level</description>
-              <lsb>2</lsb>
-              <msb>2</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>FIFO1CLEAR</name>
-              <description>FIFO clear</description>
-              <lsb>1</lsb>
-              <msb>1</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>Clear FIFO state</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>Normal FIFO operation</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-            <field>
-              <name>FIFO0CLEAR</name>
-              <description>FIFO clear</description>
-              <lsb>0</lsb>
-              <msb>0</msb>
-              <access>read-write</access>
-              <enumeratedValues>
-                <enumeratedValue>
-                  <name>ENABLED</name>
-                  <description>Clear FIFO state</description>
-                  <value>1</value>
-                </enumeratedValue>
-                <enumeratedValue>
-                  <name>DISABLED</name>
-                  <description>Normal FIFO operation</description>
-                  <value>0</value>
-                </enumeratedValue>
-              </enumeratedValues>
-            </field>
-          </fields>
-        </register>
       </registers>
     </peripheral>
     <peripheral>
       <name>SCSI_CTL_PHASE</name>
       <description>No description available</description>
-      <baseAddress>0x40006475</baseAddress>
+      <baseAddress>0x0</baseAddress>
       <addressBlock>
         <offset>0</offset>
         <size>0x0</size>
@@ -663,7 +663,7 @@
         <register>
           <name>SCSI_CTL_PHASE_CONTROL_REG</name>
           <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
+          <addressOffset>0x40006475</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>
@@ -2912,7 +2912,7 @@
     <peripheral>
       <name>SCSI_Out_Bits</name>
       <description>No description available</description>
-      <baseAddress>0x40006578</baseAddress>
+      <baseAddress>0x0</baseAddress>
       <addressBlock>
         <offset>0</offset>
         <size>0x0</size>
@@ -2922,7 +2922,7 @@
         <register>
           <name>SCSI_Out_Bits_CONTROL_REG</name>
           <description>No description available</description>
-          <addressOffset>0x0</addressOffset>
+          <addressOffset>0x40006578</addressOffset>
           <size>8</size>
           <access>read-write</access>
           <resetValue>0</resetValue>

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cy_em_eeprom.h

@@ -0,0 +1,556 @@
+/*******************************************************************************
+* \file cy_em_eeprom.h
+* \version 2.0
+*
+* \brief
+*  This file provides the function prototypes and constants for the Emulated
+*  EEPROM middleware library.
+*
+********************************************************************************
+* Copyright 2017, Cypress Semiconductor Corporation.  All rights reserved.
+* You may use this file only in accordance with the license, terms, conditions,
+* disclaimers, and limitations in the end user license agreement accompanying
+* the software package with which this file was provided.
+*******************************************************************************/
+
+/**
+ * \mainpage Cypress Em_EEPROM Middleware Library
+ *
+ * The Emulated EEPROM provides an API that allows creating an emulated
+ * EEPROM in flash that has the ability to do wear leveling and restore
+ * corrupted data from a redundant copy. The Emulated EEPROM library is designed
+ * to be used with the Em_EEPROM component.
+ *
+ * The Cy_Em_EEPROM API is described in the following sections:
+ * - \ref group_em_eeprom_macros
+ * - \ref group_em_eeprom_data_structures
+ * - \ref group_em_eeprom_enums
+ * - \ref group_em_eeprom_functions
+ *
+ * <b>Features:</b>
+ * * EEPROM-Like Non-Volatile Storage
+ * * Easy to use Read and Write API
+ * * Optional Wear Leveling
+ * * Optional Redundant Data storage
+ *
+ * \section group_em_eeprom_configuration Configuration Considerations
+ *
+ * The Em_EEPROM operates on the top of the flash driver. The flash driver has
+ * some prerequisites for proper operation. Refer to the "Flash System 
+ * Routine (Flash)" section of the PDL API Reference Manual.
+ *
+ * <b>Initializing Emulated EEPROM in User flash</b>
+ *
+ * To initialize an Emulated EEPROM in the User flash, the EEPROM storage should
+ * be declared by the user. For the proper operation, the EEPROM storage should
+ * be aligned to the size of the flash row. An example of the EEPROM storage
+ * declaration is below (applicable for GCC and MDK compilers):
+ *
+ *      CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * The same declaration for the IAR compiler:
+ *
+ *      #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ * 
+ * Note that the name "emEeprom" is shown for reference. Any other name can be
+ * used instead. Also, note that the Em_EEPROM_PHYSICAL_SIZE constant is 
+ * generated by the PSoC Creator Em_EEPROM component and so it is instance name
+ * dependent and its prefix should be changed when the name of the component 
+ * changes. If the The Cy_Em_EEPROM middleware library is used without the 
+ * Em_EEPROM component, the user has to provide a proper size for the EEPROM 
+ * storage instead of Em_EEPROM_PHYSICAL_SIZE. The size of the EEPROM storage 
+ * can be calculated using the following equation:
+ * 
+ *  Physical size = EEPROM data size * 2 * wear leveling * (1 + redundant copy)
+ *
+ * where, 
+ *   "EEPROM data size" - the size of data the user wants to store in the 
+ *   EEPROM. The data size must divide evenly to the half of the flash row size.
+ *   "wear leveling" - the wear leveling factor (1-10).
+ *   "redundant copy" - "zero" if a redundant copy is not used, and "one" 
+ *   otherwise.
+ *
+ * The start address of the storage should be filled to the Emulated EEPROM 
+ * configuration structure and then passed to the Cy_Em_EEPROM_Init().
+ * If the Em_EEPROM component is used, the config (Em_EEPROM_config) and 
+ * context structures (Em_EEPROM_context) are defined by the component, so the
+ * user may just use that structures otherwise both of the structures need to 
+ * be provided by the user. Note that if the "Config Data in Flash"
+ * option is selected in the component, then the configuration structure should
+ * be copied to RAM to allow EEPROM storage start address update. The following 
+ * code demonstrates utilization of "Em_EEPROM_config" and "Em_EEPROM_context"
+ * Em_EEPROM component structures for Cy_Em_EEPROM middleware library 
+ * initialization:
+ *
+ *      cy_en_em_eeprom_status_t retValue;
+ *      cy_stc_eeprom_config_t config;
+ *
+ *      memcpy((void *)&config, 
+               (void *)&Em_EEPROM_config, 
+               sizeof(cy_stc_eeprom_config_t));
+ *      config.userFlashStartAddr = (uint32)emEeprom;
+ *      retValue = Cy_Em_EEPROM_Init(&config, &Em_EEPROM_context);
+ *
+ * <b>Initializing EEPROM in Emulated EEPROM flash area</b>
+ * 
+ * Initializing of the EEPROM storage in the Emulated EEPROM flash area is 
+ * identical to initializing of the EEPROM storage in the User flash with one 
+ * difference. The location of the Emulated EEPROM storage should be specified 
+ * somewhere in the EmulatedEEPROM flash area. If the Em_EEPROM component is 
+ * utilized in the project, then the respective storage 
+ * (Em_EEPROM_em_EepromStorage[]) is automatically declared by the component 
+ * if the "Use Emulated EEPROM" option is set to "Yes". The user just needs to 
+ * fill the start address of the storage to the config structure. If the
+ * Em_EEPROM component is not used, the user needs to declare the storage
+ * in the Emulated EEPROM flash area. An example of such declaration is 
+ * following (applicable for GCC and MDK compilers):
+ *
+ *      CY_SECTION(".cy_em_eeprom") CY_ALIGN(CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+ *      const uint8_t emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * The same declaration for the IAR compiler:
+ *
+ *      #pragma location = ".cy_em_eeprom"
+ *      #pragma data_alignment = CY_EM_EEPROM_FLASH_SIZEOF_ROW
+ *      const uint8 emEeprom[Em_EEPROM_PHYSICAL_SIZE] = {0u};
+ *
+ * where,
+ *   Em_EEPROM_PHYSICAL_SIZE - is a constant that is generated by the Em_EEPROM
+ *   component when the component is utilized in the project or it should be 
+ *   provided by the user. The equation for the calculation of the constant is 
+ *   shown above.
+ *
+ * Note that the size of the Emulated EEPROM flash area is limited. Refer to the
+ * specific device datasheet for the value of the available EEPROM Emulation 
+ * area.
+ *
+ * \section group_em_eeprom_more_information More Information
+ * See the Em_EEPROM Component datasheet.
+ *
+ *
+ * \section group_em_eeprom_MISRA MISRA-C Compliance
+ *
+ * The Cy_Em_EEPROM library has the following specific deviations:
+ *
+ * <table class="doxtable">
+ *   <tr>
+ *     <th>MISRA Rule</th>
+ *     <th>Rule Class (Required/Advisory)</th>
+ *     <th>Rule Description</th>
+ *     <th>Description of Deviation(s)</th>
+ *   </tr>
+ *   <tr>
+ *     <td>11.4</td>
+ *     <td>A</td>
+ *     <td>The cast should not be performed between a pointer to the object type
+ *         and a different pointer to the object type.</td>
+ *     <td>The cast from the object type and a different pointer to the object 
+ *         was used intentionally because of the performance reasons.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>14.2</td>
+ *     <td>R</td>
+ *     <td>All non-null statements shall either have at least one side-effect,
+ *         however executed, or cause control flow to change.</td>
+ *     <td>To maintain common codebase, some variables, unused for a specific 
+ *         device, are casted to void to prevent generation of an unused variable
+ *         compiler warning.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>16.7</td>
+ *     <td>A</td>
+ *     <td>The object addressed by the pointer parameter is not modified and so
+ *          the pointer could be of type 'pointer to const'.</td>
+ *     <td>The warning is generated because of the pointer dereferencing to
+ *         address which makes the MISRA checker think the data is not
+ *         modified.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>17.4</td>
+ *     <td>R</td>
+ *     <td>The array indexing shall be the only allowed form of pointer 
+ *         arithmetic.</td>
+ *     <td>The pointer arithmetic used in several places on the Cy_Em_EEPROM
+ *         implementation is safe and preferred because it increases the code
+ *         flexibility.</td>
+ *   </tr>
+ *   <tr>
+ *     <td>19.7</td>
+ *     <td>A</td>
+ *     <td>A function shall be used in preference to a function-like macro.</td>
+ *     <td>Macro is used because of performance reasons.</td>
+ *   </tr>
+ * </table>
+ *
+ * \section group_em_eeprom_changelog Changelog
+ * <table class="doxtable">
+ *   <tr><th>Version</th><th>Changes</th><th>Reason for Change</th></tr>
+ *   <tr>
+ *     <td>1.0</td>
+ *     <td>Initial Version</td>
+ *     <td></td>
+ *   </tr>
+ * </table>
+ *
+ * \defgroup group_em_eeprom_macros Macros
+ * \brief
+ * This section describes the Emulated EEPROM Macros.
+ *
+ * \defgroup group_em_eeprom_functions Functions
+ * \brief
+ * This section describes the Emulated EEPROM Function Prototypes.
+ *
+ * \defgroup group_em_eeprom_data_structures Data Structures
+ * \brief
+ * Describes the data structures defined by the Emulated EEPROM.
+ *
+ * \defgroup group_em_eeprom_enums Enumerated types
+ * \brief
+ * Describes the enumeration types defined by the Emulated EEPROM.
+ *
+ */
+
+
+#if !defined(CY_EM_EEPROM_H)
+#define CY_EM_EEPROM_H
+
+#include "cytypes.h"
+#include <stddef.h>
+#if (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6)
+    #include <cy_device_headers.h>
+    #include "syslib/cy_syslib.h"
+    #include "flash/cy_flash.h"
+#else
+    #include "CyFlash.h"
+    #include <cyfitter.h>
+#endif /* (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6) */
+
+/* The C binding of definitions if building with the C++ compiler */
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+
+/***************************************
+* Conditional Compilation Parameters
+***************************************/
+#define CY_PSOC6                                    (CYDEV_CHIP_FAMILY_USED == CYDEV_CHIP_FAMILY_PSOC6)
+
+
+/***************************************
+* Data Structure definitions
+***************************************/
+/**
+* \addtogroup group_em_eeprom_data_structures
+* \{
+*/
+
+/** EEPROM configuration structure */
+typedef struct
+{
+    /** The number of bytes to store in EEPROM */
+    uint32 eepromSize;
+
+    /** The amount of wear leveling from 1 to 10. 1 means no wear leveling
+    * is used.
+    */
+    uint32 wearLevelingFactor;
+
+    /** If not zero, a redundant copy of the Em_EEPROM is included. */
+    uint8 redundantCopy;
+
+    /** If not zero, a blocking write to flash is used. Otherwise non-blocking
+    * write is used. This parameter is used only for PSoC 6.
+    */
+    uint8 blockingWrite;
+
+    /** The start address for the EEPROM memory in the user's flash. */
+    uint32 userFlashStartAddr;
+} cy_stc_eeprom_config_t;
+
+/** \} group_em_eeprom_data_structures */
+
+/** The EEPROM context data structure. It is used to store the specific
+* EEPROM context data.
+*/
+typedef struct
+{
+    /** The pointer to the end address of EEPROM including wear leveling overhead
+    * and excluding redundant copy overhead.
+    */
+    uint32 wlEndAddr;
+
+    /** The number of flash rows allocated for the EEPROM excluding the number of
+    * rows allocated for wear leveling and redundant copy overhead.
+    */
+    uint32 numberOfRows;
+
+    /** The address of the last written EEPROM row */
+    uint32 lastWrRowAddr;
+
+    /** The number of bytes to store in EEPROM */
+    uint32 eepromSize;
+
+    /** The amount of wear leveling from 1 to 10. 1 means no wear leveling
+    * is used.
+    */
+    uint32 wearLevelingFactor;
+
+    /** If not zero, a redundant copy of the Em_EEPROM is included. */
+    uint8 redundantCopy;
+
+    /** If not zero, a blocking write to flash is used. Otherwise non-blocking
+    * write is used. This parameter is used only for PSoC 6.
+    */
+    uint8 blockingWrite;
+
+    /** The start address for the EEPROM memory in the user's flash. */
+    uint32 userFlashStartAddr;
+} cy_stc_eeprom_context_t;
+
+#if (CY_PSOC6)
+
+    #define CY_EM_EEPROM_ID                         (CY_PDL_DRV_ID(0x1BuL))  /**< Em_EEPROM PDL ID */
+    /**
+    * \addtogroup group_em_eeprom_enums
+    * \{
+    * Specifies return values meaning.
+    */
+    /** A prefix for EEPROM function error return-values */
+    #define CY_EM_EEPROM_ID_ERROR                   (uint32_t)(CY_EM_EEPROM_ID | CY_PDL_STATUS_ERROR)
+
+#else
+
+    /** A prefix for EEPROM function status codes. For non-PSoC6 devices,
+    * prefix is zero.
+    */
+    #define CY_EM_EEPROM_ID_ERROR                       (0uL)
+
+#endif /* (CY_PSOC6) */
+
+
+/***************************************
+* Enumerated Types and Parameters
+***************************************/
+
+/** EEPROM return enumeration type */
+typedef enum
+{
+    CY_EM_EEPROM_SUCCESS      = 0x00uL,                             /**< The function executed successfully */
+    CY_EM_EEPROM_BAD_PARAM    = (CY_EM_EEPROM_ID_ERROR + 1uL),      /**< The input parameter is invalid */
+    CY_EM_EEPROM_BAD_CHECKSUM = (CY_EM_EEPROM_ID_ERROR + 2uL),      /**< The data in EEPROM is corrupted */
+    CY_EM_EEPROM_BAD_DATA     = (CY_EM_EEPROM_ID_ERROR + 3uL),      /**< Failed to place the EEPROM in flash */
+    CY_EM_EEPROM_WRITE_FAIL   = (CY_EM_EEPROM_ID_ERROR + 4uL)       /**< Write to EEPROM failed */
+} cy_en_em_eeprom_status_t;
+
+/** \} group_em_eeprom_enums */
+
+
+/***************************************
+*        Function Prototypes
+***************************************/
+
+/**
+* \addtogroup group_em_eeprom_functions
+* \{
+*/
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Init(cy_stc_eeprom_config_t* config, cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Read(uint32 addr,
+                                        void * eepromData,
+                                        uint32 size,
+                                        cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Write(uint32 addr,
+                                            void * eepromData,
+                                            uint32 size,
+                                            cy_stc_eeprom_context_t * context);
+cy_en_em_eeprom_status_t Cy_Em_EEPROM_Erase(cy_stc_eeprom_context_t * context);
+uint32 Cy_Em_EEPROM_NumWrites(cy_stc_eeprom_context_t * context);
+/** \} group_em_eeprom_functions */
+
+
+/***************************************
+* API Constants
+***************************************/
+/**
+* \addtogroup group_em_eeprom_macros
+* \{
+*/
+/** Library major version */
+#define CY_EM_EEPROM_VERSION_MAJOR                  (2)
+
+/** Library minor version */
+#define CY_EM_EEPROM_VERSION_MINOR                  (0)
+
+/** Defines the maximum data length that can be stored in one flash row */
+#define CY_EM_EEPROM_EEPROM_DATA_LEN                (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)
+
+/** \} group_em_eeprom_macros */
+
+
+/***************************************
+* Macro definitions
+***************************************/
+/** \cond INTERNAL */
+
+/* Defines the size of flash row */
+#define CY_EM_EEPROM_FLASH_SIZEOF_ROW               (CY_FLASH_SIZEOF_ROW)
+
+/* Device specific flash constants */
+#if (!CY_PSOC6)
+    #define CY_EM_EEPROM_FLASH_BASE_ADDR                (CYDEV_FLASH_BASE)
+    #define CY_EM_EEPROM_FLASH_SIZE                     (CYDEV_FLASH_SIZE)
+    #define CY_EM_EEPROM_ROWS_IN_ARRAY                  (CY_FLASH_SIZEOF_ARRAY / CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+    #if (CY_PSOC3)
+        #define CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX          (0xff0000uL)
+        #define CY_EM_EEPROM_CODE_ADDR_END                  \
+                        (CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX + (CY_EM_EEPROM_FLASH_SIZE - 1u))
+        #define CY_EM_EEPROM_CODE_ADDR_MASK                 (0xffffu)
+        /* Checks if the EEPROM is in flash range */
+        #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                        (((startAddr) > CY_EM_EEPROM_CODE_MEM_CLASS_PREFIX) && \
+                         ((endAddr) <= CY_EM_EEPROM_CODE_ADDR_END))
+    #else
+        /* Checks is the EEPROM is in flash range */
+        #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                        (((startAddr) > CY_EM_EEPROM_FLASH_BASE_ADDR) && ((endAddr) <= CY_EM_EEPROM_FLASH_END_ADDR))
+    #endif /* (CY_PSOC3) */
+#else
+    #define CY_EM_EEPROM_FLASH_BASE_ADDR                (CY_FLASH_BASE)
+    #define CY_EM_EEPROM_FLASH_SIZE                     (CY_FLASH_SIZE)
+    #define CY_EM_EEPROM_EM_EEPROM_BASE_ADDR            (CY_EM_EEPROM_BASE)
+    #define CY_EM_EEPROM_EM_EEPROM_SIZE                 (CY_EM_EEPROM_SIZE)
+    #define CY_EM_EEPROM_EM_EEPROM_END_ADDR             (CY_EM_EEPROM_EM_EEPROM_BASE_ADDR + CY_EM_EEPROM_EM_EEPROM_SIZE)
+    /* Checks is the EEPROM is in flash range */
+    #define CY_EM_EEPROM_IS_IN_FLASH_RANGE(startAddr, endAddr) \
+                    (((((startAddr) > CY_EM_EEPROM_FLASH_BASE_ADDR) && ((endAddr) <= CY_EM_EEPROM_FLASH_END_ADDR)) || \
+                      (((startAddr) >= CY_EM_EEPROM_EM_EEPROM_BASE_ADDR) && \
+                                                                    ((endAddr) <= CY_EM_EEPROM_EM_EEPROM_END_ADDR))))
+#endif /* (!CY_PSOC6) */
+
+#define CY_EM_EEPROM_FLASH_END_ADDR                 (CY_EM_EEPROM_FLASH_BASE_ADDR + CY_EM_EEPROM_FLASH_SIZE)
+
+/* Defines the length of EEPROM data that can be stored in Em_EEPROM header */
+#define CY_EM_EEPROM_HEADER_DATA_LEN                ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) - 16u)
+
+#define CY_EM_EEPROM_ADDR_IN_RANGE                  (1u)
+
+/* Return CY_EM_EEPROM_ADDR_IN_RANGE if addr exceeded the upper range of
+* EEPROM. The wear leveling overhead is included in the range but redundant copy
+* is excluded.
+*/
+#define CY_EM_EEPROM_IS_ADDR_EXCEED_RANGE(addr, endEepromAddr) \
+                                    (((addr) >= (endEepromAddr)) ? (0u) : (CY_EM_EEPROM_ADDR_IN_RANGE))
+
+/* Check to see if the specified address is present in the EEPROM */
+#define CY_EM_EEPROM_IS_ADDR_IN_RANGE(addr, startEepromAddr, endEepromAddr) \
+                                    (((addr) > (startEepromAddr)) ? \
+                                    (((addr) < (endEepromAddr)) ? (CY_EM_EEPROM_ADDR_IN_RANGE) : (0u)) : (0u))
+
+/* Check if the EEPROM address locations from startAddr1 to endAddr1
+* are crossed with EEPROM address locations from startAddr2 to endAddr2.
+*/
+#define CY_EM_EEPROM_IS_ADDRESES_CROSSING(startAddr1, endAddr1 , startAddr2, endAddr2) \
+                                    (((startAddr1) > (startAddr2)) ? (((startAddr1) >= (endAddr2)) ? (0u) : (1u) ) : \
+                                    (((startAddr2) >= (endAddr1)) ? (0u) : (1u)))
+
+/* Return the pointer to the start of the redundant copy of the EEPROM */
+#define CY_EM_EEPROM_GET_REDNT_COPY_ADDR_BASE(numRows, wearLeveling, eepromStartAddr) \
+                                    ((((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW) * (wearLeveling)) + (eepromStartAddr))
+
+/* Return the number of the row in EM_EEPROM which contains an address defined by
+* rowAddr.
+ */
+#define CY_EM_EEPROM_GET_ACT_ROW_NUM_FROM_ADDR(rowAddr, maxRows, eepromStartAddr) \
+                                    ((((rowAddr) - (eepromStartAddr)) / CY_EM_EEPROM_FLASH_SIZEOF_ROW) % (maxRows))
+
+
+/** Returns the size allocated for the EEPROM excluding wear leveling and
+* redundant copy overhead.
+*/
+#define CY_EM_EEPROM_GET_EEPROM_SIZE(numRows)       ((numRows) * CY_EM_EEPROM_FLASH_SIZEOF_ROW)
+
+/* Check if the given address belongs to the EEPROM address of the row
+* specified by rowNum.
+*/
+#define CY_EM_EEPROM_IS_ADDR_IN_ROW_RANGE(addr, rowNum) \
+                                    (((addr) < ((rowNum) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u))) ? (0u) : \
+                                    (((addr) > ((((rowNum) + 1u) * (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)) - 1u)) ? \
+                                    (0u) : (1u)))
+
+/* CRC-8 constants */
+#define CY_EM_EEPROM_CRC8_POLYNOM                   ((uint8)(0x31u))
+#define CY_EM_EEPROM_CRC8_POLYNOM_LEN               (8u)
+#define CY_EM_EEPROM_CRC8_SEED                      (0xFFu)
+#define CY_EM_EEPROM_CRC8_XOR_VAL                   ((uint8) (0x80u))
+
+#define CY_EM_EEPROM_CALCULATE_CRC8(crc)            \
+                  ((CY_EM_EEPROM_CRC8_XOR_VAL == ((crc) & CY_EM_EEPROM_CRC8_XOR_VAL)) ? \
+                  ((uint8)(((uint8)((uint8)((crc) << 1u))) ^ CY_EM_EEPROM_CRC8_POLYNOM)) : ((uint8)((crc) << 1u)))
+
+#define CY_EM_EEPROM_GET_SEQ_NUM(addr)                (*(uint32*)(addr))
+
+/** \endcond */
+
+/**
+* \addtogroup group_em_eeprom_macros
+* \{
+*/
+
+/** Calculate the number of flash rows required to create an Em_EEPROM of
+* dataSize.
+*/
+#define CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) \
+                                    (((dataSize) / (CY_EM_EEPROM_EEPROM_DATA_LEN)) + \
+                                    ((((dataSize) % (CY_EM_EEPROM_EEPROM_DATA_LEN)) != 0u) ? 1U : 0U))
+
+/** Returns the size of flash allocated for EEPROM including wear leveling and
+* redundant copy overhead.
+*/
+#define CY_EM_EEPROM_GET_PHYSICAL_SIZE(dataSize, wearLeveling, redundantCopy) \
+                                    (((CY_EM_EEPROM_GET_NUM_ROWS_IN_EEPROM(dataSize) * \
+                                    CY_EM_EEPROM_FLASH_SIZEOF_ROW) * \
+                                    (wearLeveling)) * (1uL + (redundantCopy)))
+
+/** \} group_em_eeprom_macros */
+
+
+/******************************************************************************
+* Local definitions
+*******************************************************************************/
+/** \cond INTERNAL */
+
+/* Offsets for 32-bit RAM buffer addressing */
+#define CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32         ((CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u) / 4u)
+#define CY_EM_EEPROM_HEADER_SEQ_NUM_OFFSET_U32      (0u)
+#define CY_EM_EEPROM_HEADER_ADDR_OFFSET_U32         (1u)
+#define CY_EM_EEPROM_HEADER_LEN_OFFSET_U32          (2u)
+#define CY_EM_EEPROM_HEADER_DATA_OFFSET_U32         (3u)
+#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET_U32     (CY_EM_EEPROM_EEPROM_DATA_OFFSET_U32 - 1u)
+
+/* The same offsets as above used for direct memory addressing */
+#define CY_EM_EEPROM_EEPROM_DATA_OFFSET             (CY_EM_EEPROM_FLASH_SIZEOF_ROW / 2u)
+#define CY_EM_EEPROM_HEADER_ADDR_OFFSET             (4u)
+#define CY_EM_EEPROM_HEADER_LEN_OFFSET              (8u)
+#define CY_EM_EEPROM_HEADER_DATA_OFFSET             (12u)
+#define CY_EM_EEPROM_HEADER_CHECKSUM_OFFSET         (CY_EM_EEPROM_EEPROM_DATA_OFFSET - 4u)
+
+#define CY_EM_EEPROM_U32_DIV                        (4u)
+
+/* Maximum wear leveling value */
+#define CY_EM_EEPROM_MAX_WEAR_LEVELING_FACTOR       (10u)
+
+/* Maximum allowed flash row write/erase operation duration */
+#define CY_EM_EEPROM_MAX_WRITE_DURATION_MS          (50u)
+
+/** \endcond */
+
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* CY_EM_EEPROM_H */
+
+
+/* [] END OF FILE */

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevice.h
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevice_trm.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevice_trm.h
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu.inc

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevicegnu.inc
 * OBSOLETE: Do not use this file. Use the _trm version instead.
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicegnu_trm.inc

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cydevicegnu_trm.inc
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides all of the address values for the entire PSoC device.
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydeviceiar.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydeviceiar_trm.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydeviceiar_trm.inc
 ; 
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicerv.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydevicerv.inc
 ; OBSOLETE: Do not use this file. Use the _trm version instead.
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cydevicerv_trm.inc

@@ -1,13 +1,13 @@
 ;
 ; File Name: cydevicerv_trm.inc
 ; 
-; PSoC Creator  4.1
+; PSoC Creator  4.2
 ;
 ; Description:
 ; This file provides all of the address values for the entire PSoC device.
 ;
 ;-------------------------------------------------------------------------------
-; Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+; Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 ; You may use this file only in accordance with the license, terms, conditions, 
 ; disclaimers, and limitations in the end user license agreement accompanying 
 ; the software package with which this file was provided.

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.c

@@ -2,7 +2,7 @@
 /*******************************************************************************
 * File Name: cyfitter_cfg.c
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file contains device initialization code.
@@ -10,7 +10,7 @@
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.
@@ -101,6 +101,7 @@ static void CYCONFIGCPYCODE(void *dest, const void *src, size_t n)
 #define CYCLOCKSTART_32KHZ_ERROR 2u
 #define CYCLOCKSTART_PLL_ERROR   3u
 #define CYCLOCKSTART_FLL_ERROR   4u
+#define CYCLOCKSTART_WCO_ERROR   5u
 
 
 #ifdef CY_NEED_CYCLOCKSTARTUPERROR
@@ -124,12 +125,8 @@ static void CyClockStartupError(uint8 errorCode);
 CY_CFG_UNUSED
 static void CyClockStartupError(uint8 errorCode)
 {
-    /* To remove the compiler warning if errorCode not used. */
-#if defined(CY_PSOC3) && (CY_PSOC3)
+    /* To remove the compiler warning if errorCode not used.                */
     errorCode = errorCode;
-#else
-    (void)errorCode;
-#endif /* CY_PSOC3 */
 
     /* If we have a clock startup error (bad MHz crystal, PLL lock, etc.),  */
     /* we will end up here to allow the customer to implement something to  */
@@ -403,7 +400,7 @@ void cyfitter_cfg(void)
 
 
 	/* Set Flash Cycles based on max possible frequency in case a glitch occurs during ClockSetup(). */
-	CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x01u : 0x00u));
+	CY_SET_XTND_REG8((void CYFAR *)(CYREG_CACHE_CC_CTL), (((CYDEV_INSTRUCT_CACHE_ENABLED) != 0) ? 0x61u : 0x60u));
 	/* Setup clocks based on selections from Clock DWR */
 	ClockSetup();
 	/* Set Flash Cycles based on newly configured 50.00MHz Bus Clock. */
@@ -452,7 +449,7 @@ void cyfitter_cfg(void)
 			0x4001490Du, /* Base address: 0x40014900 Count: 13 */
 			0x40014C08u, /* Base address: 0x40014C00 Count: 8 */
 			0x40014D0Bu, /* Base address: 0x40014D00 Count: 11 */
-			0x40015004u, /* Base address: 0x40015000 Count: 4 */
+			0x40015002u, /* Base address: 0x40015000 Count: 2 */
 			0x40015104u, /* Base address: 0x40015100 Count: 4 */
 		};
 
@@ -2072,9 +2069,7 @@ void cyfitter_cfg(void)
 			{0xD4u, 0x06u},
 			{0xE2u, 0x01u},
 			{0x10u, 0x03u},
-			{0x11u, 0x01u},
 			{0x1Au, 0x03u},
-			{0x1Bu, 0x01u},
 			{0x00u, 0xFFu},
 			{0x01u, 0xBFu},
 			{0x02u, 0x2Au},

software/SCSI2SD/v4/SCSI2SD.cydsn/Generated_Source/PSoC5/cyfitter_cfg.h

@@ -1,14 +1,14 @@
 /*******************************************************************************
 * File Name: cyfitter_cfg.h
 * 
-* PSoC Creator  4.1
+* PSoC Creator  4.2
 *
 * Description:
 * This file provides basic startup and mux configuration settings
 * This file is automatically generated by PSoC Creator.
 *
 ********************************************************************************
-* Copyright (c) 2007-2017 Cypress Semiconductor.  All rights reserved.
+* Copyright (c) 2007-2018 Cypress Semiconductor.  All rights reserved.
 * You may use this file only in accordance with the license, terms, conditions, 
 * disclaimers, and limitations in the end user license agreement accompanying 
 * the software package with which this file was provided.