CY8C5267AXI_LP051
0.1
CY8C52LP
8
32
USBFS
USBFS
0x40004394
0
0x1D0A
registers
USBFS_PM_USB_CR0
USB Power Mode Control Register 0
0x0
8
read-write
0
0
fsusbio_ref_en
No description available
0
0
read-write
fsusbio_pd_n
No description available
1
1
read-write
fsusbio_pd_pullup_n
No description available
2
2
read-write
USBFS_PM_ACT_CFG
Active Power Mode Configuration Register
0x11
8
read-write
0
0
USBFS_PM_STBY_CFG
Standby Power Mode Configuration Register
0x21
8
read-write
0
0
USBFS_PRT_PS
Port Pin State Register
0xE5D
8
read-write
0
0
PinState_DP
No description available
6
6
read-only
PinState_DM
No description available
7
7
read-only
USBFS_PRT_DM0
Port Drive Mode Register
0xE5E
8
read-write
0
0
DriveMode_DP
No description available
6
6
read-write
DriveMode_DM
No description available
7
7
read-write
USBFS_PRT_DM1
Port Drive Mode Register
0xE5F
8
read-write
0
0
PullUp_en_DP
No description available
6
6
read-write
PullUp_en_DM
No description available
7
7
read-write
USBFS_PRT_INP_DIS
Input buffer disable override
0xE64
8
read-write
0
0
seinput_dis_dp
No description available
6
6
read-write
seinput_dis_dm
No description available
7
7
read-write
USBFS_EP0_DR0
bmRequestType
0x1C6C
8
read-write
0
0
USBFS_EP0_DR1
bRequest
0x1C6D
8
read-write
0
0
USBFS_EP0_DR2
wValueLo
0x1C6E
8
read-write
0
0
USBFS_EP0_DR3
wValueHi
0x1C6F
8
read-write
0
0
USBFS_EP0_DR4
wIndexLo
0x1C70
8
read-write
0
0
USBFS_EP0_DR5
wIndexHi
0x1C71
8
read-write
0
0
USBFS_EP0_DR6
lengthLo
0x1C72
8
read-write
0
0
USBFS_EP0_DR7
lengthHi
0x1C73
8
read-write
0
0
USBFS_CR0
USB Control Register 0
0x1C74
8
read-write
0
0
device_address
No description available
6
0
read-only
usb_enable
No description available
7
7
read-write
USBFS_CR1
USB Control Register 1
0x1C75
8
read-write
0
0
reg_enable
No description available
0
0
read-write
enable_lock
No description available
1
1
read-write
bus_activity
No description available
2
2
read-write
trim_offset_msb
No description available
3
3
read-write
USBFS_SIE_EP1_CR0
The Endpoint1 Control Register
0x1C7A
8
read-write
0
0
USBFS_USBIO_CR0
USBIO Control Register 0
0x1C7C
8
read-write
0
0
rd
No description available
0
0
read-only
td
No description available
5
5
read-write
tse0
No description available
6
6
read-write
ten
No description available
7
7
read-write
USBFS_USBIO_CR1
USBIO Control Register 1
0x1C7E
8
read-write
0
0
dmo
No description available
0
0
read-only
dpo
No description available
1
1
read-only
usbpuen
No description available
2
2
read-write
iomode
No description available
5
5
read-write
USBFS_SIE_EP2_CR0
The Endpoint2 Control Register
0x1C8A
8
read-write
0
0
USBFS_SIE_EP3_CR0
The Endpoint3 Control Register
0x1C9A
8
read-write
0
0
USBFS_SIE_EP4_CR0
The Endpoint4 Control Register
0x1CAA
8
read-write
0
0
USBFS_SIE_EP5_CR0
The Endpoint5 Control Register
0x1CBA
8
read-write
0
0
USBFS_SIE_EP6_CR0
The Endpoint6 Control Register
0x1CCA
8
read-write
0
0
USBFS_SIE_EP7_CR0
The Endpoint7 Control Register
0x1CDA
8
read-write
0
0
USBFS_SIE_EP8_CR0
The Endpoint8 Control Register
0x1CEA
8
read-write
0
0
USBFS_BUF_SIZE
Dedicated Endpoint Buffer Size Register
0x1CF8
8
read-write
0
0
USBFS_EP_ACTIVE
Endpoint Active Indication Register
0x1CFA
8
read-write
0
0
USBFS_EP_TYPE
Endpoint Type (IN/OUT) Indication
0x1CFB
8
read-write
0
0
USBFS_USB_CLK_EN
USB Block Clock Enable Register
0x1D09
8
read-write
0
0
SCSI_Parity_Error
No description available
0x40006462
0
0x31
registers
SCSI_Parity_Error_STATUS_REG
No description available
0x0
8
read-write
0
0
SCSI_Parity_Error_MASK_REG
No description available
0x20
8
read-write
0
0
SCSI_Parity_Error_STATUS_AUX_CTL_REG
No description available
0x30
8
read-write
0
0
FIFO0
FIFO0 clear
5
5
read-write
ENABLED
Enable counter
1
DISABLED
Disable counter
0
INTRENBL
Enables or disables the Interrupt
4
4
read-write
ENABLED
Interrupt enabled
1
DISABLED
Interrupt disabled
0
FIFO1LEVEL
FIFO level
3
3
read-write
ENABLED
FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full
1
DISABLED
FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty
0
FIFO0LEVEL
FIFO level
2
2
read-write
ENABLED
FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full
1
DISABLED
FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty
0
FIFO1CLEAR
FIFO clear
1
1
read-write
ENABLED
Clear FIFO state
1
DISABLED
Normal FIFO operation
0
FIFO0CLEAR
FIFO clear
0
0
read-write
ENABLED
Clear FIFO state
1
DISABLED
Normal FIFO operation
0
SCSI_Out_Bits
No description available
0x4000657B
0
0x1
registers
SCSI_Out_Bits_CONTROL_REG
No description available
0x0
8
read-write
0
0
Debug_Timer
No description available
0x400043A3
0
0xB64
registers
Debug_Timer_GLOBAL_ENABLE
PM.ACT.CFG
0x0
8
read-write
0
0
en_timer
Enable timer/counters.
0
3
read-write
Debug_Timer_CONTROL
TMRx.CFG0
0xB5D
8
read-write
0
0
EN
Enables timer/comparator.
0
0
read-write
MODE
Mode. (0 = Timer; 1 = Comparator)
1
1
read-write
Timer
Timer mode. CNT/CMP register holds timer count value.
0
Comparator
Comparator mode. CNT/CMP register holds comparator threshold value.
1
ONESHOT
Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block.
2
2
read-write
CMP_BUFF
Buffer compare register. Compare register updates only on timer terminal count.
3
3
read-write
INV
Invert sense of TIMEREN signal
4
4
read-write
DB
Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively.
5
5
read-write
Timer
CMP and TC are output.
0
Deadband
PHI1 (instead of CMP) and PHI2 (instead of TC) are output.
1
DEADBAND_PERIOD
Deadband Period
6
7
read-write
Debug_Timer_CONTROL2
TMRx.CFG1
0xB5E
8
read-write
0
0
IRQ_SEL
Irq selection. (0 = raw interrupts; 1 = status register interrupts)
0
0
read-write
FTC
First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled.
1
1
read-write
Disable_FTC
Disable the single cycle pulse, which signifies the timer is starting.
0
Enable_FTC
Enable the single cycle pulse, which signifies the timer is starting.
1
DCOR
Disable Clear on Read (DCOR) of Status Register SR0.
2
2
read-write
DBMODE
Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND).
3
3
read-write
CLK_BUS_EN_SEL
Digital Global Clock selection.
4
6
read-write
BUS_CLK_SEL
Bus Clock selection.
7
7
read-write
Debug_Timer_CONTROL3_
TMRx.CFG2
0xB5F
8
read-write
0
0
TMR_CFG
Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ
0
1
read-write
Continuous
Timer runs while EN bit of CFG0 register is set to '1'.
0
Pulsewidth
Timer runs from positive to negative edge of TIMEREN.
1
Period
Timer runs from positive to positive edge of TIMEREN.
2
Irq
Timer runs until IRQ.
3
COD
Clear On Disable (COD). Clears or gates outputs to zero.
2
2
read-write
ROD
Reset On Disable (ROD). Resets internal state of output logic
3
3
read-write
CMP_CFG
Comparator configurations
4
6
read-write
Equal
Compare Equal
0
Less_than
Compare Less Than
1
Less_than_or_equal
Compare Less Than or Equal .
2
Greater
Compare Greater Than .
3
Greater_than_or_equal
Compare Greater Than or Equal
4
HW_EN
When set Timer Enable controls counting.
7
7
read-write
Debug_Timer_PERIOD
TMRx.PER0 - Assigned Period
0xB61
16
read-write
0
0
Debug_Timer_COUNTER
TMRx.CNT_CMP0 - Current Down Counter Value
0xB63
16
read-write
0
0
SCSI_Out_Ctl
No description available
0x40006579
0
0x1
registers
SCSI_Out_Ctl_CONTROL_REG
No description available
0x0
8
read-write
0
0
SCSI_CTL_PHASE
No description available
0x40006472
0
0x1
registers
SCSI_CTL_PHASE_CONTROL_REG
No description available
0x0
8
read-write
0
0