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258da24a7a
SCSI2SD/software/SCSI2SD/v3/SCSI2SD.cydsn/SCSI2SD.cycdx
Michael McMaster 258da24a7a Added V5.1 support, XEBEC support, and fixed some bugs.
2018-04-15 22:10:01 +10:00

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<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
<block name="SD_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_TX_DMA_COMPLETE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="timer_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Debug_Timer" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="TimerHW" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="Debug_Timer_GLOBAL_ENABLE" address="0x400043A3" bitWidth="8" desc="PM.ACT.CFG" hidden="false">
<field name="en_timer" from="3" to="0" access="RW" resetVal="" desc="Enable timer/counters." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL" address="0x40004F00" bitWidth="8" desc="TMRx.CFG0" hidden="false">
<field name="EN" from="0" to="0" access="RW" resetVal="" desc="Enables timer/comparator." hidden="false" />
<field name="MODE" from="1" to="1" access="RW" resetVal="" desc="Mode. (0 = Timer; 1 = Comparator)" hidden="false">
<value name="Timer" value="0" desc="Timer mode. CNT/CMP register holds timer count value." />
<value name="Comparator" value="1" desc="Comparator mode. CNT/CMP register holds comparator threshold value." />
</field>
<field name="ONESHOT" from="2" to="2" access="RW" resetVal="" desc="Timer stops upon reaching stop condition defined by TMR_CFG bits. Can be restarted by asserting TIMER RESET or disabling and re-enabling block." hidden="false" />
<field name="CMP_BUFF" from="3" to="3" access="RW" resetVal="" desc="Buffer compare register. Compare register updates only on timer terminal count." hidden="false" />
<field name="INV" from="4" to="4" access="RW" resetVal="" desc="Invert sense of TIMEREN signal" hidden="false" />
<field name="DB" from="5" to="5" access="RW" resetVal="" desc="Deadband mode--Deadband phases phi1 and phi2 are outputted on CMP and TC output pins respectively." hidden="false">
<value name="Timer" value="0" desc="CMP and TC are output." />
<value name="Deadband" value="1" desc="PHI1 (instead of CMP) and PHI2 (instead of TC) are output." />
</field>
<field name="DEADBAND_PERIOD" from="7" to="6" access="RW" resetVal="" desc="Deadband Period" hidden="false" />
</register>
<register name="Debug_Timer_CONTROL2" address="0x40004F01" bitWidth="8" desc="TMRx.CFG1" hidden="false">
<field name="IRQ_SEL" from="0" to="0" access="RW" resetVal="" desc="Irq selection. (0 = raw interrupts; 1 = status register interrupts)" hidden="false" />
<field name="FTC" from="1" to="1" access="RW" resetVal="" desc="First Terminal Count (FTC). Setting this bit forces a single pulse on the TC pin when first enabled." hidden="false">
<value name="Disable FTC" value="0" desc="Disable the single cycle pulse, which signifies the timer is starting." />
<value name="Enable FTC" value="1" desc="Enable the single cycle pulse, which signifies the timer is starting." />
</field>
<field name="DCOR" from="2" to="2" access="RW" resetVal="" desc="Disable Clear on Read (DCOR) of Status Register SR0." hidden="false" />
<field name="DBMODE" from="3" to="3" access="RW" resetVal="" desc="Deadband mode (asynchronous/synchronous). CMP output pin is also affected when not in deadband mode (CFG0.DEADBAND)." hidden="false" />
<field name="CLK_BUS_EN_SEL" from="6" to="4" access="RW" resetVal="" desc="Digital Global Clock selection." hidden="false" />
<field name="BUS_CLK_SEL" from="7" to="7" access="RW" resetVal="" desc="Bus Clock selection." hidden="false" />
</register>
<register name="Debug_Timer_CONTROL3_" address="0x40004F02" bitWidth="8" desc="TMRx.CFG2" hidden="false">
<field name="TMR_CFG" from="1" to="0" access="RW" resetVal="" desc="Timer configuration (MODE = 0): 000 = Continuous; 001 = Pulsewidth; 010 = Period; 011 = Stop on IRQ" hidden="false">
<value name="Continuous" value="0" desc="Timer runs while EN bit of CFG0 register is set to '1'." />
<value name="Pulsewidth" value="1" desc="Timer runs from positive to negative edge of TIMEREN." />
<value name="Period" value="10" desc="Timer runs from positive to positive edge of TIMEREN." />
<value name="Irq" value="11" desc="Timer runs until IRQ." />
</field>
<field name="COD" from="2" to="2" access="RW" resetVal="" desc="Clear On Disable (COD). Clears or gates outputs to zero." hidden="false" />
<field name="ROD" from="3" to="3" access="RW" resetVal="" desc="Reset On Disable (ROD). Resets internal state of output logic" hidden="false" />
<field name="CMP_CFG" from="6" to="4" access="RW" resetVal="" desc="Comparator configurations" hidden="false">
<value name="Equal" value="0" desc="Compare Equal " />
<value name="Less than" value="1" desc="Compare Less Than " />
<value name="Less than or equal" value="10" desc="Compare Less Than or Equal ." />
<value name="Greater" value="11" desc="Compare Greater Than ." />
<value name="Greater than or equal" value="100" desc="Compare Greater Than or Equal " />
</field>
<field name="HW_EN" from="7" to="7" access="RW" resetVal="" desc="When set Timer Enable controls counting." hidden="false" />
</register>
<register name="Debug_Timer_PERIOD" address="0x40004F04" bitWidth="16" desc="TMRx.PER0 - Assigned Period" hidden="false" />
<register name="Debug_Timer_COUNTER" address="0x40004F06" bitWidth="16" desc="TMRx.CNT_CMP0 - Current Down Counter Value" hidden="false" />
</block>
<block name="SCSI_Out_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Out_Ctl_CONTROL_REG" address="0x40006478" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SCSI_TX_DMA" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Debug_Timer_Interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Clock_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Glitch_Ctl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Glitch_Ctl_CONTROL_REG" address="0x40006477" bitWidth="8" desc="" hidden="false" />
</block>
<block name="mux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_SEL_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="GlitchFilter_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Filtered" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Filtered_STATUS_REG" address="0x40006462" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_MASK_REG" address="0x40006482" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Filtered_STATUS_AUX_CTL_REG" address="0x40006492" bitWidth="8" desc="" hidden="false">
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="ENABLED" value="1" desc="Enable counter" />
<value name="DISABLED" value="0" desc="Disable counter" />
</field>
<field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
<value name="ENABLED" value="1" desc="Interrupt enabled" />
<value name="DISABLED" value="0" desc="Interrupt disabled" />
</field>
<field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
<field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
</register>
</block>
<block name="SCSI_Parity_Error" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Parity_Error_STATUS_REG" address="0x40006461" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_MASK_REG" address="0x40006481" bitWidth="8" desc="" hidden="false" />
<register name="SCSI_Parity_Error_STATUS_AUX_CTL_REG" address="0x40006491" bitWidth="8" desc="" hidden="false">
<field name="FIFO0" from="5" to="5" access="RW" resetVal="" desc="FIFO0 clear" hidden="false">
<value name="ENABLED" value="1" desc="Enable counter" />
<value name="DISABLED" value="0" desc="Disable counter" />
</field>
<field name="INTRENBL" from="4" to="4" access="RW" resetVal="" desc="Enables or disables the Interrupt" hidden="false">
<value name="ENABLED" value="1" desc="Interrupt enabled" />
<value name="DISABLED" value="0" desc="Interrupt disabled" />
</field>
<field name="FIFO1LEVEL" from="3" to="3" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO0LEVEL" from="2" to="2" access="RW" resetVal="" desc="FIFO level" hidden="false">
<value name="ENABLED" value="1" desc="FIFO LVL: input mode: FIFO at least 1/2 empty; output mode: FIFO at least 1/2 full" />
<value name="DISABLED" value="0" desc="FIFO LVL: input mode: FIFO not full; output mode: FIFO not empty" />
</field>
<field name="FIFO1CLEAR" from="1" to="1" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
<field name="FIFO0CLEAR" from="0" to="0" access="RW" resetVal="" desc="FIFO clear" hidden="false">
<value name="ENABLED" value="1" desc="Clear FIFO state" />
<value name="DISABLED" value="0" desc="Normal FIFO operation" />
</field>
</register>
</block>
<block name="Clock_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cydff_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="cy_constant_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_In" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="OddParityGen_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_SCK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_CS" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="CFG_EEPROM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_CTL_PHASE" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_CTL_PHASE_CONTROL_REG" address="0x40006475" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SD_Data_Clk" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Out_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_In_DBx" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_DAT1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_DAT2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_CD" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="USBFS" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true" hidden="false">
<block name="ep_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ep_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ep_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ep_0" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ep_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="dp_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="arb_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Dm" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="USB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Dp" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="sof_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="bus_reset" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<register name="POWER_CTRL" address="0x40006008" bitWidth="32" desc="Power Control Register" hidden="true">
<field name="VBUS_VALID_OVR" from="1" to="0" access="RW" resetVal="" desc="Overrides the value received from the GPIO input buffer connected to VBUS" hidden="false">
<value name="FORCE_VALID_0" value="00" desc="Force vbus_valid = 0." />
<value name="FORCE_VALID_1" value="01" desc="Force vbus_valid = 1." />
<value name="GPIO_VALID" value="10" desc="Use vbus_valid signal from GPIO input." />
<value name="PHY_VALID" value="11" desc="Use vbus_valid signal from PHY detector." />
</field>
<field name="SUSPEND" from="2" to="2" access="RW" resetVal="" desc="Put PHY into Suspend mode. If the PHY is enabled, this bit MUST be set before entering a low power mode (DeepSleep/Hibernate)." hidden="false" />
<field name="SUSPEND_DEL" from="3" to="3" access="RW" resetVal="" desc="Delayed version of SUSPEND. Always set SUSPEND and SUSPEND_DEL together in a single register write. When taking PHY out of suspend mode, first clear SUSPEND, then clear SUSPEND_DEL at least 2us later." hidden="false" />
<field name="ISOLATE" from="4" to="4" access="RW" resetVal="" desc="Isolates the PHY outputs. Clear this bit at least 2us after vbus is known to be valid (vbus_valid=1). Isolation will be forced when vbus_valid goes low (see VBUS_VALID_OVR)." hidden="false" />
<field name="CHDET_PWR_CTL" from="6" to="5" access="RW" resetVal="" desc="Power programmability for bandgap voltage buffer in the charger detect block. See s8bg_vrefbuf public cell for more information. Default '0' is low power mode." hidden="false" />
<field name="ENABLE_DM_PULLDOWN" from="26" to="26" access="RW" resetVal="" desc="Enables the ~15k pull down on the DM, default off. The 15k pull down is needed for Data Contact Detection (DCD)." hidden="false" />
<field name="ENABLE_VBUS_PULLDOWN" from="26" to="26" access="RW" resetVal="" desc="Enables the weak pull down on the VBUS, default on, to prevent floating node crow bar currents." hidden="false" />
<field name="ENABLE_RCVR" from="27" to="27" access="RW" resetVal="" desc="Enables the differential USB receiver." hidden="false" />
<field name="ENABLE_DPO" from="28" to="28" access="RW" resetVal="" desc="Enables the single ended receiver on D+." hidden="false" />
<field name="ENABLE_DMO" from="29" to="29" access="RW" resetVal="" desc="Enables the signle ended receiver on D-." hidden="false" />
<field name="ENABLE_CHGDET" from="30" to="30" access="RW" resetVal="" desc="Enables the charger detection circuitry. After USB has connected, this circuitry can be disabled to save power." hidden="false" />
<field name="ENABLE" from="31" to="31" access="RW" resetVal="" desc="Mast enable of PHY and Charger Detector. Nothing will work until this bit is set." hidden="false" />
</register>
<register name="CR0" address="0x40006008" bitWidth="8" desc="USB Control 0 Register" hidden="false">
<field name="DEVICE_ADDRESS" from="6" to="0" access="R" resetVal="" desc="These bits specify the USB device address to which the SIE will respond. This address must be set by firmware and is specified by the USB Host with a SET ADDRESS command during USB enumeration. This value must be programmed by firmware when assigned during enumeration. It is not set automatically by the hardware." hidden="false" />
<field name="USB_ENABLE" from="7" to="7" access="RW" resetVal="" desc="This bit enables the device to respond to USB traffic." hidden="false">
<value name="Disabled" value="0" desc="Block responds to USB traffic." />
<value name="Enabled" value="1" desc="Block does not respond to USB traffic." />
</field>
</register>
<register name="INTR_CAUSE_HIGH" address="0x40006008" bitWidth="32" desc="High priority interrupt Cause register" hidden="true">
<field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
<field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
<field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
<field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
<field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
<field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
<field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
</register>
<register name="LPM_STAT" address="0x40006008" bitWidth="32" desc="LPM Status register" hidden="true">
<field name="LPM_BESL" from="3" to="0" access="RW" resetVal="" desc="Best Effort Service Latency. This value should match either the Baseline (DeepSleep) or Deep (Hibernate) BESL in the BOS descriptor." hidden="false" />
<field name="LPM_REMOTEWAKE" from="4" to="4" access="RW" resetVal="" desc="LPM ACK response enable (if LPM_EN=1), to allow firmware to refuse a low power request." hidden="false">
<value name="Prohibited" value="0" desc="Device is prohibited from initiating a remote wake." />
<value name="Allowed" value="1" desc="Device is allow to wake the host." />
</field>
</register>
<register name="INTR_LVL_SEL" address="0x40006008" bitWidth="32" desc="Select interrupt level for each interrupt source" hidden="true">
<field name="SOF_LVL_SEL" from="1" to="0" access="RW" resetVal="" desc="USB SOF Interrupt level select." hidden="false" />
<field name="BUS_RESET_LVL_SEL" from="3" to="2" access="RW" resetVal="" desc="BUS RESET Interrupt level select." hidden="false" />
<field name="EP0_LVL_SEL" from="5" to="4" access="RW" resetVal="" desc="EP0 Interrupt level select." hidden="false" />
<field name="LPM_LVL_SEL" from="7" to="6" access="RW" resetVal="" desc="LPM Interrupt level select." hidden="false" />
<field name="RESUME_LVL_SEL" from="9" to="8" access="RW" resetVal="" desc="Resume Interrupt level select." hidden="false" />
<field name="ARB_EP_LVL_SEL" from="15" to="14" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt level select." hidden="false" />
<field name="EP1_LVL_SEL" from="17" to="16" access="RW" resetVal="" desc="EP1 Interrupt level select." hidden="false" />
<field name="EP2_LVL_SEL" from="19" to="18" access="RW" resetVal="" desc="EP2 Interrupt level select." hidden="false" />
<field name="EP3_LVL_SEL" from="21" to="20" access="RW" resetVal="" desc="EP3 Interrupt level select." hidden="false" />
<field name="EP4_LVL_SEL" from="23" to="22" access="RW" resetVal="" desc="EP4 Interrupt level select." hidden="false" />
<field name="EP5_LVL_SEL" from="25" to="24" access="RW" resetVal="" desc="EP5 Interrupt level select." hidden="false" />
<field name="EP6_LVL_SEL" from="27" to="26" access="RW" resetVal="" desc="EP6 Interrupt level select." hidden="false" />
<field name="EP7_LVL_SEL" from="29" to="28" access="RW" resetVal="" desc="EP7 Interrupt level select." hidden="false" />
<field name="EP8_LVL_SEL" from="31" to="30" access="RW" resetVal="" desc="EP8 Interrupt level select." hidden="false" />
</register>
<register name="CHGDET_CTRL" address="0x40006008" bitWidth="32" desc="Charger Detection Control Register" hidden="true">
<field name="COMP_DP" from="0" to="0" access="RW" resetVal="" desc="Connect the primary/secondary detection comparator and current sink to D+." hidden="false" />
<field name="COMP_DM" from="1" to="1" access="RW" resetVal="" desc="Connect the primary/secondary detection comparator and current sink to D-." hidden="false" />
<field name="COMP_EN" from="2" to="2" access="RW" resetVal="" desc="Enable the primary/secondary detection comparator and current sink. This bit can be written concurrently with COMP_DP/COMP_DM. Note that REF_EN must also be 1 for the comparator to work (because it receives a reference from it)." hidden="false" />
<field name="REF_DP" from="3" to="3" access="RW" resetVal="" desc="Connect the primary/secondary detection reference driver to D+." hidden="false" />
<field name="REF_DM" from="4" to="4" access="RW" resetVal="" desc="Connect the primary/secondary detection reference driver to D-." hidden="false" />
<field name="REF_EN" from="5" to="5" access="RW" resetVal="" desc="Enable the primary/secondary reference driver. This bit can be written concurrently with REF_DP/REF_DM." hidden="false" />
<field name="DCD_SRC_EN" from="6" to="6" access="RW" resetVal="" desc="Enable the Data Contact Detect current source on D+." hidden="false" />
<field name="ADFT_CTRL" from="13" to="12" access="RW" resetVal="" desc="ADFT option to bring out buffered version of voltage reference input or adft intput to ADFT output (adft_out)." hidden="false">
<value name="ADFT_NORMAL" value="00" desc="Normal operating mode, reference buffer used to generate internal references. adft_out pulled low." />
<value name="ADFT_VBG" value="01" desc="Use reference buffer to bring out voltage reference input (vbg) onto adft_out." />
<value name="ADFT_DONTUSE" value="10" desc="Illegal - do not use." />
<value name="ADFT_ADFTIN" value="11" desc="Use reference buffer to bring out buffered version of system level adft input (adft_in) onto adft_out." />
</field>
<field name="COMP_OUT" from="31" to="31" access="RW" resetVal="" desc="Output of the primary/secondary detection comparator. This output is not filtered or debounced and must be polled in software." hidden="false" />
</register>
<register name="LPM_CTRL" address="0x40006008" bitWidth="32" desc="LPM Control Register" hidden="true">
<field name="LPM_EN" from="0" to="0" access="RW" resetVal="" desc="LPM enable." hidden="false">
<value name="Disable" value="0" desc="LPM token will not get a response (backward compatibility mode)." />
<value name="Enable" value="1" desc="LPM token will get a handshake response (ACK, STALL, NYET or NAK). A STALL will be sent if the bLinkState is not 0001b. A NYET, NAK or ACK response will be sent depending on the NYET_EN and LPM_ACK_RESP bits below." />
</field>
<field name="LPM_ACK_RESP" from="1" to="1" access="RW" resetVal="" desc="LPM ACK response enable (if LPM_EN=1), to allow firmware to refuse a low power request." hidden="false">
<value name="NYET_NACK" value="0" desc="A LPM token will get a NYET or NAK (depending on NYET_EN bit below) response and the device will NOT go to a low power mode." />
<value name="ACK" value="1" desc="A LPM token will get an ACK response and the device will go to the requested low power mode." />
</field>
<field name="NYET_EN" from="2" to="2" access="RW" resetVal="" desc="Allow firmware to choose which response to use for an LPM token (LPM_EN=1) when the device is NOT ready to go to the requested low power mode (LPM_ACK_RESP=0)." hidden="false">
<value name="NYET" value="0" desc="A LPM token will get an NAK response (indicating a CRC error), the host is expected to repeat the LPM token." />
<value name="NACK" value="1" desc="A LPM token will get a NYET response." />
</field>
<field name="SUB_RESP" from="4" to="4" access="RW" resetVal="" desc="Enable a STALL response for all undefined SubPIDs, i.e. other than LPM (0011b). If not enabled then there will be no response (Error) for the undefined SubPIDs." hidden="false" />
</register>
<register name="INTR_SIE_MASK" address="0x40006008" bitWidth="32" desc="USB SOF, BUS RESET and EP0 Interrupt Mask" hidden="true">
<field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
<field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
<field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
<field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
<field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
</register>
<register name="INTR_CAUSE_LO" address="0x40006008" bitWidth="32" desc="Low priority interrupt Cause register" hidden="true">
<field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
<field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
<field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
<field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
<field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
<field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
<field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
</register>
<register name="INTR_CAUSE_MED" address="0x40006008" bitWidth="32" desc="Medium priority interrupt Cause register" hidden="true">
<field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
<field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
<field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
<field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
<field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
<field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
<field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
<field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
</register>
<register name="`INTR_SIE" address="0x40006008" bitWidth="32" desc="USB SOF, BUS RESET and EP0 Interrupt Status" hidden="true">
<field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
<field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
<field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
<field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
<field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
</register>
<register name="CR1" address="0x40006009" bitWidth="8" desc="USB Control 1 Register" hidden="false">
<field name="REG_ENABLE" from="0" to="0" access="R" resetVal="" desc="This bit controls the operation of the internal USB regulator. For applications with supply voltages in the 5V range this bit is set high to enable the internal regulator. For device supply voltage in the 3.3V range this bit is cleared to connect the transceiver directly to the supply." hidden="false">
<value name="Disabled" value="0" desc="Regulator for 5V is disabled." />
<value name="Enabled" value="1" desc="Regulator for 5V is enabled." />
</field>
<field name="ENABLE_LOCK" from="1" to="1" access="RW" resetVal="" desc="This bit is set to turn on the automatic frequency locking of the internal oscillator to USB traffic. Unless an external clock is being provided this bit should remain set for proper USB operation." hidden="false" />
<field name="BUS_ACTIVITY" from="2" to="2" access="RW" resetVal="" desc="The Bus Activity bit is a stickybit that detects any non-idle USB event that has occurred on the USB bus. Once set to High by the SIE to indicate the bus activity this bit retains its logical High value until firmware clears it." hidden="false" />
<field name="TRIM_OFFSET_MSB" from="3" to="3" access="RW" resetVal="" desc="This bit enables trim bit[7]." hidden="false" />
</register>
<register name="SIE_EP_INT_EN" address="0x4000600A" bitWidth="8" desc="USB SIE Data Endpoints Interrupt Enable Register" hidden="false">
<field name="EP1_INTR_EN" from="0" to="0" access="RW" resetVal="" desc="Enables interrupt for EP1." hidden="false" />
<field name="EP2_INTR_EN" from="1" to="1" access="RW" resetVal="" desc="Enables interrupt for EP2." hidden="false" />
<field name="EP3_INTR_EN" from="2" to="2" access="RW" resetVal="" desc="Enables interrupt for EP3." hidden="false" />
<field name="EP4_INTR_EN" from="3" to="3" access="RW" resetVal="" desc="Enables interrupt for EP4." hidden="false" />
<field name="EP5_INTR_EN" from="4" to="4" access="RW" resetVal="" desc="Enables interrupt for EP5." hidden="false" />
<field name="EP6_INTR_EN" from="5" to="5" access="RW" resetVal="" desc="Enables interrupt for EP6." hidden="false" />
<field name="EP7_INTR_EN" from="6" to="6" access="RW" resetVal="" desc="Enables interrupt for EP7." hidden="false" />
<field name="EP8_INTR_EN" from="7" to="7" access="RW" resetVal="" desc="Enables interrupt for EP8." hidden="false" />
</register>
<register name="SIE_EP_INT_SR" address="0x4000600B" bitWidth="8" desc="SIE Data Endpoint Interrupt Status Register" hidden="false">
<field name="EP1_INTR" from="0" to="0" access="RW" resetVal="" desc="Interrupt status for EP1." hidden="false" />
<field name="EP2_INTR" from="1" to="1" access="RW" resetVal="" desc="Interrupt status for EP2." hidden="false" />
<field name="EP3_INTR" from="2" to="2" access="RW" resetVal="" desc="Interrupt status for EP3." hidden="false" />
<field name="EP4_INTR" from="3" to="3" access="RW" resetVal="" desc="Interrupt status for EP4." hidden="false" />
<field name="EP5_INTR" from="4" to="4" access="RW" resetVal="" desc="Interrupt status for EP5." hidden="false" />
<field name="EP6_INTR" from="5" to="5" access="RW" resetVal="" desc="Interrupt status for EP6." hidden="false" />
<field name="EP7_INTR" from="6" to="6" access="RW" resetVal="" desc="Interrupt status for EP7." hidden="false" />
<field name="EP8_INTR" from="7" to="7" access="RW" resetVal="" desc="Interrupt status for EP8." hidden="false" />
</register>
<register name="SIE_EP1_CNT0" address="0x4000600C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP1_CNT1" address="0x4000600D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP1_CR0" address="0x4000600E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="USBIO_CR0" address="0x40006010" bitWidth="8" desc="USBIO Control 0 Register" hidden="false">
<field name="RD" from="0" to="0" access="R" resetVal="" desc="Received Data. This read only bit gives the state of the USB differential receiver." hidden="false">
<value name="DIFF_LOW" value="0" desc="D+ less than D- (K state), or D+=D-=0 (SE0)." />
<value name="DIFF_HIGH" value="1" desc="D+ greater than D- (J state)." />
</field>
<field name="TD" from="5" to="5" access="RW" resetVal="" desc="Transmit Data. Transmit a USB J or K state on the USB bus. No effect if TEN=0 or TSE0=1." hidden="false">
<value name="DIFF_K" value="0" desc="Force USB K state (D+ is low D- is high)." />
<value name="DIFF_J" value="1" desc="Force USB J state (D+ is high D- is low)." />
</field>
<field name="TSE0" from="6" to="6" access="RW" resetVal="" desc="Transmit Single-Ended Zero. SE0: both D+ and D- low. No effect if TEN=0." hidden="false" />
<field name="TEN" from="7" to="7" access="RW" resetVal="" desc="USB Transmit Enable. This is used to manually transmit on the D+ and D- pins. Normally this bit should be cleared to allow the internal SIE to drive the pins. The most common reason for manually transmitting is to force a resume state on the bus." hidden="false" />
</register>
<register name="USBIO_CR1" address="0x40006012" bitWidth="8" desc="USBIO Control 1 Register" hidden="false">
<field name="DMO" from="0" to="0" access="R" resetVal="" desc="This read only bit gives the state of the D- pin." hidden="false" />
<field name="DPO" from="1" to="1" access="R" resetVal="" desc="This read only bit gives the state of the D+ pin." hidden="false" />
<field name="USBPUEN" from="2" to="2" access="RW" resetVal="" desc="This bit enables the connection of the internal 1.5 k pull up resistor on the D+ pin." hidden="false" />
<field name="IOMODE" from="5" to="5" access="RW" resetVal="" desc="This bit allows the D+ and D- pins to be configured for either USB mode or bit-banged modes. If this bit is set the DMI and DPI bits are used to drive the D- and D+ pins." hidden="false">
<value name="Bit-banged" value="0" desc="Bit-banged mode for Dm and Dp." />
<value name="USB" value="1" desc="USB block controls Dm and Dp." />
</field>
</register>
<register name="DYN_RECONFIG" address="0x40006014" bitWidth="8" desc="USB Dynamic reconfiguration Register" hidden="true">
<field name="DYN_CONFIG_EN" from="0" to="0" access="RW" resetVal="" desc="This bit is used to enable the dynamic re-configuration for the selected EP. If set to 1, indicates the reconfiguration required for selected EP. Use 0 for EP1, 1 for EP2, etc." hidden="false" />
<field name="DYN_RECONFIG_EPNO" from="3" to="1" access="RW" resetVal="" desc="These bits indicates the EP number for which reconfiguration is required when dyn_config_en bit is set to 1." hidden="false" />
<field name="DYN_RECONFIG_RDY_STS" from="4" to="4" access="R" resetVal="" desc="This bit indicates the ready status for the dynamic reconfiguration, when set to 1, indicates the block is ready for reconfiguration." hidden="false" />
</register>
<register name="SIE_EP2_CNT0" address="0x4000601C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP2_CNT1" address="0x4000601D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP2_CR0" address="0x4000601E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="EP0_CR" address="0x40006028" bitWidth="8" desc="Endpoint0 control Register" hidden="false">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="EP0_CNT" address="0x40006029" bitWidth="8" desc="Endpoint0 control Register" hidden="false">
<field name="BYTE_COUNT" from="3" to="0" access="RW" resetVal="" desc="These bits indicate the number of data bytes in a transaction. For IN transactions firmware loads the count with the number of bytes to be transmitted to the host from the endpoint FIFO. Valid values are 0 to 8. For OUT or SETUP transactions the count is updated by hardware to the number of data bytes received plus two for the CRC bytes. Valid values are 2 to 10." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="This bit is used for OUT/SETUP transactions only and is read only. It is cleared to '0' if CRC bit stuffing errors or PID errors occur. This bit does not update for some endpoint mode settings." hidden="false">
<value name="DATA_ERROR" value="0" desc="No ACK'd transactions since bit was last cleared." />
<value name="DATA_VALID" value="1" desc="Indicates a transaction ended with an ACK." />
</field>
<field name="DATA_TOGGLE" from="5" to="5" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP3_CNT0" address="0x4000602C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP3_CNT1" address="0x4000602D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP3_CR0" address="0x4000602E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="SIE_EP4_CNT0" address="0x4000603C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP4_CNT1" address="0x4000603D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP4_CR0" address="0x4000603E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="SIE_EP5_CNT0" address="0x4000604C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP5_CNT1" address="0x4000604D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP5_CR0" address="0x4000604E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="SIE_EP6_CNT0" address="0x4000605C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP6_CNT1" address="0x4000605D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP6_CR0" address="0x4000605E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="SIE_EP7_CNT0" address="0x4000606C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP7_CNT1" address="0x4000606D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP7_CR0" address="0x4000606E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="SIE_EP8_CNT0" address="0x4000607C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
<field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
<field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
<field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
</register>
<register name="SIE_EP8_CNT1" address="0x4000607D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
<field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter. The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
</register>
<register name="SIE_EP8_CR0" address="0x4000607E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
<field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
<value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
<value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
<value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
<value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
<value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
<value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Stall." />
<value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
<value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
<value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
<value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT: Accept data." />
<value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
<value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
<value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
</field>
<field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
<field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
<field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
<field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
</register>
<register name="ARB_EP1_CFG" address="0x40006080" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP1_INT_EN" address="0x40006081" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP1_INT_SR" address="0x40006082" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW1_WA" address="0x40006084" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW1_WA_MSB" address="0x40006085" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW1_RA" address="0x40006086" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW1_RA_MSB" address="0x40006087" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="BUF_SIZE" address="0x4000608C" bitWidth="8" desc="Dedicated Endpoint Buffer Size Register" hidden="true">
<field name="IN_BUF" from="3" to="0" access="RW" resetVal="" desc="Buffer size for IN Endpoints: 1 - 2 bytes, 2 - 4 bytes; 9 - 512 bytes." hidden="false" />
<field name="OUT_BUF" from="7" to="4" access="RW" resetVal="" desc="Buffer size for OUT Endpoints: 1 - 2 bytes, 2 - 4 bytes; 9 - 512 bytes." hidden="false" />
</register>
<register name="EP_ACTIVE" address="0x4000608E" bitWidth="8" desc="Endpoint Active Indication Register" hidden="true">
<field name="EP1_ACT" from="0" to="0" access="R" resetVal="" desc="Indicates that EP1 is currently active" hidden="false" />
<field name="EP2_ACT" from="1" to="1" access="R" resetVal="" desc="Indicates that EP2 is currently active" hidden="false" />
<field name="EP3_ACT" from="2" to="2" access="R" resetVal="" desc="Indicates that EP3 is currently active" hidden="false" />
<field name="EP4_ACT" from="3" to="3" access="R" resetVal="" desc="Indicates that EP4 is currently active" hidden="false" />
<field name="EP5_ACT" from="4" to="4" access="R" resetVal="" desc="Indicates that EP5 is currently active" hidden="false" />
<field name="EP6_ACT" from="5" to="5" access="R" resetVal="" desc="Indicates that EP6 is currently active6" hidden="false" />
<field name="EP7_ACT" from="6" to="6" access="R" resetVal="" desc="Indicates that EP7 is currently active" hidden="false" />
<field name="EP8_ACT" from="7" to="7" access="R" resetVal="" desc="Indicates that EP8 is currently active" hidden="false" />
</register>
<register name="EP_TYPE" address="0x4000608F" bitWidth="8" desc="Endpoint Type (IN/OUT) Indication" hidden="true">
<field name="EP1_TYP" from="0" to="0" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP2_TYP" from="1" to="1" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP3_TYP" from="2" to="2" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP4_TYP" from="3" to="3" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP5_TYP" from="4" to="4" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP6_TYP" from="5" to="5" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP7_TYP" from="6" to="6" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
<field name="EP8_TYP" from="7" to="7" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
<value name="EP_IN" value="0" desc="IN outpoint." />
<value name="EP_OUT" value="1" desc="OUT outpoint." />
</field>
</register>
<register name="ARB_EP2_CFG" address="0x40006090" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP2_INT_EN" address="0x40006091" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP2_INT_SR" address="0x40006092" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW2_WA" address="0x40006094" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW2_WA_MSB" address="0x40006095" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW2_RA" address="0x40006096" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW2_RA_MSB" address="0x40006097" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_CFG" address="0x4000609C" bitWidth="8" desc="Arbiter configuration register" hidden="false">
<field name="AUTO_MEM" from="4" to="4" access="RW" resetVal="" desc="Enables Auto Memory Configuration. Manual memory configuration by default." hidden="false" />
<field name="DMA_CFG" from="6" to="5" access="RW" resetVal="" desc="DMA Access Configuration." hidden="false">
<value name="DMA_NONE" value="00" desc="No DMA." />
<value name="DMA_MANUAL" value="01" desc="Manual DMA." />
<value name="DMA_AUTO" value="10" desc="Auto DMA." />
</field>
<field name="CFG_CMP" from="7" to="7" access="RW" resetVal="" desc="Register Configuration Complete Indication. Posedge is detected on this bit. Hence a 0 to 1 transition is required." hidden="false" />
</register>
<register name="USB_CLK_EN" address="0x4000609D" bitWidth="8" desc="USB Control 0 Register" hidden="false">
<field name="CSR_CLK_EN" from="7" to="7" access="RW" resetVal="" desc="Clock Enable for Core Logic clocked by AHB bus clock." hidden="false">
<value name="Disabled" value="0" desc="Disables clock to UBS block." />
<value name="Enabled" value="1" desc="Enables clock to UBS block." />
</field>
</register>
<register name="ARB_INT_EN" address="0x4000609E" bitWidth="8" desc="Arbiter Interrupt Enable Register" hidden="false">
<field name="EP1_INTR_EN" from="0" to="0" access="RW" resetVal="" desc="Enables interrupt for EP1." hidden="false" />
<field name="EP2_INTR_EN" from="1" to="1" access="RW" resetVal="" desc="Enables interrupt for EP2." hidden="false" />
<field name="EP3_INTR_EN" from="2" to="2" access="RW" resetVal="" desc="Enables interrupt for EP3." hidden="false" />
<field name="EP4_INTR_EN" from="3" to="3" access="RW" resetVal="" desc="Enables interrupt for EP4." hidden="false" />
<field name="EP5_INTR_EN" from="4" to="4" access="RW" resetVal="" desc="Enables interrupt for EP5." hidden="false" />
<field name="EP6_INTR_EN" from="5" to="5" access="RW" resetVal="" desc="Enables interrupt for EP6." hidden="false" />
<field name="EP7_INTR_EN" from="6" to="6" access="RW" resetVal="" desc="Enables interrupt for EP7." hidden="false" />
<field name="EP8_INTR_EN" from="7" to="7" access="RW" resetVal="" desc="Enables interrupt for EP8." hidden="false" />
</register>
<register name="ARB_INT_SR" address="0x4000609F" bitWidth="8" desc="Arbiter Interrupt Status" hidden="false">
<field name="EP1_INTR" from="0" to="0" access="R" resetVal="" desc="Interrupt status for EP1." hidden="false" />
<field name="EP2_INTR" from="1" to="1" access="R" resetVal="" desc="Interrupt status for EP2." hidden="false" />
<field name="EP3_INTR" from="2" to="2" access="R" resetVal="" desc="Interrupt status for EP3." hidden="false" />
<field name="EP4_INTR" from="3" to="3" access="R" resetVal="" desc="Interrupt status for EP4." hidden="false" />
<field name="EP5_INTR" from="4" to="4" access="R" resetVal="" desc="Interrupt status for EP5." hidden="false" />
<field name="EP6_INTR" from="5" to="5" access="R" resetVal="" desc="Interrupt status for EP6." hidden="false" />
<field name="EP7_INTR" from="6" to="6" access="R" resetVal="" desc="Interrupt status for EP7." hidden="false" />
<field name="EP8_INTR" from="7" to="7" access="R" resetVal="" desc="Interrupt status for EP8." hidden="false" />
</register>
<register name="ARB_EP3_CFG" address="0x400060A0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP3_INT_EN" address="0x400060A1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP3_INT_SR" address="0x400060A2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW3_WA" address="0x400060A4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW3_WA_MSB" address="0x400060A5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW3_RA" address="0x400060A6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW3_RA_MSB" address="0x400060A7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="CWA" address="0x400060AC" bitWidth="8" desc="Common Area Write Address LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for Common Area." hidden="false" />
</register>
<register name="CWA_MSB" address="0x400060AD" bitWidth="8" desc="Common Area Write Address LSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for Common Area MSB." hidden="false" />
</register>
<register name="ARB_EP4_CFG" address="0x400060B0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP4_INT_EN" address="0x400060B1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP4_INT_SR" address="0x400060B2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW4_WA" address="0x400060B4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW4_WA_MSB" address="0x400060B5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW4_RA" address="0x400060B6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW4_RA_MSB" address="0x400060B7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="DMA_THRES" address="0x400060BC" bitWidth="8" desc="DMA Burst / Threshold Configuration LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="DMA Threshold count." hidden="false" />
</register>
<register name="DMA_THRES_MSB" address="0x400060BD" bitWidth="8" desc="DMA Burst / Threshold Configuration LSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="DMA Threshold count MSB." hidden="false" />
</register>
<register name="ARB_EP5_CFG" address="0x400060C0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP5_INT_EN" address="0x400060C1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP5_INT_SR" address="0x400060C2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW5_WA" address="0x400060C4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW5_WA_MSB" address="0x400060C5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW5_RA" address="0x400060C6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW5_RA_MSB" address="0x400060C7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="BUS_RST_CNT" address="0x400060CC" bitWidth="8" desc="Bus Reset Count Register" hidden="true">
<field name="BUS_RST_CNT" from="3" to="0" access="RW" resetVal="" desc="Bus Reset Count Length. Bus Reset Count register ; For USB bus reset length; The value in this register determines the no. of pulses of the low freq. clock which will be counted to determine if an SE0 condition has been held for long enough to declare a USB Bus reset condition. In krypton, 3 pulses of a 32 KHz clock were counted to declare a usb bus reset condition. In leopard, a 100 KHz clock is used. Recommended is to count 10 pulses of this clock to remain equivalent to Krypton." hidden="false" />
</register>
<register name="ARB_EP6_CFG" address="0x400060D0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP6_INT_EN" address="0x400060D1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP6_INT_SR" address="0x400060D2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW6_WA" address="0x400060D4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW6_WA_MSB" address="0x400060D5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW6_RA" address="0x400060D6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW6_RA_MSB" address="0x400060D7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_EP7_CFG" address="0x400060E0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP7_INT_EN" address="0x400060E1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP7_INT_SR" address="0x400060E2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW7_WA" address="0x400060E4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW7_WA_MSB" address="0x400060E5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW7_RA" address="0x400060E6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW7_RA_MSB" address="0x400060E7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_EP8_CFG" address="0x400060F0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
<field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
<field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
<field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
<field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
</register>
<register name="ARB_EP8_INT_EN" address="0x400060F1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_EP8_INT_SR" address="0x400060F2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
<field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
<field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
<field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
<field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
<field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
<field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
</register>
<register name="ARB_RW8_WA" address="0x400060F4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
<field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
</register>
<register name="ARB_RW8_WA_MSB" address="0x400060F5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
<field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW8_RA" address="0x400060F6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
<field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
<register name="ARB_RW8_RA_MSB" address="0x400060F7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
<field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
</register>
</block>
<block name="SD_MISO" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SDCard" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="BSPIM" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</block>
<block name="SCSI_Out_Bits" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
<register name="SCSI_Out_Bits_CONTROL_REG" address="0x40006578" bitWidth="8" desc="" hidden="false" />
</block>
<block name="SCSI_Out_Mux" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="Bootloadable_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="LED1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="not_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_CLK" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SD_MOSI" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="scsiTarget" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_RST_ISR" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
<block name="SCSI_Noise" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</blockRegMap>
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