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 vlib work 
vmap work work

echo "Compiling Core Verilog UNISIM/Behavioral model"
vlog -work work ../../../PrefetchDataRAM.v 
vcom -work work ../../example_design/PrefetchDataRAM_exdes.vhd

echo "Compiling Test Bench Files"

vcom -work work    ../bmg_tb_pkg.vhd
vcom -work work    ../random.vhd
vcom -work work    ../data_gen.vhd
vcom -work work    ../addr_gen.vhd
vcom -work work    ../checker.vhd
vcom -work work    ../bmg_stim_gen.vhd
vcom -work work    ../PrefetchDataRAM_synth.vhd 
vcom -work work    ../PrefetchDataRAM_tb.vhd


vlog -work work $env(XILINX)/verilog/src/glbl.v
vsim  -novopt -t ps -L XilinxCoreLib_ver -L unisims_ver glbl work.PrefetchDataRAM_tb

#Disabled waveform to save the disk space
add log -r /*
#Ignore integer warnings at time 0
set StdArithNoWarnings 1
run 0
set StdArithNoWarnings 0

run -all
