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Warp-LC/fpga/WarpLC_ngdbuild.xrpt

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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<document OS="nt" product="ISE" version="14.7">
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="NgdBuild" timeStamp="Tue Nov 02 00:33:07 2021">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
<column stringID="value"/>
<row stringID="row" value="0">
<item stringID="variable" value="Path"/>
<item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt;C:\Xilinx\14.7\ISE_DS\common\lib\nt;C:\ispLEVER_Classic2_0\ispcpld\bin;C:\ispLEVER_Classic2_0\ispFPGA\bin\nt;C:\ispLEVER_Classic2_0\active-hdl\BIN;C:\WinAVR-20100110\bin;C:\WinAVR-20100110\utils\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files\PuTTY\;C:\Program Files (x86)\WinMerge;C:\Program Files (x86)\NVIDIA Corporation\PhysX\Common;C:\Program Files\Microchip\xc8\v2.31\bin;C:\altera\13.0sp1\modelsim_ase\win32aloem;C:\Users\Dog\AppData\Local\GitHubDesktop\bin"/>
</row>
<row stringID="row" value="1">
<item stringID="variable" value="PATHEXT"/>
<item stringID="value" value=".COM;.EXE;.BAT;.CMD;.VBS;.VBE;.JS;.JSE;.WSF;.WSH;.MSC"/>
</row>
<row stringID="row" value="2">
<item stringID="variable" value="XILINX"/>
<item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\"/>
</row>
<row stringID="row" value="3">
<item stringID="variable" value="XILINX_DSP"/>
<item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE"/>
</row>
<row stringID="row" value="4">
<item stringID="variable" value="XILINX_EDK"/>
<item stringID="value" value="C:\Xilinx\14.7\ISE_DS\EDK"/>
</row>
<row stringID="row" value="5">
<item stringID="variable" value="XILINX_PLANAHEAD"/>
<item stringID="value" value="C:\Xilinx\14.7\ISE_DS\PlanAhead"/>
</row>
</table>
<item stringID="User_EnvOs" value="OS Information">
<item stringID="User_EnvOsname" value="Microsoft Windows 7 , 64-bit"/>
<item stringID="User_EnvOsrelease" value="Service Pack 1 (build 7601)"/>
</item>
<item stringID="User_EnvHost" value="Dog-PC"/>
<table stringID="User_EnvCpu">
<column stringID="arch"/>
<column stringID="speed"/>
<row stringID="row" value="0">
<item stringID="arch" value="Intel(R) Xeon(R) CPU W3680 @ 3.33GHz"/>
<item stringID="speed" value="3316 MHz"/>
</row>
</table>
</section>
<task stringID="NGDBUILD_OPTION_SUMMARY">
<section stringID="NGDBUILD_OPTION_SUMMARY">
<item DEFAULT="None" label="-intstyle" stringID="NGDBUILD_intstyle" value="ise"/>
<item DEFAULT="None" label="-dd" stringID="NGDBUILD_output_dir" value="_ngo"/>
<item DEFAULT="None" label="-p" stringID="NGDBUILD_partname" value="xc6slx9-ftg256-2"/>
<item DEFAULT="None" label="-sd" stringID="NGDBUILD_search_path" value="ipcore_dir"/>
<item DEFAULT="None" label="-uc" stringID="NGDBUILD_ucf_file" value="PLL.ucf"/>
</section>
</task>
<task stringID="NGDBUILD_REPORT">
<section stringID="NGDBUILD_DESIGN_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_ERRORS" value="0"/>
<item dataType="int" stringID="NGDBUILD_FILTERED_WARNINGS" value="0"/>
<item dataType="int" stringID="NGDBUILD_NUM_WARNINGS" value="13"/>
<item dataType="int" stringID="NGDBUILD_FILTERED_INFOS" value="0"/>
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
</section>
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_BUFG" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_BUFIO2FB" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="40"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="26"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUFG" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="3"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT1" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="32"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="6"/>
<item dataType="int" stringID="NGDBUILD_NUM_MUXCY" value="8"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="38"/>
<item dataType="int" stringID="NGDBUILD_NUM_ODDR2" value="5"/>
<item dataType="int" stringID="NGDBUILD_NUM_RAM128X1D" value="20"/>
<item dataType="int" stringID="NGDBUILD_NUM_RAMB16BWER" value="28"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
</section>
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_BUFG" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_BUFIO2FB" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="40"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDR" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="26"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUFG" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="3"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT1" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT2" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT3" value="32"/>
<item dataType="int" stringID="NGDBUILD_NUM_LUT6" value="6"/>
<item dataType="int" stringID="NGDBUILD_NUM_MUXCY" value="8"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="38"/>
<item dataType="int" stringID="NGDBUILD_NUM_ODDR2" value="5"/>
<item dataType="int" stringID="NGDBUILD_NUM_PLL_ADV" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_RAMB16BWER" value="28"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
</section>
<section stringID="NGDBUILD_CORE_SUMMARY">
<item COUNT="1" stringID="NGDBUILD_CORE" value="dist_mem_gen_v7_2, Xilinx CORE Generator 14.7"/>
<section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
<section stringID="NGDBUILD_CORE_INSTANCES">
<scope stringID="NGDBUILD_CORE_INSTANCE" value="L2WayRAM">
<item stringID="NGDBUILD_CORE_INFO" type="blk_mem_gen_v7_3" value="L2WayRAM"/>
<item c_addra_width="10" c_addrb_width="10" c_algorithm="1" c_axi_id_width="4" c_axi_slave_type="0" c_axi_type="1" c_byte_size="9" c_common_clk="1" c_default_data="0" c_disable_warn_bhv_coll="0" c_disable_warn_bhv_range="0" c_elaboration_dir="masked_value" c_enable_32bit_address="0" c_family="spartan6" c_has_axi_id="0" c_has_ena="1" c_has_enb="1" c_has_injecterr="0" c_has_mem_output_regs_a="0" c_has_mem_output_regs_b="0" c_has_mux_output_regs_a="0" c_has_mux_output_regs_b="0" c_has_regcea="0" c_has_regceb="0" c_has_rsta="0" c_has_rstb="0" c_has_softecc_input_regs_a="0" c_has_softecc_output_regs_b="0" c_init_file="BlankString" c_init_file_name="no_coe_file_loaded" c_inita_val="0" c_initb_val="0" c_interface_type="0" c_load_init_file="0" c_mem_type="2" c_mux_pipeline_stages="0" c_prim_type="1" c_read_depth_a="1024" c_read_depth_b="1024" c_read_width_a="47" c_read_width_b="47" c_rst_priority_a="CE" c_rst_priority_b="CE" c_rst_type="SYNC" c_rstram_a="0" c_rstram_b="0" c_sim_collision_check="ALL" c_use_bram_block="0" c_use_byte_wea="0" c_use_byte_web="0" c_use_default_data="0" c_use_ecc="0" c_use_softecc="0" c_wea_width="1" c_web_width="1" c_write_depth_a="1024" c_write_depth_b="1024" c_write_mode_a="READ_FIRST" c_write_mode_b="READ_FIRST" c_write_width_a="47" c_write_width_b="47" c_xdevicefamily="spartan6" stringID="NGDBUILD_CORE_PARAMETERS" value="L2WayRAM"/>
</scope>
<scope stringID="NGDBUILD_CORE_INSTANCE" value="PLL">
<item stringID="NGDBUILD_CORE_INFO" type="clk_wiz_v3_6" value="PLL"/>
<item clkin1_period="30.000" clkin2_period="30.000" clock_mgr_type="MANUAL" component_name="PLL" feedback_source="FDBK_AUTO_OFFCHIP" feedback_type="SINGLE" manual_override="false" num_out_clk="1" primtype_sel="PLL_BASE" stringID="NGDBUILD_CORE_PARAMETERS" use_clk_valid="false" use_dyn_phase_shift="false" use_dyn_reconfig="false" use_freeze="false" use_inclk_stopped="false" use_inclk_switchover="false" use_locked="true" use_max_i_jitter="false" use_min_o_jitter="true" use_phase_alignment="true" use_power_down="false" use_reset="false" use_status="false" value="PLL"/>
</scope>
<scope stringID="NGDBUILD_CORE_INSTANCE" value="PrefetchDataRAM">
<item stringID="NGDBUILD_CORE_INFO" type="blk_mem_gen_v7_3" value="PrefetchDataRAM"/>
<item c_addra_width="11" c_addrb_width="11" c_algorithm="1" c_axi_id_width="4" c_axi_slave_type="0" c_axi_type="1" c_byte_size="8" c_common_clk="1" c_default_data="0" c_disable_warn_bhv_coll="0" c_disable_warn_bhv_range="0" c_elaboration_dir="masked_value" c_enable_32bit_address="0" c_family="spartan6" c_has_axi_id="0" c_has_ena="1" c_has_enb="1" c_has_injecterr="0" c_has_mem_output_regs_a="0" c_has_mem_output_regs_b="0" c_has_mux_output_regs_a="0" c_has_mux_output_regs_b="0" c_has_regcea="0" c_has_regceb="0" c_has_rsta="0" c_has_rstb="0" c_has_softecc_input_regs_a="0" c_has_softecc_output_regs_b="0" c_init_file="BlankString" c_init_file_name="no_coe_file_loaded" c_inita_val="0" c_initb_val="0" c_interface_type="0" c_load_init_file="0" c_mem_type="2" c_mux_pipeline_stages="0" c_prim_type="1" c_read_depth_a="2048" c_read_depth_b="2048" c_read_width_a="32" c_read_width_b="32" c_rst_priority_a="CE" c_rst_priority_b="CE" c_rst_type="SYNC" c_rstram_a="0" c_rstram_b="0" c_sim_collision_check="ALL" c_use_bram_block="0" c_use_byte_wea="1" c_use_byte_web="1" c_use_default_data="0" c_use_ecc="0" c_use_softecc="0" c_wea_width="4" c_web_width="4" c_write_depth_a="2048" c_write_depth_b="2048" c_write_mode_a="READ_FIRST" c_write_mode_b="READ_FIRST" c_write_width_a="32" c_write_width_b="32" c_xdevicefamily="spartan6" stringID="NGDBUILD_CORE_PARAMETERS" value="PrefetchDataRAM"/>
</scope>
<scope stringID="NGDBUILD_CORE_INSTANCE" value="PrefetchTagRAM">
<item stringID="NGDBUILD_CORE_INFO" type="dist_mem_gen_v7_2" value="PrefetchTagRAM"/>
<item c_addr_width="7" c_default_data="0" c_depth="128" c_elaboration_dir="masked_value" c_family="spartan6" c_has_clk="1" c_has_d="1" c_has_dpo="1" c_has_dpra="1" c_has_i_ce="0" c_has_qdpo="0" c_has_qdpo_ce="0" c_has_qdpo_clk="0" c_has_qdpo_rst="0" c_has_qdpo_srst="0" c_has_qspo="0" c_has_qspo_ce="0" c_has_qspo_rst="0" c_has_qspo_srst="0" c_has_spo="1" c_has_spra="0" c_has_we="1" c_mem_init_file="no_coe_file_loaded" c_mem_type="2" c_parser_type="1" c_pipeline_stages="0" c_qce_joined="0" c_qualify_we="0" c_read_mif="0" c_reg_a_d_inputs="0" c_reg_dpra_input="0" c_sync_enable="1" c_width="20" stringID="NGDBUILD_CORE_PARAMETERS" value="PrefetchTagRAM"/>
</scope>
</section>
</section>
</section>
</task>
</application>
</document>
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