340 lines
116 KiB
XML
340 lines
116 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE twReport [
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<!ELEMENT twReport (twHead?, (twWarn | twDebug | twInfo)*, twBody, twSum?,
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twDebug*, twFoot?, twClientInfo?)>
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<!ATTLIST twReport version CDATA "10,4">
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<!ELEMENT twHead (twExecVer?, twCopyright, twCmdLine?, twDesign?, twPCF?, twDevInfo, twRptInfo, twEnvVar*)>
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<!ELEMENT twExecVer (#PCDATA)>
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<!ELEMENT twCopyright (#PCDATA)>
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<!ELEMENT twCmdLine (#PCDATA)>
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<!ELEMENT twDesign (#PCDATA)>
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<!ELEMENT twPCF (#PCDATA)>
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<!ELEMENT twDevInfo (twDevName, twSpeedGrade, twSpeedVer?)>
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<!ELEMENT twDevName (#PCDATA)>
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<!ATTLIST twDevInfo arch CDATA #IMPLIED pkg CDATA #IMPLIED>
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<!ELEMENT twSpeedGrade (#PCDATA)>
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<!ELEMENT twSpeedVer (#PCDATA)>
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<!ELEMENT twRptInfo (twItemLimit?, (twUnconst, twUnconstLimit?)?)>
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<!ATTLIST twRptInfo twRptLvl (twErr | twVerbose | twTerseErr | twSum | twTimeGrp) #REQUIRED>
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<!ATTLIST twRptInfo twAdvRpt (TRUE | FALSE) "FALSE">
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<!ATTLIST twRptInfo twTimeUnits (twPsec | twNsec | twUsec | twMsec | twSec) "twNsec">
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<!ATTLIST twRptInfo twFreqUnits (twGHz | twMHz | twHz) "twMHz">
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<!ATTLIST twRptInfo twReportMinPaths CDATA #IMPLIED>
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<!ELEMENT twItemLimit (#PCDATA)>
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<!ELEMENT twUnconst EMPTY>
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<!ELEMENT twUnconstLimit (#PCDATA)>
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<!ELEMENT twEnvVar EMPTY>
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<!ATTLIST twEnvVar name CDATA #REQUIRED>
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<!ATTLIST twEnvVar description CDATA #REQUIRED>
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<!ELEMENT twWarn (#PCDATA)>
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<!ELEMENT twInfo (#PCDATA)>
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<!ELEMENT twDebug (#PCDATA)>
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<!ELEMENT twBody (twDerating?, (twSumRpt | twVerboseRpt | twErrRpt | twTerseErrRpt | twTimeGrpRpt), twNonDedClks?)>
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<!ATTLIST twBody twFastPaths CDATA #IMPLIED>
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<!ELEMENT twDerating (twProc?, twTemp?, twVolt?)>
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<!ELEMENT twProc (#PCDATA)>
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<!ELEMENT twTemp (#PCDATA)>
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<!ELEMENT twVolt (#PCDATA)>
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<!ELEMENT twSumRpt (twConstRollupTable*, twConstList?, twConstSummaryTable?, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?)>
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<!ELEMENT twErrRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
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<!ELEMENT twTerseErrRpt (twConstList, twUnmetConstCnt?, twDataSheet?)>
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<!ELEMENT twVerboseRpt (twCycles?, (twConst | twTIG | twConstRollupTable)*, twUnmetConstCnt?, (twWarn | twInfo | twDebug)*, twDataSheet?, twTimeGrp*)>
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<!ELEMENT twCycles (twSigConn+)>
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<!ATTLIST twCycles twNum CDATA #REQUIRED>
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<!ELEMENT twSigConn (twSig, twDriver, twLoad)>
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<!ELEMENT twSig (#PCDATA)>
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<!ELEMENT twDriver (#PCDATA)>
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<!ELEMENT twLoad (#PCDATA)>
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<!ELEMENT twConst (twConstHead, ((twPathRpt?,twRacePathRpt?, twPathRptBanner?)* | (twPathRpt*, twRacePathRpt?) | twNetRpt* | twClkSkewLimit*))>
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<!ATTLIST twConst twConstType (NET |
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NETDELAY |
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NETSKEW |
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PATH |
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DEFPERIOD |
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UNCONSTPATH |
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DEFPATH |
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PATH2SETUP |
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UNCONSTPATH2SETUP |
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PATHCLASS |
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PATHDELAY |
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PERIOD |
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FREQUENCY |
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PATHBLOCK |
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OFFSET |
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OFFSETIN |
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OFFSETINCLOCK |
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UNCONSTOFFSETINCLOCK |
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OFFSETINDELAY |
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OFFSETINMOD |
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OFFSETOUT |
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OFFSETOUTCLOCK |
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UNCONSTOFFSETOUTCLOCK |
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OFFSETOUTDELAY |
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OFFSETOUTMOD| CLOCK_SKEW_LIMITS) #IMPLIED>
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<!ELEMENT twConstHead (twConstName, twItemCnt, twErrCntSetup, twErrCntEndPt?, twErrCntHold,
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twEndPtCnt?,
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twPathErrCnt?, (twMinPer| twMaxDel| twMaxFreq| twMaxNetDel| twMaxNetSkew| twMinOff| twMaxOff)*)>
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<!ELEMENT twConstName (#PCDATA)>
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<!ATTLIST twConstName UCFConstName CDATA #IMPLIED>
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<!ATTLIST twConstHead uID CDATA #IMPLIED>
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<!ELEMENT twItemCnt (#PCDATA)>
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<!ELEMENT twErrCnt (#PCDATA)>
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<!ELEMENT twErrCntEndPt (#PCDATA)>
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<!ELEMENT twErrCntSetup (#PCDATA)>
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<!ELEMENT twErrCntHold (#PCDATA)>
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<!ATTLIST twErrCntHold twRaceChecked (TRUE | FALSE) "FALSE">
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<!ELEMENT twEndPtCnt (#PCDATA)>
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<!ELEMENT twPathErrCnt (#PCDATA)>
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<!ELEMENT twMinPer (#PCDATA) >
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<!ELEMENT twFootnote EMPTY>
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<!ATTLIST twFootnote number CDATA #REQUIRED>
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<!ELEMENT twMaxDel (#PCDATA)>
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<!ELEMENT twMaxFreq (#PCDATA)>
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<!ELEMENT twMinOff (#PCDATA)>
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<!ELEMENT twMaxOff (#PCDATA)>
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<!ELEMENT twTIG (twTIGHead, (twPathRpt*,twRacePathRpt?))>
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<!ELEMENT twTIGHead (twTIGName, twInstantiated, twBlocked)>
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<!ELEMENT twTIGName (#PCDATA)>
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<!ELEMENT twInstantiated (#PCDATA)>
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<!ELEMENT twBlocked (#PCDATA)>
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<!ELEMENT twRacePathRpt (twRacePath+)>
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<!ELEMENT twPathRpt (twUnconstPath | twConstPath | twUnconstOffIn | twConstOffIn | twUnconstOffOut | twConstOffOut | twModOffOut)>
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<!ELEMENT twUnconstPath (twTotDel, twSrc, twDest, (twDel, twSUTime)?, twTotPathDel?, twClkSkew?, tw2Phase?, twClkUncert?, twDetPath?)>
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<!ATTLIST twUnconstPath twDataPathType CDATA #IMPLIED
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twSimpleMinPath CDATA #IMPLIED>
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<!ELEMENT twTotDel (#PCDATA)>
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<!ELEMENT twSrc (#PCDATA)>
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<!ATTLIST twSrc BELType CDATA #IMPLIED>
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<!ELEMENT twDest (#PCDATA)>
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<!ATTLIST twDest BELType CDATA #IMPLIED>
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<!ELEMENT twDel (#PCDATA)>
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<!ELEMENT twSUTime (#PCDATA)>
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<!ELEMENT twTotPathDel (#PCDATA)>
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<!ELEMENT twClkSkew (#PCDATA)>
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<!ATTLIST twClkSkew dest CDATA #IMPLIED src CDATA #IMPLIED>
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<!ELEMENT twConstPath (twSlack, twSrc, twDest, twTotPathDel?, twClkSkew?, twDelConst, tw2Phase?, twClkUncert?, twDetPath?)>
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<!ATTLIST twConstPath twDataPathType CDATA "twDataPathMaxDelay">
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<!ATTLIST twConstPath constType (period | fromto | unknown) "unknown">
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<!ELEMENT twSlack (#PCDATA)>
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<!ELEMENT twDelConst (#PCDATA)>
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<!ELEMENT tw2Phase EMPTY>
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<!ELEMENT twClkUncert (#PCDATA)>
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<!ATTLIST twClkUncert fSysJit CDATA #IMPLIED fInputJit CDATA #IMPLIED
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fDCMJit CDATA #IMPLIED
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fPhaseErr CDATA #IMPLIED
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sEqu CDATA #IMPLIED>
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<!ELEMENT twRacePath (twSlack, twSrc, twDest, twClkSkew, twDelConst?, twClkUncert?, twDetPath)>
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<!ELEMENT twPathRptBanner (#PCDATA)>
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<!ATTLIST twPathRptBanner sType CDATA #IMPLIED iPaths CDATA #IMPLIED iCriticalPaths CDATA #IMPLIED>
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<!ELEMENT twUnconstOffIn (twOff, twSrc, twDest, twGuaranteed?, twClkUncert?, (twDataPath, twClkPath)?)>
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<!ATTLIST twUnconstOffIn twDataPathType CDATA #IMPLIED>
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<!ELEMENT twOff (#PCDATA)>
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<!ELEMENT twGuaranteed EMPTY>
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<!ELEMENT twConstOffIn (twSlack, twSrc, twDest, ((twClkDel, twClkSrc, twClkDest) | twGuarInSetup), twOff, twOffSrc, twOffDest, twClkUncert?, (twDataPath, twClkPath)?)>
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<!ATTLIST twConstOffIn twDataPathType CDATA "twDataPathMaxDelay">
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<!ATTLIST twConstOffIn twDurationNotSpecified CDATA #IMPLIED>
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<!ELEMENT twClkDel (#PCDATA)>
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<!ELEMENT twClkSrc (#PCDATA)>
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<!ELEMENT twClkDest (#PCDATA)>
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<!ELEMENT twGuarInSetup (#PCDATA)>
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<!ELEMENT twOffSrc (#PCDATA)>
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<!ELEMENT twOffDest (#PCDATA)>
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<!ELEMENT twUnconstOffOut (twOff, twSrc, twDest, twClkUncert?, (twClkPath, twDataPath)?)>
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<!ATTLIST twUnconstOffOut twDataPathType CDATA #IMPLIED>
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<!ELEMENT twConstOffOut (twSlack, twSrc, twDest, twClkDel, twClkSrc, twClkDest, twDataDel, twDataSrc, twDataDest, twOff, twOffSrc, twOffDest, twClkUncert?, (twClkPath, twDataPath)?)>
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<!ATTLIST twConstOffOut twDataPathType CDATA "twDataPathMaxDelay">
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<!ELEMENT twDataDel (#PCDATA)>
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<!ELEMENT twDataSrc (#PCDATA)>
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<!ELEMENT twDataDest (#PCDATA)>
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<!ELEMENT twModOffOut (twSlack, twDest, twDataDel, twDataSrc, twDataDest, twClkUncert?, twDataPath?)>
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<!ELEMENT twDetPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
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<!ATTLIST twDetPath maxSiteLen CDATA #IMPLIED>
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<!ELEMENT twDataPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
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<!ATTLIST twDataPath maxSiteLen CDATA #IMPLIED>
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<!ELEMENT twClkPath (twSrc, twDest, twLogLvls, twSrcSite, twSrcClk?, twPathDel*, (twLogDel, twRouteDel, twTotDel)?, twDestClk?, (twPctLog, twPctRoute)?)>
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<!ATTLIST twClkPath maxSiteLen CDATA #IMPLIED>
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<!ELEMENT twLogLvls (#PCDATA)>
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<!ELEMENT twSrcSite (#PCDATA)>
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<!ELEMENT twSrcClk (#PCDATA)>
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<!ATTLIST twSrcClk twEdge (twRising | twFalling) "twRising">
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<!ATTLIST twSrcClk twArriveTime CDATA #IMPLIED>
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<!ATTLIST twSrcClk twClkRes CDATA #IMPLIED>
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<!ELEMENT twPathDel (twSite, twDelType, twFanCnt?, twDelInfo?, twComp, twNet?, twBEL*)>
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<!ATTLIST twPathDel twHoldTime (TRUE | FALSE) "FALSE">
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<!ELEMENT twDelInfo (#PCDATA)>
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<!ATTLIST twDelInfo twEdge (twRising | twFalling | twIndet) #REQUIRED>
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<!ATTLIST twDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
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<!ELEMENT twSite (#PCDATA)>
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<!ELEMENT twDelType (#PCDATA)>
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<!ELEMENT twFanCnt (#PCDATA)>
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<!ELEMENT twComp (#PCDATA)>
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<!ELEMENT twNet (#PCDATA)>
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<!ELEMENT twBEL (#PCDATA)>
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<!ELEMENT twLogDel (#PCDATA)>
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<!ELEMENT twRouteDel (#PCDATA)>
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<!ELEMENT twDestClk (#PCDATA)>
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<!ATTLIST twDestClk twEdge (twRising | twFalling) "twRising">
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<!ATTLIST twDestClk twArriveTime CDATA #IMPLIED>
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<!ATTLIST twDestClk twClkRes CDATA #IMPLIED>
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<!ELEMENT twPctLog (#PCDATA)>
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<!ELEMENT twPctRoute (#PCDATA)>
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<!ELEMENT twNetRpt (twDelNet | twSlackNet | twSkewNet)>
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<!ELEMENT twDelNet (twDel, twNet, twDetNet?)>
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<!ELEMENT twSlackNet (twSlack, twNet, twDel, twNotMet?, twTimeConst, twAbsSlack, twDetNet?)>
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<!ELEMENT twTimeConst (#PCDATA)>
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<!ELEMENT twAbsSlack (#PCDATA)>
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<!ELEMENT twSkewNet (twSlack, twNet, twSkew, twNotMet?, twTimeConst, twAbsSlack, twDetSkewNet?)>
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<!ELEMENT twSkew (#PCDATA)>
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<!ELEMENT twDetNet (twNetDel*)>
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<!ELEMENT twNetDel (twSrc, twDest, twNetDelInfo)>
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<!ELEMENT twNetDelInfo (#PCDATA)>
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<!ATTLIST twNetDelInfo twAcc (twRouted | twEst | twApprox) "twRouted">
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<!ELEMENT twDetSkewNet (twNetSkew*)>
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<!ELEMENT twNetSkew (twSrc, twDest, twNetDelInfo, twSkew)>
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<!ELEMENT twClkSkewLimit EMPTY>
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<!ATTLIST twClkSkewLimit slack CDATA #IMPLIED skew CDATA #IMPLIED arrv1name CDATA #IMPLIED arrv1 CDATA #IMPLIED
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arrv2name CDATA #IMPLIED arrv2 CDATA #IMPLIED uncert CDATA #IMPLIED>
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<!ELEMENT twConstRollupTable (twConstRollup*)>
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<!ATTLIST twConstRollupTable uID CDATA #IMPLIED>
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<!ELEMENT twConstRollup EMPTY>
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<!ATTLIST twConstRollup name CDATA #IMPLIED fullName CDATA #IMPLIED type CDATA #IMPLIED requirement CDATA #IMPLIED prefType CDATA #IMPLIED actual CDATA #IMPLIED>
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<!ATTLIST twConstRollup actualRollup CDATA #IMPLIED errors CDATA #IMPLIED errorRollup CDATA #IMPLIED items CDATA #IMPLIED itemsRollup CDATA #IMPLIED>
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<!ELEMENT twConstList (twConstListItem)*>
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<!ELEMENT twConstListItem (twConstName, twNotMet?, twReqVal?, twActVal?, twLogLvls?)>
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<!ATTLIST twConstListItem twUnits (twTime | twFreq) "twTime">
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<!ELEMENT twNotMet EMPTY>
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<!ELEMENT twReqVal (#PCDATA)>
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<!ELEMENT twActVal (#PCDATA)>
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<!ELEMENT twConstSummaryTable (twConstStats|twConstSummary)*>
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<!ATTLIST twConstSummaryTable twEmptyConstraints CDATA #IMPLIED>
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<!ELEMENT twConstStats (twConstName)>
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<!ATTLIST twConstStats twUnits (twTime | twFreq) "twTime">
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<!ATTLIST twConstStats twRequired CDATA #IMPLIED>
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<!ATTLIST twConstStats twActual CDATA #IMPLIED>
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<!ATTLIST twConstStats twSlack CDATA #IMPLIED>
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<!ATTLIST twConstStats twLogLvls CDATA #IMPLIED>
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<!ATTLIST twConstStats twErrors CDATA #IMPLIED>
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<!ATTLIST twConstStats twPCFIndex CDATA #IMPLIED>
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<!ATTLIST twConstStats twAbsSlackIndex CDATA #IMPLIED>
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<!ATTLIST twConstStats twTCType CDATA #IMPLIED>
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<!ELEMENT twConstSummary (twConstName, twConstData?, twConstData*)>
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<!ATTLIST twConstSummary PCFIndex CDATA #IMPLIED slackIndex CDATA #IMPLIED>
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<!ELEMENT twConstData EMPTY>
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<!ATTLIST twConstData type CDATA #IMPLIED units (MHz | ns) "ns" slack CDATA #IMPLIED
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best CDATA #IMPLIED requested CDATA #IMPLIED
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errors CDATA #IMPLIED
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score CDATA #IMPLIED>
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<!ELEMENT twTimeGrpRpt (twTimeGrp)*>
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<!ELEMENT twTimeGrp (twTimeGrpName, twCompList?, twBELList?, twMacList?, twBlockList?, twSigList?, twPinList?)>
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<!ELEMENT twTimeGrpName (#PCDATA)>
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<!ELEMENT twCompList (twCompName+)>
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<!ELEMENT twCompName (#PCDATA)>
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<!ELEMENT twSigList (twSigName+)>
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<!ELEMENT twSigName (#PCDATA)>
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<!ELEMENT twBELList (twBELName+)>
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<!ELEMENT twBELName (#PCDATA)>
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<!ELEMENT twBlockList (twBlockName+)>
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<!ELEMENT twBlockName (#PCDATA)>
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<!ELEMENT twMacList (twMacName+)>
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<!ELEMENT twMacName (#PCDATA)>
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<!ELEMENT twPinList (twPinName+)>
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<!ELEMENT twPinName (#PCDATA)>
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<!ELEMENT twUnmetConstCnt (#PCDATA)>
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<!ELEMENT twDataSheet (twSUH2ClkList*, (twClk2PadList|twClk2OutList)*, twClk2SUList*, twPad2PadList?, twOffsetTables?)>
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<!ATTLIST twDataSheet twNameLen CDATA #REQUIRED>
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<!ELEMENT twSUH2ClkList (twDest, twSUH2Clk+)>
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<!ATTLIST twSUH2ClkList twDestWidth CDATA #IMPLIED>
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<!ATTLIST twSUH2ClkList twPhaseWidth CDATA #IMPLIED>
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<!ELEMENT twSUH2Clk (twSrc, twSUHTime, twSUHTime?)>
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<!ELEMENT twSUHTime (twSU2ClkTime?,twH2ClkTime?)>
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<!ATTLIST twSUHTime twInternalClk CDATA #IMPLIED>
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<!ATTLIST twSUHTime twClkPhase CDATA #IMPLIED>
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<!ELEMENT twSU2ClkTime (#PCDATA)>
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<!ATTLIST twSU2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
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<!ELEMENT twH2ClkTime (#PCDATA)>
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<!ATTLIST twH2ClkTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
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<!ELEMENT twClk2PadList (twSrc, twClk2Pad+)>
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<!ELEMENT twClk2Pad (twDest, twTime)>
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<!ELEMENT twTime (#PCDATA)>
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<!ATTLIST twTime twEdge (twRising | twFalling | twIndet) #REQUIRED>
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<!ELEMENT twClk2OutList (twSrc, twClk2Out+)>
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<!ATTLIST twClk2OutList twDestWidth CDATA #REQUIRED>
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<!ATTLIST twClk2OutList twPhaseWidth CDATA #REQUIRED>
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<!ELEMENT twClk2Out EMPTY>
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<!ATTLIST twClk2Out twOutPad CDATA #REQUIRED>
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<!ATTLIST twClk2Out twMinTime CDATA #REQUIRED>
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<!ATTLIST twClk2Out twMinEdge CDATA #REQUIRED>
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<!ATTLIST twClk2Out twMaxTime CDATA #REQUIRED>
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<!ATTLIST twClk2Out twMaxEdge CDATA #REQUIRED>
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<!ATTLIST twClk2Out twInternalClk CDATA #REQUIRED>
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<!ATTLIST twClk2Out twClkPhase CDATA #REQUIRED>
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<!ELEMENT twClk2SUList (twDest, twClk2SU+)>
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<!ATTLIST twClk2SUList twDestWidth CDATA #IMPLIED>
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<!ELEMENT twClk2SU (twSrc, twRiseRise?, twFallRise?, twRiseFall?, twFallFall?)>
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<!ELEMENT twRiseRise (#PCDATA)>
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<!ELEMENT twFallRise (#PCDATA)>
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<!ELEMENT twRiseFall (#PCDATA)>
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<!ELEMENT twFallFall (#PCDATA)>
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<!ELEMENT twPad2PadList (twPad2Pad+)>
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<!ATTLIST twPad2PadList twSrcWidth CDATA #IMPLIED>
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<!ATTLIST twPad2PadList twDestWidth CDATA #IMPLIED>
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<!ELEMENT twPad2Pad (twSrc, twDest, twDel)>
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<!ELEMENT twOffsetTables (twOffsetInTable*,twOffsetOutTable*)>
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<!ELEMENT twOffsetInTable (twConstName, twOffInTblRow*)>
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<!ATTLIST twOffsetInTable twDestWidth CDATA #IMPLIED>
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<!ATTLIST twOffsetInTable twWorstWindow CDATA #IMPLIED>
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<!ATTLIST twOffsetInTable twWorstSetup CDATA #IMPLIED>
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<!ATTLIST twOffsetInTable twWorstHold CDATA #IMPLIED>
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<!ATTLIST twOffsetInTable twWorstSetupSlack CDATA #IMPLIED>
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<!ATTLIST twOffsetInTable twWorstHoldSlack CDATA #IMPLIED>
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<!ELEMENT twOffsetOutTable (twConstName, twOffOutTblRow*)>
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<!ATTLIST twOffsetOutTable twDestWidth CDATA #IMPLIED>
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<!ATTLIST twOffsetOutTable twMinSlack CDATA #IMPLIED>
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<!ATTLIST twOffsetOutTable twMaxSlack CDATA #IMPLIED>
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<!ATTLIST twOffsetOutTable twRelSkew CDATA #IMPLIED>
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<!ELEMENT twOffInTblRow (twSrc, twSUHSlackTime*)>
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<!ELEMENT twSUHSlackTime (twSU2ClkTime?,twH2ClkTime?)>
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<!ATTLIST twSUHSlackTime twSetupSlack CDATA #IMPLIED twHoldSlack CDATA #IMPLIED>
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<!ELEMENT twOffOutTblRow EMPTY>
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<!ATTLIST twOffOutTblRow twOutPad CDATA #IMPLIED>
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<!ATTLIST twOffOutTblRow twSlack CDATA #IMPLIED>
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<!ATTLIST twOffOutTblRow twRelSkew CDATA #IMPLIED>
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<!ELEMENT twNonDedClks ((twWarn | twInfo), twNonDedClk+)>
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<!ELEMENT twNonDedClk (#PCDATA)>
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<!ELEMENT twSum ( twErrCnt, twScore, twConstCov, twStats)>
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<!ELEMENT twScore (#PCDATA)>
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<!ELEMENT twConstCov (twPathCnt, twNetCnt, twConnCnt, twPct?)>
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<!ELEMENT twPathCnt (#PCDATA)>
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<!ELEMENT twNetCnt (#PCDATA)>
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<!ELEMENT twConnCnt (#PCDATA)>
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<!ELEMENT twPct (#PCDATA)>
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<!ELEMENT twStats ( twMinPer?, twFootnote?, twMaxFreq?, twMaxCombDel?, twMaxFromToDel?, twMaxNetDel?, twMaxNetSkew?, twMaxInAfterClk?, twMinInBeforeClk?, twMaxOutBeforeClk?, twMinOutAfterClk?, (twInfo | twWarn)*)>
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<!ELEMENT twMaxCombDel (#PCDATA)>
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<!ELEMENT twMaxFromToDel (#PCDATA)>
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<!ELEMENT twMaxNetDel (#PCDATA)>
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<!ELEMENT twMaxNetSkew (#PCDATA)>
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<!ELEMENT twMaxInAfterClk (#PCDATA)>
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<!ELEMENT twMinInBeforeClk (#PCDATA)>
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<!ELEMENT twMaxOutBeforeClk (#PCDATA)>
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<!ELEMENT twMinOutAfterClk (#PCDATA)>
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<twReport><twHead anchorID="1"><twExecVer>Release 14.7 Trace (nt)</twExecVer><twCopyright>Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.</twCopyright><twCmdLine>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt\unwrapped\trce.exe -intstyle ise -v 3 -s 2 -n
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3 -fastpaths -xml WarpLC_preroute.twx WarpLC_map.ncd -o WarpLC_preroute.twr
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WarpLC.pcf -ucf PLL.ucf
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</twCmdLine><twDesign>WarpLC_map.ncd</twDesign><twDesignPath>WarpLC_map.ncd</twDesignPath><twPCF>WarpLC.pcf</twPCF><twPcfPath>WarpLC.pcf</twPcfPath><twDevInfo arch="spartan6" pkg="ftg256"><twDevName>xc6slx9</twDevName><twDevRange>C</twDevRange><twSpeedGrade>-2</twSpeedGrade><twSpeedVer>PRODUCTION 1.23 2013-10-13</twSpeedVer><twQuadDly>1</twQuadDly></twDevInfo><twRptInfo twRptLvl="twVerbose" twReportMinPaths="true" dlyHyperLnks="t" ><twEndptLimit>3</twEndptLimit></twRptInfo><twEnvVar name="NONE" description="No environment variables were set" /></twHead><twInfo anchorID="2">INFO:Timing:2698 - No timing constraints found, doing default enumeration.</twInfo><twInfo anchorID="3">INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).</twInfo><twInfo anchorID="4">INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report.</twInfo><twInfo anchorID="5">INFO:Timing:3284 - This timing report was generated using estimated delay information. For accurate numbers, please refer to the post Place and Route timing report.</twInfo><twInfo anchorID="6">INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet.</twInfo><twBody><twVerboseRpt><twDataSheet anchorID="7" twNameLen="15"><twSUH2ClkList anchorID="8" twDestWidth="8" twPhaseWidth="6"><twDest>CLKIN</twDest><twSUH2Clk ><twSrc>FSB_A<2></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.357</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.515</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<3></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.438</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.483</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<4></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.226</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.369</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<5></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.134</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.184</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<6></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.218</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.413</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<7></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.126</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.249</twH2ClkTime></twSUHTime></twSUH2Clk><twSUH2Clk ><twSrc>FSB_A<8></twSrc><twSUHTime twInternalClk ="FSBCLK" twClkPhase ="0.000" ><twSU2ClkTime twEdge="twRising" twCrnrFst="f">11.001</twSU2ClkTime><twH2ClkTime twEdge="twRising" twCrnrFst="t">-7.261</twH2ClkTime></twSUHTime></twSUH2Clk></twSUH2ClkList><twClk2OutList anchorID="9" twDestWidth="10" twPhaseWidth="21"><twSrc>CLKIN</twSrc><twClk2Out twOutPad = "CLKFB_OUT" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "-0.063" twMaxCrnr="t" twMaxEdge ="twRising" twInternalClk="cg/pll/clkfb_bufg_out" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "CLKFB_OUT" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twFalling" twMaxTime = "-0.057" twMaxCrnr="t" twMaxEdge ="twFalling" twInternalClk="cg/pll/clkfb_bufg_out" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "CPUCLK" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "-0.063" twMaxCrnr="t" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "CPU_nSTERM" twMinTime = "2.355" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "3.670" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FPUCLK" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "-0.063" twMaxCrnr="t" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<0>" twMinTime = "3.244" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.995" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<1>" twMinTime = "3.390" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.126" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<2>" twMinTime = "3.181" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "6.440" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<3>" twMinTime = "3.333" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "6.008" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<4>" twMinTime = "3.276" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.920" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<5>" twMinTime = "2.948" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.841" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<6>" twMinTime = "2.891" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.753" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<7>" twMinTime = "2.709" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.937" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<8>" twMinTime = "2.621" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.259" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<9>" twMinTime = "2.945" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "5.550" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<10>" twMinTime = "2.838" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.510" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<11>" twMinTime = "3.028" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.669" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<12>" twMinTime = "2.934" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.696" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<13>" twMinTime = "3.334" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.745" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<14>" twMinTime = "3.257" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.637" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<15>" twMinTime = "3.434" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.498" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<16>" twMinTime = "3.301" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.334" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<17>" twMinTime = "3.623" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "6.352" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<18>" twMinTime = "3.660" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.322" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<19>" twMinTime = "3.571" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.202" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<20>" twMinTime = "3.648" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.326" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<21>" twMinTime = "3.786" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.433" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<22>" twMinTime = "3.815" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.420" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<23>" twMinTime = "3.623" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.313" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<24>" twMinTime = "3.717" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.376" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<25>" twMinTime = "3.918" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.790" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<26>" twMinTime = "3.871" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.530" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<27>" twMinTime = "3.717" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "5.307" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<28>" twMinTime = "3.721" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "5.952" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<29>" twMinTime = "4.158" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "6.358" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<30>" twMinTime = "4.471" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "6.772" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "FSB_D<31>" twMinTime = "4.207" twMinCrnr="t" twMinEdge ="twRising" twMaxTime = "6.477" twMaxCrnr="f" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "RAMCLK0" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "-0.063" twMaxCrnr="t" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out><twClk2Out twOutPad = "RAMCLK1" twMinTime = "-0.086" twMinCrnr="f" twMinEdge ="twRising" twMaxTime = "-0.063" twMaxCrnr="t" twMaxEdge ="twRising" twInternalClk="FSBCLK" twClkPhase="0.000" ></twClk2Out></twClk2OutList><twClk2SUList anchorID="10" twDestWidth="5"><twDest>CLKIN</twDest><twClk2SU><twSrc>CLKIN</twSrc><twRiseRise>5.103</twRiseRise></twClk2SU></twClk2SUList><twPad2PadList anchorID="11" twSrcWidth="9" twDestWidth="10"><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>CPU_nSTERM</twDest><twDel>14.296</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<0></twDest><twDel>16.621</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<1></twDest><twDel>16.752</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<2></twDest><twDel>17.066</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<3></twDest><twDel>16.634</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<4></twDest><twDel>16.546</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<5></twDest><twDel>16.467</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<6></twDest><twDel>16.379</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<7></twDest><twDel>16.563</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<8></twDest><twDel>15.885</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<9></twDest><twDel>16.176</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<10></twDest><twDel>16.136</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<11></twDest><twDel>16.295</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<12></twDest><twDel>16.322</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<13></twDest><twDel>16.371</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<14></twDest><twDel>16.263</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<15></twDest><twDel>16.124</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<16></twDest><twDel>15.960</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<17></twDest><twDel>16.978</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<18></twDest><twDel>15.948</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<19></twDest><twDel>15.828</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<20></twDest><twDel>15.952</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<21></twDest><twDel>16.059</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<22></twDest><twDel>16.046</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<23></twDest><twDel>15.939</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<24></twDest><twDel>16.002</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<25></twDest><twDel>16.234</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<26></twDest><twDel>16.156</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<27></twDest><twDel>15.933</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<28></twDest><twDel>16.578</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<29></twDest><twDel>16.984</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<30></twDest><twDel>17.398</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<2></twSrc><twDest>FSB_D<31></twDest><twDel>17.103</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>CPU_nSTERM</twDest><twDel>14.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<0></twDest><twDel>16.394</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<1></twDest><twDel>16.525</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<2></twDest><twDel>16.839</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<3></twDest><twDel>16.407</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<4></twDest><twDel>16.319</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<5></twDest><twDel>16.240</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<6></twDest><twDel>16.152</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<7></twDest><twDel>16.336</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<8></twDest><twDel>15.658</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<9></twDest><twDel>15.949</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<10></twDest><twDel>15.909</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<11></twDest><twDel>16.068</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<12></twDest><twDel>16.095</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<13></twDest><twDel>16.144</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<14></twDest><twDel>16.036</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<15></twDest><twDel>15.897</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<16></twDest><twDel>15.733</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<17></twDest><twDel>16.751</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<18></twDest><twDel>15.721</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<19></twDest><twDel>15.601</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<20></twDest><twDel>15.725</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<21></twDest><twDel>15.832</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<22></twDest><twDel>15.819</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<23></twDest><twDel>15.712</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<24></twDest><twDel>15.775</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<25></twDest><twDel>16.007</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<26></twDest><twDel>15.929</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<27></twDest><twDel>15.706</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<28></twDest><twDel>16.351</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<29></twDest><twDel>16.757</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<30></twDest><twDel>17.171</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<3></twSrc><twDest>FSB_D<31></twDest><twDel>16.876</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>CPU_nSTERM</twDest><twDel>13.511</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<0></twDest><twDel>15.836</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<1></twDest><twDel>15.967</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<2></twDest><twDel>16.281</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<3></twDest><twDel>15.849</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<4></twDest><twDel>15.761</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<5></twDest><twDel>15.682</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<6></twDest><twDel>15.594</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<7></twDest><twDel>15.778</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<8></twDest><twDel>15.100</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<9></twDest><twDel>15.391</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<10></twDest><twDel>15.351</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<11></twDest><twDel>15.510</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<12></twDest><twDel>15.537</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<13></twDest><twDel>15.586</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<14></twDest><twDel>15.478</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<15></twDest><twDel>15.339</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<16></twDest><twDel>15.175</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<17></twDest><twDel>16.193</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<18></twDest><twDel>15.163</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<19></twDest><twDel>15.043</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<20></twDest><twDel>15.167</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<21></twDest><twDel>15.274</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<22></twDest><twDel>15.261</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<23></twDest><twDel>15.154</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<24></twDest><twDel>15.217</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<25></twDest><twDel>15.449</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<26></twDest><twDel>15.371</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<27></twDest><twDel>15.148</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<28></twDest><twDel>15.793</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<29></twDest><twDel>16.199</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<30></twDest><twDel>16.613</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<4></twSrc><twDest>FSB_D<31></twDest><twDel>16.318</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>CPU_nSTERM</twDest><twDel>13.587</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<0></twDest><twDel>15.912</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<1></twDest><twDel>16.043</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<2></twDest><twDel>16.357</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<3></twDest><twDel>15.925</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<4></twDest><twDel>15.837</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<5></twDest><twDel>15.758</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<6></twDest><twDel>15.670</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<7></twDest><twDel>15.854</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<8></twDest><twDel>15.176</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<9></twDest><twDel>15.467</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<10></twDest><twDel>15.427</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<11></twDest><twDel>15.586</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<12></twDest><twDel>15.613</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<13></twDest><twDel>15.662</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<14></twDest><twDel>15.554</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<15></twDest><twDel>15.415</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<16></twDest><twDel>15.251</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<17></twDest><twDel>16.269</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<18></twDest><twDel>15.239</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<19></twDest><twDel>15.119</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<20></twDest><twDel>15.243</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<21></twDest><twDel>15.350</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<22></twDest><twDel>15.337</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<23></twDest><twDel>15.230</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<24></twDest><twDel>15.293</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<25></twDest><twDel>15.525</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<26></twDest><twDel>15.447</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<27></twDest><twDel>15.224</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<28></twDest><twDel>15.869</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<29></twDest><twDel>16.275</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<30></twDest><twDel>16.689</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<5></twSrc><twDest>FSB_D<31></twDest><twDel>16.394</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>CPU_nSTERM</twDest><twDel>13.527</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<0></twDest><twDel>15.852</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<1></twDest><twDel>15.983</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<2></twDest><twDel>16.297</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<3></twDest><twDel>15.865</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<4></twDest><twDel>15.777</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<5></twDest><twDel>15.698</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<6></twDest><twDel>15.610</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<7></twDest><twDel>15.794</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<8></twDest><twDel>15.116</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<9></twDest><twDel>15.407</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<10></twDest><twDel>15.367</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<11></twDest><twDel>15.526</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<12></twDest><twDel>15.553</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<13></twDest><twDel>15.602</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<14></twDest><twDel>15.494</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<15></twDest><twDel>15.355</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<16></twDest><twDel>15.191</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<17></twDest><twDel>16.209</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<18></twDest><twDel>15.179</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<19></twDest><twDel>15.059</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<20></twDest><twDel>15.183</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<21></twDest><twDel>15.290</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<22></twDest><twDel>15.277</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<23></twDest><twDel>15.170</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<24></twDest><twDel>15.233</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<25></twDest><twDel>15.465</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<26></twDest><twDel>15.387</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<27></twDest><twDel>15.164</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<28></twDest><twDel>15.809</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<29></twDest><twDel>16.215</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<30></twDest><twDel>16.629</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<6></twSrc><twDest>FSB_D<31></twDest><twDel>16.334</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>CPU_nSTERM</twDest><twDel>13.423</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<0></twDest><twDel>15.748</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<1></twDest><twDel>15.879</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<2></twDest><twDel>16.193</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<3></twDest><twDel>15.761</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<4></twDest><twDel>15.673</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<5></twDest><twDel>15.594</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<6></twDest><twDel>15.506</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<7></twDest><twDel>15.690</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<8></twDest><twDel>15.012</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<9></twDest><twDel>15.303</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<10></twDest><twDel>15.263</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<11></twDest><twDel>15.422</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<12></twDest><twDel>15.449</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<13></twDest><twDel>15.498</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<14></twDest><twDel>15.390</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<15></twDest><twDel>15.251</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<16></twDest><twDel>15.087</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<17></twDest><twDel>16.105</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<18></twDest><twDel>15.075</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<19></twDest><twDel>14.955</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<20></twDest><twDel>15.079</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<21></twDest><twDel>15.186</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<22></twDest><twDel>15.173</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<23></twDest><twDel>15.066</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<24></twDest><twDel>15.129</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<25></twDest><twDel>15.361</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<26></twDest><twDel>15.283</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<27></twDest><twDel>15.060</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<28></twDest><twDel>15.705</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<29></twDest><twDel>16.111</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<30></twDest><twDel>16.525</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<7></twSrc><twDest>FSB_D<31></twDest><twDel>16.230</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>CPU_nSTERM</twDest><twDel>13.315</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<0></twDest><twDel>15.640</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<1></twDest><twDel>15.771</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<2></twDest><twDel>16.085</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<3></twDest><twDel>15.653</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<4></twDest><twDel>15.565</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<5></twDest><twDel>15.486</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<6></twDest><twDel>15.398</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<7></twDest><twDel>15.582</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<8></twDest><twDel>14.904</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<9></twDest><twDel>15.195</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<10></twDest><twDel>15.155</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<11></twDest><twDel>15.314</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<12></twDest><twDel>15.341</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<13></twDest><twDel>15.390</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<14></twDest><twDel>15.282</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<15></twDest><twDel>15.143</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<16></twDest><twDel>14.979</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<17></twDest><twDel>15.997</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<18></twDest><twDel>14.967</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<19></twDest><twDel>14.847</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<20></twDest><twDel>14.971</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<21></twDest><twDel>15.078</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<22></twDest><twDel>15.065</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<23></twDest><twDel>14.958</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<24></twDest><twDel>15.021</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<25></twDest><twDel>15.253</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<26></twDest><twDel>15.175</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<27></twDest><twDel>14.952</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<28></twDest><twDel>15.597</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<29></twDest><twDel>16.003</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<30></twDest><twDel>16.417</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<8></twSrc><twDest>FSB_D<31></twDest><twDel>16.122</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.883</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<0></twDest><twDel>13.208</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<1></twDest><twDel>13.339</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<2></twDest><twDel>13.653</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<3></twDest><twDel>13.221</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<4></twDest><twDel>13.133</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<5></twDest><twDel>13.054</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<6></twDest><twDel>12.966</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<7></twDest><twDel>13.150</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<8></twDest><twDel>12.472</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<9></twDest><twDel>12.763</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<10></twDest><twDel>12.723</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<11></twDest><twDel>12.882</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<12></twDest><twDel>12.909</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<13></twDest><twDel>12.958</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<14></twDest><twDel>12.850</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<15></twDest><twDel>12.711</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<16></twDest><twDel>12.547</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<17></twDest><twDel>13.565</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<18></twDest><twDel>12.535</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<19></twDest><twDel>12.415</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<20></twDest><twDel>12.539</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<21></twDest><twDel>12.646</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<22></twDest><twDel>12.633</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<23></twDest><twDel>12.526</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<24></twDest><twDel>12.589</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<25></twDest><twDel>12.821</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<26></twDest><twDel>12.743</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<27></twDest><twDel>12.520</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<28></twDest><twDel>13.165</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<29></twDest><twDel>13.571</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<30></twDest><twDel>13.985</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<9></twSrc><twDest>FSB_D<31></twDest><twDel>13.690</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.887</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<0></twDest><twDel>13.212</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<1></twDest><twDel>13.343</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<2></twDest><twDel>13.657</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<3></twDest><twDel>13.225</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<4></twDest><twDel>13.137</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<5></twDest><twDel>13.058</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<6></twDest><twDel>12.970</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<7></twDest><twDel>13.154</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<8></twDest><twDel>12.476</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<9></twDest><twDel>12.767</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<10></twDest><twDel>12.727</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<11></twDest><twDel>12.886</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<12></twDest><twDel>12.913</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<13></twDest><twDel>12.962</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<14></twDest><twDel>12.854</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<15></twDest><twDel>12.715</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<16></twDest><twDel>12.551</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<17></twDest><twDel>13.569</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<18></twDest><twDel>12.539</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<19></twDest><twDel>12.419</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<20></twDest><twDel>12.543</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<21></twDest><twDel>12.650</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<22></twDest><twDel>12.637</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<23></twDest><twDel>12.530</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<24></twDest><twDel>12.593</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<25></twDest><twDel>12.825</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<26></twDest><twDel>12.747</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<27></twDest><twDel>12.524</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<28></twDest><twDel>13.169</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<29></twDest><twDel>13.575</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<30></twDest><twDel>13.989</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<10></twSrc><twDest>FSB_D<31></twDest><twDel>13.694</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.010</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<0></twDest><twDel>13.335</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<1></twDest><twDel>13.466</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<2></twDest><twDel>13.780</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<3></twDest><twDel>13.348</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<4></twDest><twDel>13.260</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<5></twDest><twDel>13.181</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<6></twDest><twDel>13.093</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<7></twDest><twDel>13.277</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<8></twDest><twDel>12.599</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<9></twDest><twDel>12.890</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<10></twDest><twDel>12.850</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<11></twDest><twDel>13.009</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<12></twDest><twDel>13.036</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<13></twDest><twDel>13.085</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<14></twDest><twDel>12.977</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<15></twDest><twDel>12.838</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<16></twDest><twDel>12.674</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<17></twDest><twDel>13.692</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<18></twDest><twDel>12.662</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<19></twDest><twDel>12.542</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<20></twDest><twDel>12.666</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<21></twDest><twDel>12.773</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<22></twDest><twDel>12.760</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<23></twDest><twDel>12.653</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<24></twDest><twDel>12.716</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<25></twDest><twDel>12.948</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<26></twDest><twDel>12.870</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<27></twDest><twDel>12.647</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<28></twDest><twDel>13.292</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<29></twDest><twDel>13.698</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<30></twDest><twDel>14.112</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<11></twSrc><twDest>FSB_D<31></twDest><twDel>13.817</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.689</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<0></twDest><twDel>13.014</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<1></twDest><twDel>13.145</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<2></twDest><twDel>13.459</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<3></twDest><twDel>13.027</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<4></twDest><twDel>12.939</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<5></twDest><twDel>12.860</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<6></twDest><twDel>12.772</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<7></twDest><twDel>12.956</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<8></twDest><twDel>12.278</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<9></twDest><twDel>12.569</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<10></twDest><twDel>12.529</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<11></twDest><twDel>12.688</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<12></twDest><twDel>12.715</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<13></twDest><twDel>12.764</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<14></twDest><twDel>12.656</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<15></twDest><twDel>12.517</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<16></twDest><twDel>12.353</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<17></twDest><twDel>13.371</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<18></twDest><twDel>12.341</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<19></twDest><twDel>12.221</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<20></twDest><twDel>12.345</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<21></twDest><twDel>12.452</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<22></twDest><twDel>12.439</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<23></twDest><twDel>12.332</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<24></twDest><twDel>12.395</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<25></twDest><twDel>12.627</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<26></twDest><twDel>12.549</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<27></twDest><twDel>12.326</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<28></twDest><twDel>12.971</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<29></twDest><twDel>13.377</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<30></twDest><twDel>13.791</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<12></twSrc><twDest>FSB_D<31></twDest><twDel>13.496</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.623</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<0></twDest><twDel>12.948</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<1></twDest><twDel>13.079</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<2></twDest><twDel>13.393</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<3></twDest><twDel>12.961</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<4></twDest><twDel>12.873</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<5></twDest><twDel>12.794</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<6></twDest><twDel>12.706</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<7></twDest><twDel>12.890</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<8></twDest><twDel>12.212</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<9></twDest><twDel>12.503</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<10></twDest><twDel>12.463</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<11></twDest><twDel>12.622</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<12></twDest><twDel>12.649</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<13></twDest><twDel>12.698</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<14></twDest><twDel>12.590</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<15></twDest><twDel>12.451</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<16></twDest><twDel>12.287</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<17></twDest><twDel>13.305</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<18></twDest><twDel>12.275</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<19></twDest><twDel>12.155</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<20></twDest><twDel>12.279</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<21></twDest><twDel>12.386</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<22></twDest><twDel>12.373</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<23></twDest><twDel>12.266</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<24></twDest><twDel>12.329</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<25></twDest><twDel>12.561</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<26></twDest><twDel>12.483</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<27></twDest><twDel>12.260</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<28></twDest><twDel>12.905</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<29></twDest><twDel>13.311</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<30></twDest><twDel>13.725</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<13></twSrc><twDest>FSB_D<31></twDest><twDel>13.430</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.788</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<0></twDest><twDel>13.113</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<1></twDest><twDel>13.244</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<2></twDest><twDel>13.558</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<3></twDest><twDel>13.126</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<4></twDest><twDel>13.038</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<5></twDest><twDel>12.959</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<6></twDest><twDel>12.871</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<7></twDest><twDel>13.055</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<8></twDest><twDel>12.377</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<9></twDest><twDel>12.668</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<10></twDest><twDel>12.628</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<11></twDest><twDel>12.787</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<12></twDest><twDel>12.814</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<13></twDest><twDel>12.863</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<14></twDest><twDel>12.755</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<15></twDest><twDel>12.616</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<16></twDest><twDel>12.452</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<17></twDest><twDel>13.470</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<18></twDest><twDel>12.440</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<19></twDest><twDel>12.320</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<20></twDest><twDel>12.444</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<21></twDest><twDel>12.551</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<22></twDest><twDel>12.538</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<23></twDest><twDel>12.431</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<24></twDest><twDel>12.494</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<25></twDest><twDel>12.726</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<26></twDest><twDel>12.648</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<27></twDest><twDel>12.425</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<28></twDest><twDel>13.070</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<29></twDest><twDel>13.476</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<30></twDest><twDel>13.890</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<14></twSrc><twDest>FSB_D<31></twDest><twDel>13.595</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.613</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<0></twDest><twDel>12.938</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<1></twDest><twDel>13.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<2></twDest><twDel>13.383</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<3></twDest><twDel>12.951</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<4></twDest><twDel>12.863</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<5></twDest><twDel>12.784</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<6></twDest><twDel>12.696</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<7></twDest><twDel>12.880</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<8></twDest><twDel>12.202</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<9></twDest><twDel>12.493</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<10></twDest><twDel>12.453</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<11></twDest><twDel>12.612</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<12></twDest><twDel>12.639</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<13></twDest><twDel>12.688</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<14></twDest><twDel>12.580</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<15></twDest><twDel>12.441</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<16></twDest><twDel>12.277</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<17></twDest><twDel>13.295</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<18></twDest><twDel>12.265</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<19></twDest><twDel>12.145</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<20></twDest><twDel>12.269</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<21></twDest><twDel>12.376</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<22></twDest><twDel>12.363</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<23></twDest><twDel>12.256</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<24></twDest><twDel>12.319</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<25></twDest><twDel>12.551</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<26></twDest><twDel>12.473</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<27></twDest><twDel>12.250</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<28></twDest><twDel>12.895</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<29></twDest><twDel>13.301</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<30></twDest><twDel>13.715</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<15></twSrc><twDest>FSB_D<31></twDest><twDel>13.420</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.423</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<0></twDest><twDel>13.748</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<1></twDest><twDel>13.879</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<2></twDest><twDel>14.193</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<3></twDest><twDel>13.761</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<4></twDest><twDel>13.673</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<5></twDest><twDel>13.594</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<6></twDest><twDel>13.506</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<7></twDest><twDel>13.690</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<8></twDest><twDel>13.012</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<9></twDest><twDel>13.303</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<10></twDest><twDel>13.263</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<11></twDest><twDel>13.422</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<12></twDest><twDel>13.449</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<13></twDest><twDel>13.498</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<14></twDest><twDel>13.390</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<15></twDest><twDel>13.251</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<16></twDest><twDel>13.087</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<17></twDest><twDel>14.105</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<18></twDest><twDel>13.075</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<19></twDest><twDel>12.955</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<20></twDest><twDel>13.079</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<21></twDest><twDel>13.186</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<22></twDest><twDel>13.173</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<23></twDest><twDel>13.066</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<24></twDest><twDel>13.129</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<25></twDest><twDel>13.361</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<26></twDest><twDel>13.283</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<27></twDest><twDel>13.060</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<28></twDest><twDel>13.705</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<29></twDest><twDel>14.111</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<30></twDest><twDel>14.525</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<16></twSrc><twDest>FSB_D<31></twDest><twDel>14.230</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.557</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<0></twDest><twDel>13.882</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<1></twDest><twDel>14.013</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<2></twDest><twDel>14.327</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<3></twDest><twDel>13.895</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<4></twDest><twDel>13.807</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<5></twDest><twDel>13.728</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<6></twDest><twDel>13.640</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<7></twDest><twDel>13.824</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<8></twDest><twDel>13.146</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<9></twDest><twDel>13.437</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<10></twDest><twDel>13.397</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<11></twDest><twDel>13.556</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<12></twDest><twDel>13.583</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<13></twDest><twDel>13.632</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<14></twDest><twDel>13.524</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<15></twDest><twDel>13.385</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<16></twDest><twDel>13.221</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<17></twDest><twDel>14.239</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<18></twDest><twDel>13.209</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<19></twDest><twDel>13.089</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<20></twDest><twDel>13.213</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<21></twDest><twDel>13.320</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<22></twDest><twDel>13.307</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<23></twDest><twDel>13.200</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<24></twDest><twDel>13.263</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<25></twDest><twDel>13.495</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<26></twDest><twDel>13.417</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<27></twDest><twDel>13.194</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<28></twDest><twDel>13.839</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<29></twDest><twDel>14.245</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<30></twDest><twDel>14.659</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<17></twSrc><twDest>FSB_D<31></twDest><twDel>14.364</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.135</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<0></twDest><twDel>13.460</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<1></twDest><twDel>13.591</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<2></twDest><twDel>13.905</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<3></twDest><twDel>13.473</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<4></twDest><twDel>13.385</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<5></twDest><twDel>13.306</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<6></twDest><twDel>13.218</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<7></twDest><twDel>13.402</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<8></twDest><twDel>12.724</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<9></twDest><twDel>13.015</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<10></twDest><twDel>12.975</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<11></twDest><twDel>13.134</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<12></twDest><twDel>13.161</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<13></twDest><twDel>13.210</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<14></twDest><twDel>13.102</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<15></twDest><twDel>12.963</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<16></twDest><twDel>12.799</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<17></twDest><twDel>13.817</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<18></twDest><twDel>12.787</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<19></twDest><twDel>12.667</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<20></twDest><twDel>12.791</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<21></twDest><twDel>12.898</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<22></twDest><twDel>12.885</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<23></twDest><twDel>12.778</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<24></twDest><twDel>12.841</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<25></twDest><twDel>13.073</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<26></twDest><twDel>12.995</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<27></twDest><twDel>12.772</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<28></twDest><twDel>13.417</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<29></twDest><twDel>13.823</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<30></twDest><twDel>14.237</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<18></twSrc><twDest>FSB_D<31></twDest><twDel>13.942</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.426</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<0></twDest><twDel>13.751</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<1></twDest><twDel>13.882</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<2></twDest><twDel>14.196</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<3></twDest><twDel>13.764</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<4></twDest><twDel>13.676</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<5></twDest><twDel>13.597</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<6></twDest><twDel>13.509</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<7></twDest><twDel>13.693</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<8></twDest><twDel>13.015</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<9></twDest><twDel>13.306</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<10></twDest><twDel>13.266</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<11></twDest><twDel>13.425</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<12></twDest><twDel>13.452</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<13></twDest><twDel>13.501</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<14></twDest><twDel>13.393</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<15></twDest><twDel>13.254</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<16></twDest><twDel>13.090</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<17></twDest><twDel>14.108</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<18></twDest><twDel>13.078</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<19></twDest><twDel>12.958</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<20></twDest><twDel>13.082</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<21></twDest><twDel>13.189</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<22></twDest><twDel>13.176</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<23></twDest><twDel>13.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<24></twDest><twDel>13.132</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<25></twDest><twDel>13.364</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<26></twDest><twDel>13.286</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<27></twDest><twDel>13.063</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<28></twDest><twDel>13.708</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<29></twDest><twDel>14.114</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<30></twDest><twDel>14.528</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<19></twSrc><twDest>FSB_D<31></twDest><twDel>14.233</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.417</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<0></twDest><twDel>13.742</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<1></twDest><twDel>13.873</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<2></twDest><twDel>14.187</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<3></twDest><twDel>13.755</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<4></twDest><twDel>13.667</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<5></twDest><twDel>13.588</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<6></twDest><twDel>13.500</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<7></twDest><twDel>13.684</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<8></twDest><twDel>13.006</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<9></twDest><twDel>13.297</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<10></twDest><twDel>13.257</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<11></twDest><twDel>13.416</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<12></twDest><twDel>13.443</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<13></twDest><twDel>13.492</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<14></twDest><twDel>13.384</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<15></twDest><twDel>13.245</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<16></twDest><twDel>13.081</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<17></twDest><twDel>14.099</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<18></twDest><twDel>13.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<19></twDest><twDel>12.949</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<20></twDest><twDel>13.073</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<21></twDest><twDel>13.180</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<22></twDest><twDel>13.167</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<23></twDest><twDel>13.060</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<24></twDest><twDel>13.123</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<25></twDest><twDel>13.355</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<26></twDest><twDel>13.277</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<27></twDest><twDel>13.054</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<28></twDest><twDel>13.699</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<29></twDest><twDel>14.105</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<30></twDest><twDel>14.519</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<20></twSrc><twDest>FSB_D<31></twDest><twDel>14.224</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.651</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<0></twDest><twDel>12.925</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<1></twDest><twDel>13.056</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<2></twDest><twDel>13.370</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<3></twDest><twDel>12.938</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<4></twDest><twDel>12.850</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<5></twDest><twDel>12.771</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<6></twDest><twDel>12.683</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<7></twDest><twDel>12.867</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<8></twDest><twDel>12.189</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<9></twDest><twDel>12.480</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<10></twDest><twDel>12.440</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<11></twDest><twDel>12.599</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<12></twDest><twDel>12.626</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<13></twDest><twDel>12.675</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<14></twDest><twDel>12.567</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<15></twDest><twDel>12.428</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<16></twDest><twDel>12.264</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<17></twDest><twDel>13.282</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<18></twDest><twDel>12.252</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<19></twDest><twDel>12.132</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<20></twDest><twDel>12.256</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<21></twDest><twDel>12.363</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<22></twDest><twDel>12.350</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<23></twDest><twDel>12.243</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<24></twDest><twDel>12.306</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<25></twDest><twDel>12.538</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<26></twDest><twDel>12.460</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<27></twDest><twDel>12.237</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<28></twDest><twDel>12.882</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<29></twDest><twDel>13.288</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<30></twDest><twDel>13.702</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<21></twSrc><twDest>FSB_D<31></twDest><twDel>13.407</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.645</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<0></twDest><twDel>12.919</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<1></twDest><twDel>13.050</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<2></twDest><twDel>13.364</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<3></twDest><twDel>12.932</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<4></twDest><twDel>12.844</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<5></twDest><twDel>12.765</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<6></twDest><twDel>12.677</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<7></twDest><twDel>12.861</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<8></twDest><twDel>12.183</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<9></twDest><twDel>12.474</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<10></twDest><twDel>12.434</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<11></twDest><twDel>12.593</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<12></twDest><twDel>12.620</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<13></twDest><twDel>12.669</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<14></twDest><twDel>12.561</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<15></twDest><twDel>12.422</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<16></twDest><twDel>12.258</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<17></twDest><twDel>13.276</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<18></twDest><twDel>12.246</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<19></twDest><twDel>12.126</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<20></twDest><twDel>12.250</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<21></twDest><twDel>12.357</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<22></twDest><twDel>12.344</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<23></twDest><twDel>12.237</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<24></twDest><twDel>12.300</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<25></twDest><twDel>12.532</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<26></twDest><twDel>12.454</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<27></twDest><twDel>12.231</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<28></twDest><twDel>12.876</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<29></twDest><twDel>13.282</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<30></twDest><twDel>13.696</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<22></twSrc><twDest>FSB_D<31></twDest><twDel>13.401</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.795</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<0></twDest><twDel>13.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<1></twDest><twDel>13.200</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<2></twDest><twDel>13.514</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<3></twDest><twDel>13.082</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<4></twDest><twDel>12.994</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<5></twDest><twDel>12.915</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<6></twDest><twDel>12.827</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<7></twDest><twDel>13.011</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<8></twDest><twDel>12.333</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<9></twDest><twDel>12.624</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<10></twDest><twDel>12.584</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<11></twDest><twDel>12.743</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<12></twDest><twDel>12.770</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<13></twDest><twDel>12.819</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<14></twDest><twDel>12.711</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<15></twDest><twDel>12.572</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<16></twDest><twDel>12.408</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<17></twDest><twDel>13.426</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<18></twDest><twDel>12.396</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<19></twDest><twDel>12.276</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<20></twDest><twDel>12.400</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<21></twDest><twDel>12.507</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<22></twDest><twDel>12.494</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<23></twDest><twDel>12.387</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<24></twDest><twDel>12.450</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<25></twDest><twDel>12.682</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<26></twDest><twDel>12.604</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<27></twDest><twDel>12.381</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<28></twDest><twDel>13.026</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<29></twDest><twDel>13.432</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<30></twDest><twDel>13.846</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<23></twSrc><twDest>FSB_D<31></twDest><twDel>13.551</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>CPU_nSTERM</twDest><twDel>10.449</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<0></twDest><twDel>12.722</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<1></twDest><twDel>12.853</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<2></twDest><twDel>13.167</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<3></twDest><twDel>12.735</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<4></twDest><twDel>12.647</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<5></twDest><twDel>12.568</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<6></twDest><twDel>12.480</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<7></twDest><twDel>12.664</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<8></twDest><twDel>11.986</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<9></twDest><twDel>12.277</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<10></twDest><twDel>12.237</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<11></twDest><twDel>12.396</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<12></twDest><twDel>12.423</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<13></twDest><twDel>12.472</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<14></twDest><twDel>12.364</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<15></twDest><twDel>12.225</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<16></twDest><twDel>12.061</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<17></twDest><twDel>13.079</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<18></twDest><twDel>12.049</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<19></twDest><twDel>11.929</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<20></twDest><twDel>12.053</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<21></twDest><twDel>12.160</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<22></twDest><twDel>12.147</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<23></twDest><twDel>12.040</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<24></twDest><twDel>12.103</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<25></twDest><twDel>12.335</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<26></twDest><twDel>12.257</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<27></twDest><twDel>12.034</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<28></twDest><twDel>12.679</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<29></twDest><twDel>13.085</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<30></twDest><twDel>13.499</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<24></twSrc><twDest>FSB_D<31></twDest><twDel>13.204</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.667</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<0></twDest><twDel>13.940</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<1></twDest><twDel>14.071</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<2></twDest><twDel>14.385</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<3></twDest><twDel>13.953</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<4></twDest><twDel>13.865</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<5></twDest><twDel>13.786</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<6></twDest><twDel>13.698</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<7></twDest><twDel>13.882</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<8></twDest><twDel>13.204</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<9></twDest><twDel>13.495</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<10></twDest><twDel>13.455</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<11></twDest><twDel>13.614</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<12></twDest><twDel>13.641</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<13></twDest><twDel>13.690</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<14></twDest><twDel>13.582</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<15></twDest><twDel>13.443</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<16></twDest><twDel>13.279</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<17></twDest><twDel>14.297</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<18></twDest><twDel>13.267</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<19></twDest><twDel>13.147</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<20></twDest><twDel>13.271</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<21></twDest><twDel>13.378</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<22></twDest><twDel>13.365</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<23></twDest><twDel>13.258</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<24></twDest><twDel>13.321</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<25></twDest><twDel>13.553</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<26></twDest><twDel>13.475</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<27></twDest><twDel>13.252</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<28></twDest><twDel>13.897</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<29></twDest><twDel>14.303</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<30></twDest><twDel>14.717</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<25></twSrc><twDest>FSB_D<31></twDest><twDel>14.422</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.769</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<0></twDest><twDel>14.042</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<1></twDest><twDel>14.173</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<2></twDest><twDel>14.487</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<3></twDest><twDel>14.055</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<4></twDest><twDel>13.967</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<5></twDest><twDel>13.888</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<6></twDest><twDel>13.800</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<7></twDest><twDel>13.984</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<8></twDest><twDel>13.306</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<9></twDest><twDel>13.597</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<10></twDest><twDel>13.557</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<11></twDest><twDel>13.716</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<12></twDest><twDel>13.743</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<13></twDest><twDel>13.792</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<14></twDest><twDel>13.684</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<15></twDest><twDel>13.545</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<16></twDest><twDel>13.381</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<17></twDest><twDel>14.399</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<18></twDest><twDel>13.369</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<19></twDest><twDel>13.249</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<20></twDest><twDel>13.373</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<21></twDest><twDel>13.480</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<22></twDest><twDel>13.467</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<23></twDest><twDel>13.360</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<24></twDest><twDel>13.423</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<25></twDest><twDel>13.655</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<26></twDest><twDel>13.577</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<27></twDest><twDel>13.354</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<28></twDest><twDel>13.999</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<29></twDest><twDel>14.405</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<30></twDest><twDel>14.819</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<28></twSrc><twDest>FSB_D<31></twDest><twDel>14.524</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>CPU_nSTERM</twDest><twDel>11.569</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<0></twDest><twDel>13.805</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<1></twDest><twDel>13.936</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<2></twDest><twDel>14.250</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<3></twDest><twDel>13.818</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<4></twDest><twDel>13.730</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<5></twDest><twDel>13.651</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<6></twDest><twDel>13.563</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<7></twDest><twDel>13.747</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<8></twDest><twDel>13.069</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<9></twDest><twDel>13.360</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<10></twDest><twDel>13.320</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<11></twDest><twDel>13.479</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<12></twDest><twDel>13.506</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<13></twDest><twDel>13.555</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<14></twDest><twDel>13.447</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<15></twDest><twDel>13.308</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<16></twDest><twDel>13.144</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<17></twDest><twDel>14.162</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<18></twDest><twDel>13.132</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<19></twDest><twDel>13.012</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<20></twDest><twDel>13.136</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<21></twDest><twDel>13.243</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<22></twDest><twDel>13.230</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<23></twDest><twDel>13.123</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<24></twDest><twDel>13.186</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<25></twDest><twDel>13.418</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<26></twDest><twDel>13.340</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<27></twDest><twDel>13.117</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<28></twDest><twDel>13.762</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<29></twDest><twDel>14.168</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<30></twDest><twDel>14.582</twDel></twPad2Pad><twPad2Pad><twSrc>FSB_A<30></twSrc><twDest>FSB_D<31></twDest><twDel>14.287</twDel></twPad2Pad></twPad2PadList><twOffsetTables></twOffsetTables></twDataSheet></twVerboseRpt></twBody><twFoot><twTimestamp>Tue Nov 02 00:33:37 2021 </twTimestamp></twFoot><twClientInfo anchorID="12"><twClientName>Trace</twClientName><twAttrList><twAttrListItem><twName>Trace Settings</twName><twValue>
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Peak Memory Usage: 164 MB
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