Warp-LC/fpga/_xmsgs/xst.xmsgs
2021-11-02 00:38:46 -04:00

166 lines
15 KiB
XML

<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="warning" file="HDLCompiler" num="1016" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 92: Port <arg fmt="%s" index="1">LoMemCacheCS</arg> is not connected to this instance
</msg>
<msg type="warning" file="HDLCompiler" num="1016" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 108: Port <arg fmt="%s" index="1">RDFixed7k5SEL</arg> is not connected to this instance
</msg>
<msg type="warning" file="HDLCompiler" num="1016" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ClkGen.v" Line 32: Port <arg fmt="%s" index="1">LOCKED</arg> is not connected to this instance
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PLL.v" Line 129: Assignment to <arg fmt="%s" index="1">clkout1_unused</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PLL.v" Line 130: Assignment to <arg fmt="%s" index="1">clkout2_unused</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PLL.v" Line 131: Assignment to <arg fmt="%s" index="1">clkout3_unused</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PLL.v" Line 132: Assignment to <arg fmt="%s" index="1">clkout4_unused</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PLL.v" Line 133: Assignment to <arg fmt="%s" index="1">clkout5_unused</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 94: Assignment to <arg fmt="%s" index="1">FSB_SEL_RAM</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 95: Assignment to <arg fmt="%s" index="1">FSB_SEL_ROM</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 96: Assignment to <arg fmt="%s" index="1">FSB_VRAM</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 97: Assignment to <arg fmt="%s" index="1">FSB_SEL_Cache</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 98: Assignment to <arg fmt="%s" index="1">FSB_CA</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 104: Assignment to <arg fmt="%s" index="1">FSB_B</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="1016" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\Prefetch.v" Line 49: Port <arg fmt="%s" index="1">doutb</arg> is not connected to this instance
</msg>
<msg type="warning" file="HDLCompiler" num="1499" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PrefetchTagRAM.v" Line 39: Empty module &lt;<arg fmt="%s" index="1">PrefetchTagRAM</arg>&gt; remains a black box.
</msg>
<msg type="warning" file="HDLCompiler" num="1499" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\PrefetchDataRAM.v" Line 39: Empty module &lt;<arg fmt="%s" index="1">PrefetchDataRAM</arg>&gt; remains a black box.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 116: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">WRA</arg>&gt;. Formal port size is <arg fmt="%d" index="2">26</arg>-bit while actual signal size is <arg fmt="%d" index="1">28</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="1499" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ipcore_dir\L2WayRAM.v" Line 39: Empty module &lt;<arg fmt="%s" index="1">L2WayRAM</arg>&gt; remains a black box.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 43: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">addra</arg>&gt;. Formal port size is <arg fmt="%d" index="2">10</arg>-bit while actual signal size is <arg fmt="%d" index="1">12</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="new" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 44: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">dina</arg>&gt;. Formal port size is <arg fmt="%d" index="2">47</arg>-bit while actual signal size is <arg fmt="%d" index="1">50</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="new" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 45: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">douta</arg>&gt;. Formal port size is <arg fmt="%d" index="2">47</arg>-bit while actual signal size is <arg fmt="%d" index="1">49</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 49: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">addrb</arg>&gt;. Formal port size is <arg fmt="%d" index="2">10</arg>-bit while actual signal size is <arg fmt="%d" index="1">12</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="new" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 50: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">dinb</arg>&gt;. Formal port size is <arg fmt="%d" index="2">47</arg>-bit while actual signal size is <arg fmt="%d" index="1">49</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="new" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 51: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">doutb</arg>&gt;. Formal port size is <arg fmt="%d" index="2">47</arg>-bit while actual signal size is <arg fmt="%d" index="1">49</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="1127" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v" Line 51: Assignment to <arg fmt="%s" index="1">TSD</arg> ignored, since the identifier is never used
</msg>
<msg type="warning" file="HDLCompiler" num="189" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 132: Size mismatch in connection of port &lt;<arg fmt="%s" index="3">WRA</arg>&gt;. Formal port size is <arg fmt="%d" index="2">26</arg>-bit while actual signal size is <arg fmt="%d" index="1">28</arg>-bit.
</msg>
<msg type="warning" file="HDLCompiler" num="634" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 125: Net &lt;<arg fmt="%s" index="1">CLK</arg>&gt; does not have a driver.
</msg>
<msg type="warning" file="HDLCompiler" num="552" delta="old" >"C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v" Line 108: Input port <arg fmt="%s" index="1">RDFixed7k5SEL</arg> is not connected on this instance
</msg>
<msg type="warning" file="Xst" num="2972" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%d" index="2">92</arg>. All outputs of instance &lt;<arg fmt="%s" index="3">cs</arg>&gt; of block &lt;<arg fmt="%s" index="4">CS</arg>&gt; are unconnected in block &lt;<arg fmt="%s" index="5">WarpLC</arg>&gt;. Underlying logic will be removed.
</msg>
<msg type="warning" file="Xst" num="2972" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%d" index="2">101</arg>. All outputs of instance &lt;<arg fmt="%s" index="3">sd</arg>&gt; of block &lt;<arg fmt="%s" index="4">SizeDecode</arg>&gt; are unconnected in block &lt;<arg fmt="%s" index="5">WarpLC</arg>&gt;. Underlying logic will be removed.
</msg>
<msg type="warning" file="Xst" num="2898" delta="old" >Port &apos;<arg fmt="%s" index="1">RDFixed7k5SEL</arg>&apos;, unconnected in block instance &apos;<arg fmt="%s" index="2">prefetch</arg>&apos;, is tied to GND.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">CPU_nAS</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">CA</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">RAMCS</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">ROMCS</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">VRAMCS</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">CacheCS</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">92</arg>: Output port &lt;<arg fmt="%s" index="3">LoMemCacheCS</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">cs</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\WarpLC.v</arg>&quot; line <arg fmt="%s" index="2">101</arg>: Output port &lt;<arg fmt="%s" index="3">B</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">sd</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="warning" file="Xst" num="653" delta="old" >Signal &lt;<arg fmt="%s" index="1">CLK</arg>&gt; is used but never assigned. This sourceless signal will be automatically connected to value <arg fmt="%s" index="2">GND</arg>.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\ClkGen.v</arg>&quot; line <arg fmt="%s" index="2">32</arg>: Output port &lt;<arg fmt="%s" index="3">LOCKED</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">pll</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\Prefetch.v</arg>&quot; line <arg fmt="%s" index="2">49</arg>: Output port &lt;<arg fmt="%s" index="3">doutb</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">data</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="warning" file="Xst" num="647" delta="new" >Input &lt;<arg fmt="%s" index="1">RDA&lt;27:12&gt;</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">WRM</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">TS</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">WR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="new" >Input &lt;<arg fmt="%s" index="1">CLR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">ALL</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="info" file="Xst" num="3210" delta="old" >&quot;<arg fmt="%s" index="1">C:\Users\Dog\Documents\GitHub\Warp-LC\fpga\L2CacheWay.v</arg>&quot; line <arg fmt="%s" index="2">39</arg>: Output port &lt;<arg fmt="%s" index="3">doutb</arg>&gt; of the instance &lt;<arg fmt="%s" index="4">way</arg>&gt; is unconnected or connected to loadless signal.
</msg>
<msg type="info" file="Xst" num="1901" delta="old" >Instance <arg fmt="%s" index="1">pll_base_inst</arg> in unit <arg fmt="%s" index="2">pll_base_inst</arg> of type <arg fmt="%s" index="3">PLL_BASE</arg> has been replaced by <arg fmt="%s" index="4">PLL_ADV</arg>
</msg>
<msg type="info" file="Xst" num="2169" delta="old" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
</msg>
</messages>