118 lines
4.9 KiB
HTML
118 lines
4.9 KiB
HTML
<html>
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<head>
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<title>Garrett's Workshop - Warp-LC Timing</title>
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<style type="text/css">
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ul {
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margin-top: 0;
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}
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h3 {
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margin-bottom: 0;
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}
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h2, h4 {
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margin-bottom: 3px;
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}
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h3 + h4 {
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margin-top:6px;
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}
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p {
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margin-top:0;
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}
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ul li {
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padding-top: 3px;
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}
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ul li sup {
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line-height: 0;
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}
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</style>
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<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/skins/default.js" type="text/javascript"></script>
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<script src="https://cdnjs.cloudflare.com/ajax/libs/wavedrom/2.6.8/wavedrom.min.js" type="text/javascript"></script>
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</head>
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<body onload="WaveDrom.ProcessAll()">
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<h1>Garrett's Workshop Warp-LC 50 MHz 68030 Accelerator Documentation</h1>
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<h3 id="t0">RAM single read - cache miss, wrong row open</h3>
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<script type="WaveDrom">{signal: [
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{name: '100 MHz CLK', wave: 'p.....................', phase: 0.00, period: 1.0},
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{name: 'CPUCLK', wave: '0101010101010101010101', phase: 0.00, period: 1.0},
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["'030 bus inputs",
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{name: 'R/W', wave: 'xxxxxxxxxx1...................xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: 'A, FC, /RMC', wave: 'xxxxxxxxxx2...................xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: 'CIOUT', wave: 'xxxxxxxxxx2...................xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: '/AS', wave: '1.......x..0................x..1............', phase: 0.00, period: 0.5},
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{name: '/ASr', wave: '1..0....1..', phase: 0.00, period: 2.0},
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{name: '/CBREQ', wave: '1...........................................', phase: 0.00, period: 0.5}],
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{name: '/STERM', wave: '1...........0.1.......', phase: 0.00, period: 1.0},
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["L2$ ctrl.",
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{name: 'L2RDCLK', wave: '0.....1.........0.....', phase: 0.00, period: 1.0},
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{name: 'L2WRCLK', wave: '0.............10......', phase: 0.00, period: 1.0}],
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["SDRAM ctrl.",
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{name: 'RS', wave: '22.2.2.2.2.2.2.2.2.2.2', phase: 0.00, period: 1.0, data:[
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'idle', 'idle', 'idle', 'idle', 'read0', 'read1', 'read2', 'read3', 'read4', 'idle', 'idle', 'idle']},
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{name: 'RAMCMD', wave: '2222222222222222222222', phase: 0.00, period: 1.0, data:[
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'NOP','NOP',
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'NOP','NOP',
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'NOP','NOP',
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'NOP','PC',
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'NOP','ACT',
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'NOP','RD',
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'NOP','NOP',
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'NOP','NOP',
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'NOP','PC',
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'NOP','NOP',
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'NOP','NOP']},
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{name: 'RAMCKE', wave: '1...........01........', phase: 0.00, period: 1.0},
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{name: 'RAMCLK', wave: '01010101010101010101010101010101010101010101', phase: 0.00, period: 0.5}],
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["Data bus",
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{name: '/FDOE', wave: '1......01.............', phase: 0.00, period: 1.0},
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{name: '/BDOE', wave: '1.......0......1......', phase: 0.00, period: 1.0},
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{name: 'BDDIR', wave: '1......0........1.....', phase: 0.00, period: 1.0}],
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{name: 'BD', wave: 'zzzzzzzzzzzzzzxxxxzzzzzzzx2..xzzzzzzzzzzzzzz', phase: 0.00, period: 0.5},
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{name: 'D', wave: 'zzzzzzzzzzzzzzzzxxxxxxxxxxx2.xxzzzzzzzzzzzzz', phase: 0.00, period: 0.5},
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]}</script><br/><p>
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</p>
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<h3 id="t0">RAM single read - cache hit, wrong row open</h3>
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<script type="WaveDrom">{signal: [
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{name: '100 MHz CLK', wave: 'p.................', phase: 0.00, period: 1.0},
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{name: 'CPUCLK', wave: '010101010101010101', phase: 0.00, period: 1.0},
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["'030 bus inputs",
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{name: 'R/W', wave: 'xxxxxxxxxx1...........xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: 'A, FC, /RMC', wave: 'xxxxxxxxxx2...........xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: 'CIOUT', wave: 'xxxxxxxxxx2...........xxxxxxxxxxxxxx', phase: 0.00, period: 0.5},
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{name: '/AS', wave: '1.......x..0........x..1............', phase: 0.00, period: 0.5},
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{name: '/ASr', wave: '1..0..1..', phase: 0.00, period: 2.0},
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{name: '/CBREQ', wave: '1...................................', phase: 0.00, period: 0.5}],
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{name: '/STERM', wave: '1.......0.1.......', phase: 0.00, period: 1.0},
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["L2$ ctrl.",
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{name: 'L2RDCLK', wave: '0.....1.....0.....', phase: 0.00, period: 1.0},
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{name: 'L2WRCLK', wave: '0.................', phase: 0.00, period: 1.0}],
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["SDRAM ctrl.",
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{name: 'RS', wave: '22.2.2.2.2.2.2.2.2', phase: 0.00, period: 1.0, data:[
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'idle', 'idle', 'idle', 'idle', 'read0', 'read1', 'read2', 'read3', 'read4', 'idle', 'idle', 'idle']},
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{name: 'RAMCMD', wave: '222222222222222222', phase: 0.00, period: 1.0, data:[
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'NOP','NOP',
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'NOP','NOP',
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'NOP','NOP',
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'NOP','PC',
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'NOP','ACT',
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'NOP','NOP',
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'NOP','NOP',
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'NOP','NOP',
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'NOP','NOP']},
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{name: 'RAMCKE', wave: '1.................', phase: 0.00, period: 1.0},
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{name: 'RAMCLK', wave: '010101010101010101010101010101010101', phase: 0.00, period: 0.5}],
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["Data bus",
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{name: '/FDOE', wave: '1......0...1......', phase: 0.00, period: 1.0},
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{name: '/BDOE', wave: '1.......0..1......', phase: 0.00, period: 1.0},
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{name: 'BDDIR', wave: '1......0....1.....', phase: 0.00, period: 1.0}],
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{name: 'BD', wave: 'zzzzzzzzzzzzzzxxx2....xxzzzzzzzzzzzz', phase: 0.00, period: 0.5},
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{name: 'D', wave: 'zzzzzzzzzzzzzzzzxxx2..xxzzzzzzzzzzzz', phase: 0.00, period: 0.5},
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]}</script><br/><p>
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</p>
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</body>
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</html>
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