# Mapped Logic

The Mapped Logic section provides a table listing resources allocated by the fitter to mapped logic. The page will appear in your browser sorted by Signal Name, but you can choose to sort it by Signal Name, Function Block, and Pin Number by clicking on the appropriate table headers.
The Mapped Logic table contains the following:

- The output signal name

Note: Clicking on the signal name will open a new window with the equations for that signal.

- The total number of product terms
- The number of signals used
- The function block number - an asterisk "*" indicates a user assignment

Note: Clicking on the function block will provide a detailed table of all the block's resources and a graphical display of the function block diagram (see Function Block Specifics for more details).

- The macrocell number

Note: Clicking on the underscored macrocell number will provide a graphical display of the macrocell that looks like this:

.

- The slew rate
- The pin number - an asterisk "*" indicates a user assignment

Note: Clicking on the underscored pin number will provide the pin layout diagram for the highlighted pin. Rolling your mouse over the colored pin will pop up a tooltip with the signal name assigned to the pin, the I/O standard, the I/O style, the slew rate, and/or any constraints assigned to the pin:

- The pin type
- The pin use
- The input register use
- The I/O standard
- The I/O style